HFC0400 Fixed Frequency Flyback Controller with Ultra-low No Load Power Consumption The Future of Analog IC Technology DESCRIPTION HFC0400 is a fixed-frequency current-mode controller with built-in slope compensation. It targets medium-power, off-line, flyback, switchmode power supplies. At light loads, the controller freezes the peak current and reduces its switching frequency down to 25kHz to offer excellent light-load efficiency. FEATURES At very light loads, the controller enters burst mode to achieve very low standby power consumption. HFC0400 offers frequency jittering to help dissipate energy generated by conducted noise. HFC0400 also has an X-cap discharge function to discharge the X-cap when the input is unplugged. HFC0400 features multiple protections that include thermal shutdown (TSD), VCC undervoltage lockout (UVLO), overload protection (OLP), over-voltage protection (OVP), and brown-out protection. HFC0400 is available in an SOIC8-7A package. Fixed-frequency current-mode control with built-in slope compensation Frequency foldback down to 25kHz at light loads Burst mode for low standby power consumption Frequency jitter to reduce EMI signature X-cap discharge function Internal high-voltage current source VCC under-voltage lockout with hysteresis (UVLO) Brown-out protection on HV pin Overload protection with programmable delay Thermal shutdown (auto-restart with hysteresis) Latch-off for external over-voltage protection (OVP) and over-temperature protection (OTP) on TIMER pin Short-circuit protection Programmable soft start APPLICATIONS AC/DC adapters for notebook computers, tablets, and smartphones Offline battery chargers LCD TV s and monitors All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL APPLICATION T1 Output Input 85~265Vac VCC * TIMER FB CS GND 1 8 HV 2 HFC0400 3 6 4 5 VCC VCC DRV * The circuit in red is optional. Implements external OVP and OTP function by pulling the TIMER pin down. HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION ORDERING INFORMATION Part Number* HFC0400GS Package SOIC8-7A Top Marking HFC0400 * For Tape & Reel, add suffix –Z (e.g. HFC0400GS–Z); PACKAGE REFERENCE TOP VIEW TIMER 1 8 HV FB 2 CS 3 6 VCC GND 4 5 DRV ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance HV Break Down Voltage .............. -0.7V to 700V VCC, DRV to GND............................ -0.3V to 30V FB, TIMER, CS to GND .................... -0.3V to 7V (2) Continuous Power Dissipation (TA = +25°C) ............................................................. 1.3W Junction Temperature ...............................150°C Thermal Shutdown ....................................150°C Thermal Shutdown Hysteresis ....................25°C Lead Temperature ....................................260°C Storage Temperature .............. -60°C to +150°C ESD Capability Human Body Model (All Pins except HV) ............................................... 4.0kV ESD capability for Machine Mode .............. 200V SOIC8-7A ................................ 96 ...... 45 ... °C/W Recommended Operation Conditions (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. (3) Operating Junction Temp (TJ) .. -40°C to +125°C Operating VCC range ........................... 8V to 20V HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 3 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION ELECTRICAL CHARACTERICS For typical value TJ=25°C, unless otherwise noted Parameter Start-up Current Source (HV) Supply Current from HV Leakage Current from HV Break-Down Voltage Supply Voltage Management (VCC) VCC Current-Source Turn-Off Level, Rising VCC Threshold for HV Turn-On Detection, Falling VCC Hysteresis for HV Turn-On Detection VCC Current-Source Turn-On Level, Falling VCC UVLO Hysteresis VCC Re-charge Level When Protection Occurs VCC Decreasing Level When Latch-Off Phase Ends Internal IC Consumption Internal IC Consumption, Latch Off Phase Symbol Conditions Min Typ Max Unit VCC=6V;VHV=400V VCC=10V;VHV=400V 1.6 12 700 1.85 15 2.1 18 mA μA V VCCOFF 12 14.5 17 V VCCSS 9.5 11.5 13.5 V VCCOFF − VCCSS 1.5 3 VCCON 7.0 8.0 VCCOFF − VCCON 5 6.5 VCCPRO 4.7 5.3 IHV IHV VBR VCCLATCH ICC ICCLATCH Voltage above VCC Where the Controller Latches Off (OVP) VOVP OVP Comparator Blanking Duration τOVP Brown-out HV Turn-On Threshold HV Turn-Off Threshold Brown-Out Hysteresis Timer Duration for Line Cycle Drop-out Oscillator Oscillator Frequency Frequency Jitter Amplitude, in Percentage of fOSC Frequency Jitter Modulation Period Current Sense Current Limit Short-Circuit Protection Level Leading-Edge Blanking for VILIM Leading-Edge Blanking for VSCP Slope of the Compensation Ramp HFC0400 Rev. 1.0 11/28/2012 HVON HVOFF HV τHV VFB=2V;CL=1nF, VCC=12V VCC=6V V 5.9 CTIMER=47nF V V 1.5 2 mA 520 585 650 μA 22 25 27 V 26 VHV rising VHV falling V 1 μs 95 90 4 50 108 103 5.2 120 115 6.4 V V V ms 60 65 69.5 kHz Ajitter VILIM VSCP τLEB1 τLEB2 SRAMP 9.0 2.5 fOSC τjitter V CTIMER=47nF 0.9 1.3 20 6.7 % 3.7 ms 0.95 1.45 350 270 25 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 1.55 30 V V ns ns mV/μs 4 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION ELECTRICAL CHARACTERICS (continued) For typical value TJ=25°C, unless otherwise noted Parameter Symbol Feedback (FB ) Internal Pull-Up Resistor Internal Pull-Up Voltage VFB to Internal Current Set-Point Division Ratio FB Level (Falling) at which the Controller Enters Burst Mode FB Level (Rising) at which the Controller Exits Burst Mode Over Load Protection FB Level at which the Controller Enters OLP after Blanking Time Time Duration When FB Reaches Protection Point, Before OLP Conditions RFB VDD Min Typ Max Unit 12 13 4.3 14 kΩ V KFB 3.0 -- VBURL 0.29 0.32 0.35 V VBURH 0.42 0.46 0.50 V 3.7 VOLP τOLP CTIMER=47nF V 50 ms Frequency Foldback Frequency Foldback FB Voltage Threshold, Upper Limit VFB(FOLD) Minimum Switching Frequency fOSC(min) Frequency Foldback FB Voltage Threshold, Lower Limit 1.8 21 VFB(FOLDE) 25 V 30 1.0 kHz V Latch-Off Input (Integration in TIMER ) The Threshold below which Controller is Latched Blanking Duration on Latch Detection 0.9 VTIMER(LATCH) τLATCH 1 1.1 V 12 μs 6.7 10.3 13.4 16 13 23 8 20 V V V mV ns ns Ω Ω DRV Voltage Driver Voltage High Level Driver Voltage-Clamp Level Driver Voltage, Low Level Driver Voltage, Rise Time Driver Voltage, Fall Time Driver Pull-Up Resistance Driver Pull-Down Resistance HFC0400 Rev. 1.0 11/28/2012 VHigh VClamp VLow τR τF RPull-up RPull-down CL=1nF VCC=8.4V CL=1nF VCC=12V CL=1nF, VCC=24V CL=1nF, VCC=24V CL=1nF, VCC=16V CL=1nF, VCC=16V CL=1nF, VCC=16V CL=1nF, VCC=16V www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 5 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION PIN FUNCTIONS Pin # Name 1 TIMER 2 3 4 5 6 8 FB CS GND DRV VCC HV HFC0400 Rev. 1.0 11/28/2012 Description Timer. This pin combines the soft start, frequency jittering, and timer functions for OLP, brown-out protection, and X-cap discharge. Latch the IC by pulling this pin down. Feedback. Use a pull-down optocoupler to control output regulation. Current Sense. Senses the primary current for current-mode operation. IC Ground. Drive Signal Output. Power Supply. High-Voltage Current Source. Includes brown-out and X-cap discharge functions. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 6 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL CHARACTERISTICS Supply Current from HV vs. Temperature Leakage Current from HV vs. Temperature VCC=6V;VHV=400V 2.40 24 1.30 ICC(mA) 16 14 1.80 12 1.60 10 1.20 -40-25 -10 5 20 35 50 65 80 95 110125 Break-Down Voltage vs. Temperature 840 820 800 740 720 700 680 660 640 -40-25-10 5 20 35 50 65 80 95110125 VCC Current-Source Turn-On Level, Falling vs. Temperature 4 -40-25-10 5 20 35 50 65 80 95 110 125 1.00 -40-25 -10 5 20 35 50 65 80 95110 125 VCC Current-Source Turn-Off Level, Rising vs. Temperature 14.40 VCC Threshold for HV Turn-On Detection, Falling vs. Temperature 11.65 14.30 11.60 11.55 14.10 14.00 13.90 13.70 -40-25-10 5 20 35 50 65 80 95 110125 11.35 -40-25 -10 5 20 35 50 65 80 95 110 125 Voltage above VCC Where the Controller Latches Off (OVP) vs. Temperature VCCOVP(V) 7.85 25.0 24.8 24.6 7.80 24.4 7.75 7.70 -40-25 -10 5 20 35 50 65 80 95110125 HFC0400 Rev. 1.0 11/28/2012 24.2 -40-25-10 5 20 35 50 65 80 95110125 3 VCC Hysteresis for HV Turn-On Detection vs. Temperature 2.9 25.2 7.90 11.45 11.40 8.00 7.95 11.50 13.80 25.4 8.05 1.15 1.05 VCCSS(V) VCCOFF(V) 760 1.20 6 14.20 780 1.25 1.10 8 VCCOFF-VCCSS(V) IHV(mA) 1.35 18 1.40 VCCON(V) VFB=2V, CL=1nF, VCC=12V 1.40 20 2.00 VBV(V) VCC=10V;VHV=400V 22 2.20 8.10 Internal IC Consumption vs. Temperature 2.8 2.7 2.6 2.5 2.4 2.3 2.2 -40-25-10 5 20 35 50 65 80 95110125 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 7 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL CHARACTERISTICS (continued) 5.50 VCC Re-charge Level when Protection Occurs vs. Temperature 3.2 5.45 VCC Decreasing Level When Latch-off Phase Ends vs. Temperature HV Turn-on Threshold vs. Temperature 116 114 3.0 112 5.35 5.30 5.25 2.8 HVON (V) VCCLATCH (V) VCCPRO (V) 5.40 2.6 2.4 5.20 5.10 -40-25-10 5 20 35 50 65 80 95110125 6.52 64.0 6.50 63.0 6.48 62.0 6.46 61.0 6.44 60.0 6.42 94 59.0 6.40 92 -40-25-10 5 20 35 50 65 80 95110 125 58.0 -40-25-10 5 20 35 50 65 80 95110125 6.38 -40-25-10 5 20 35 50 65 80 95110 125 fOSC (kHz) 104 102 100 98 96 26.5 Minimum Switching Frequency vs. Temperature 26.0 25.5 24.0 23.5 -40-25-10 5 20 35 50 65 80 95110125 0.98 0.97 27.0 0.96 26.0 0.95 24.0 24.5 Current Limit vs. Temperature 28.0 25.0 25.0 HFC0400 Rev. 1.0 11/28/2012 29.0 Slope of the Compensation Ramp vs. Temperature VILIM (V) 106 HVOFF (V) Frequency Jitter Amplitude, in Percentage of fOSC vs. Temperature 65.0 108 fOSC(MIN) (kHz) 104 98 -40-25-10 5 20 35 50 65 80 95110125 Oscillator Frequency vs. Temperature 110 106 100 2.0 -40-25-10 5 20 35 50 65 80 95110125 HV Turn-off Threshold vs. Temperature 108 102 2.2 5.15 110 0.94 0.93 23.0 0.92 22.0 0.91 21.0 -40-25-10 5 20 35 50 65 80 95110125 0.90 -40-25-10 5 20 35 50 65 80 95110125 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 8 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL CHARACTERISTICS (continued) 1.48 500 1.47 1.45 TLEB1 (ns) 1.44 1.43 400 390 480 380 470 370 460 450 440 360 350 340 430 330 420 320 1.41 410 310 1.40 -40-25-10 5 20 35 50 65 80 95 110 125 400 -40-25-10 5 20 35 50 65 80 95110125 300 -40-25-10 5 20 35 50 65 80 95 110 125 1.42 FB Level (Rising) at which the Controller Exits Burst Mode vs. Temperature FB Level (Falling) at which the Controller Enters Burst Mode vs. Temperature FB Level at which the Controller Enters OLP after Blanking Time vs. Temperature 0.480 3.90 0.335 0.475 3.85 0.330 0.470 3.80 0.325 0.465 3.75 VBURH (V) 0.340 0.320 0.315 0.460 0.455 3.70 3.65 0.310 0.450 3.60 0.305 0.445 3.55 0.300 -40-25-10 5 20 35 50 65 80 95 110125 0.440 -40-25-10 5 20 35 50 65 80 95 110125 3.50 -40-25-10 5 20 35 50 65 80 95 110 125 18 FB Internal Pull-up Resistor vs. Temperature 4.40 17 4.35 16 4.30 15 4.25 VDD (V) VBURL (V) Leading Edge Blanking for VSCP vs. Temperature 490 VOLP (V) VSCP (V) 1.46 Leading-Edge Blanking for VILIM vs. Temperature TLEB2 (ns) Short-Circuit Protection Level vs. Temperature 14 13 FB Internal Pull-up Voltage vs. Temperature 4.20 4.15 12 4.10 11 4.05 10 -40-25-10 5 20 35 50 65 80 95 110 125 4.00 -40-25-10 5 20 35 50 65 80 95 110125 HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 9 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL PERFORMANCE CHARACTERISIC VIN=230VAC, VOUT1=5V, IOUT1=3A, VOUT2=16V, IOUT2=1.5A, TA=25°C, unless otherwise noted. Input Power Start Up Inut Power Shut Down Output1 Ripple VOUT2 5V/div. VOUT1 2V/div. VOUT2 5V/div. VIN 200V/div. VOUT1 2V/div. VOUT1 50mV/div. VIN 200V/div. SCP Entry Output2 Ripple SCP Recovery VDS 100V/div. VDS 100V/div. VCC 10V/div. VFB 5V/div. VCC 10V/div. VFB 5V/div. VOUT2 10V/div. VOUT2 10V/div. VOUT2 20mV/div. OLP, 5V Over Load OLP, 16V Over Load OVP No Load VDS 100V/div. VDS 100V/div. VOUT1 5V/div. VCC 10V/div. VFB 5V/div. VOUT1 5V/div. HFC0400 Rev. 1.0 11/28/2012 VCC 10V/div. VFB 5V/div. VOUT2 10V/div. VOUT2 10V/div. VCC 10V/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 10 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL PERFORMANCE CHARACTERISIC (continued) VIN=230VAC, VOUT1=5V, IOUT1=3A, VOUT2=16V, IOUT2=1.5A, TA=25°C, unless otherwise noted. OVP OTP Entry OTP Recovery Full Load VDS 100V/div. VDS 100V/div. VOUT1 5V/div. VCC 10V/div. VOUT2 10V/div. VCC 10V/div. VFB 2V/div. VOUT1 2V/div. VFB 2V/div. VOUT1 2V/div. VCC 10V/div. Brown-in Brown-out VIN=75VAC VIN=72VAC VDRV 10V/div. VDRV 10V/div. VCC 10V/div. VCC 10V/div. VFB 2V/div. VFB 2V/div. VHV 50V/div. VHV 50V/div. VX-CAP 100V/div. Conducted EMI VX-CAP 100V/div. 120 110 100 90 80 70 60 50 40 30 20 10 0 150kHz HFC0400 Rev. 1.0 11/28/2012 Conducted EMI L-Wire 1MHz 10MHz EN55022Q EN55022A 30MHz 120 110 100 90 80 70 60 50 40 30 20 10 0 N-Wire 1MHz 10MHz EN55022Q EN55022A 150kHz www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 30MHz 11 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL PERFORMANCE CHARACTERISIC (continued) VIN=230VAC, VOUT1=5V, IOUT1=3A, VOUT2=16V, IOUT2=1.5A, TA=25°C, unless otherwise noted. 90.0 Efficiency 89.0 230VAC/50Hz 88.0 87.0 86.0 115VAC/60Hz 85.0 84.0 25 50 75 100 No Load Power Consumption VIN (VAC/Hz) 5V/0A, 16V/0A PIN (mW) 5V/6mA, 16V/0A HFC0400 Rev. 1.0 11/28/2012 85/60 26.35 71.92 115/60 27.59 72.72 230/50 32.40 80.70 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 265/50 35.26 84. 83 12 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION OPERATION HFC0400 incorporates all the necessary features to build a reliable switch-mode power supply. It is a fixed-frequency current-mode controller with built-in slope compensation. At light loads, the controller freezes the peak current and reduces its switching frequency down to 25kHz to Vcc Power Management minimize switching losses. When the output power falls below a given level, the controller enters burst mode. It also has excellent EMI performance thanks to frequency jittering. Its high level of integration requires very few external components. Start Up Unit HV Brown-out Detection X-CAP Discharge Function OVP Fault Management Timer OLP Driving Signal Management DRV Frequency Foldback FB Burst Mode Control Peak Current Compression Comparator Slope Compensation GND CS Figure 1: Functional Block Diagram HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 13 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION Fixed-Frequency with Jitter Frequency Foldback Frequency jitter reduces EMI by dissipating the energy. Figure 2 shows the circuit of frequency jittering. FB VDD 14pF 10uA Timer 3.2V 20uA 2.8V S Q R _ Q The HFC0400 implements frequency foldback at light load condition to improve overall efficiency. When the load decreases to a given level (1.33V<VFB<2V), the controller freezes the peak current (as measured as the voltage on the CS pin, 0.67V) and reduces its switching frequency down to 25kHz which helps to reduce the switching loss. If the load continues to decrease, the peak current decreases at a 25kHz fixed frequency to avoid audible noise. Figure 4 shows the frequency vs.VFB and peak current (VCS) vs. VFB. Figure 2: Frequency Jitter Circuit A controlled current sourced (fixed at 2.72µA when VFB=2V) chargers the internal 14pF capacitor. Comparing the capacitor voltage to the TIMER voltage estimates the switching frequency as per equation (1). VTIMER is a triangular wave that ranges between 2.8V and 3.2V with a charging/discharging current of 10A. Figure 3 shows shows the frequency jitter, τjitter, as per equation (2). fs 14pF VTIMER jitter 2 1 2.72A 0.2s CTIMER (3.2V 2.8V) 10A (1) (2) Current-Mode Operation with Slope Compensation VFB controls the primary-peak current. When the peak current reaches the level determined by VFB, DRV turns off. The controller can also be used in continuous conduction mode (CCM) with a wide input voltage range because its internal synchronous slope compensation (30mV/µs) avoids sub-harmonic oscillations when the duty cycle exceeds 50%. High Voltage Startup Current Source with Brown-Out Detection fOSC 69.3kHz 65kHz 60.4kHz Tjitter Figure 4: Frequency and Peak Current (VCS) vs VFB Time Initially, the internal high-voltage current source drawn from the HV pin supplies the IC. The IC turns off the current source as soon as VCC reaches 14.5V and detects the voltage on HV. Once the HV voltage exceeds HVON before VCC drops down to 11.5V, the controller starts switching. Otherwise the system treats the condition as a brown-out to to lock the driver Figure 3: Frequency Jitter HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 14 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION output, causing VCC to drop down to 5.3V and the high-voltage current source turns on to recharge VCC. The auxiliary transformer winding supplies the IC after the controller starts switching. If VCC falls below 8.0V, the switching pulse stops and the current source turns on again. Figure 5 shows the typical VCC under-voltage lockout waveform. Figure 6: Soft-Start Burst Mode Figure 5: VCC Under-Voltage Lockout The VCC lower threshold UVLO drops from 8V to 5.3V under fault conditions, such as OLP, SCP, brown-out, OVP, and OTP. Soft Start The peak current (controlled by the TIMER voltage) gradually increases from 0.25V to 1V, as does the switching frequency, to reduce the stress on power components and to smoothly establish the output voltage as the TIMER voltage increases from 1V to 1.75V during startup. Figure 6 shows the typical soft-start waveform. The TIMER capacitor determines the start-up duration as per equation (3). Soft start CTIMER (1.75V 1V) 10 / 4A The HFC0400 enters burst-mode operation to minimize power dissipation at no load or light load. As the load decreases, VFB decreases. The IC stops the switching cycle when VFB drops below the lower threshold, VBRUL−0.32V. The output voltage starts to drop, which causes VFB to increase again. Once VFB exceeds VBRUH−0.46V, switching resumes. VFB then rises and falls repeatedly. Burst mode alternately enables and disables MOSFET switching, thereby reducing no load or light load switching losses. Timer-Based Over-Load Protection In a flyback converter, a fixed switching frequency results in a peak-current-limited maximum output power. When the output demand exceeds the power limit, the output voltage drops below the set value. Then the current flowing through primary and secondary optocoupler falls and VFB is pulled high. The HFC0400 implements a timer-based OLP block as per Figure 7. (3) Figure 7: Overload Protection Block HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 15 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION When FB exceeds 3.7V (considered an error), the timer starts to count the VQ rising edge. Removing the error flag resets the timer. If the timer reaches its completion (a count of 17), OLP triggers. This timer duration avoids triggering OLP during the power supply start-up or a load transition phase. Figure 8 shows OLP. TIMER Latch-Off for OVP and OTP Pulling TIMER down below 1.0V for 12µs latches the HFC0400 off for external OVP and OTP etc. X-Cap Discharge Function X-caps typically filters the differential-mode EMI noise from a power supply’s input. These components pose a potential hazard because they can store unsafe levels of high-voltage energy for long after the AC line is disconnected. Resistors in parallel to the X-cap provide a discharge path to meet safety standards, but constantly dissipate power while the AC is connected, and contribute to no-load and standby input power consumption. Figure 8: Overload Protection Timer-Based Brown-Out Protection The brown-out protection block is similar to the OLP block. When the HV voltage drops below HVOFF (which is an error), the timer starts to count the VQ rising edges. Once the HV voltage exceeds HVOFF, the timer resets. When the timer has counted to 17, brown-out protection triggers and the switching pulse stops. Short-Circuit Protection (SCP) The HFC0400 has short-circuit protection that senses the CS voltage and stops switching if VCS reaches 1.5V after a reduced leading-edge blanking (LEB) time. As soon as the fault disappears, the power supply resumes operation. Thermal Shutdown (TSD) To prevent from any lethal thermal damage, HFC0400 shuts down switching when the inner temperature exceeds 150°C. As soon as the inner temperature drops below 125°C, the power supply resumes operation. During TSD, the VCC UVLO lower threshold drops from 8.0V to 5.3V. VCC Over-Voltage Protection (OVP) The HFC0400 enters latched fault condition if VCC goes above 25V for 25µs. The controller stays fully latched until VCC drops below 2.5V, e.g. when the user power-cycles the main input. HFC0400 Rev. 1.0 11/28/2012 Figure 9: X-Cap Discharger The HFC0400’s HV acts as a smart X-cap discharger. In the presence of an AC voltage, the internal high-voltage current source turns off to block HV current flow and the IC monitors the HV voltage. Upon removing the AC voltage, the IC turns on the high-voltage current source after about 32 TIMER cycles to discharge the X-cap. The first discharge duration is 16 cycles, then the IC turns off the current source for 16 cycles to detect the presence of the AC line. If the AC input remains disconnected, the IC turns on the current source for 48 cycles, then off for 16 cycles repeatedly until the voltage on X-cap drops to VCC. Upon detecting an AC input, the high-voltage current source remains off until VCC www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 16 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION drops to VCCPRO (5.3V) before recharging VCC to restart the system. Figure 9 shows the discharge function waveforms. This approach provides a discharge path for the X-cap, eliminating discharge resistors and reduce power loss. Clamped Driver The DRV voltage is safely clamped at 13.4V when VCC exceeds 16V, allowing the use of any standard MOSFET. Leading-Edge Blanking An internal leading-edge blanking (LEB) unit containing two LEB times is employed between the CS pin and the current comparator input to avoid premature switching pulse termination due to the parasitic capacitances. During the blanking time, the current comparator is disabled and can not turn off the external MOSFET. Figure 10 shows the LEB waveform. Figure 10: Leading-Edge Blanking HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 17 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION APPLICATION INFORMATION VCC Capacitor Selection Input 85~265Vac D1 Figure 12: Typical Primary-Current Waveform D2 The input power (Pin) at the minimum input can be estimated as R1 1 8 HV Pin 2 HFC0400 GND 3 6 4 5 VCC C1 * Figure 11: Start-Up Circuit Figure 11 shows the start-up circuit. The values of R1 and C1 determine the system start-up delay time: a larger R1 or C1 increases the startup delay. The VCC duration (from VCC,OFF to VCC,SS) for brown-out detection should exceed half the input period, equation (4) provides an estimated value for the VCC capacitor, where ICC(noswitch) is the internal consumption (close to ICClatch), and τinput is period of the AC input. For most applications, chose a VCC capacitor value that exceeds 10µF. CVCC ICC(noswitch) 0.5 input VCCOFF VCCSS (4) Primary-Side Inductor Design (Lm) With build-in slope compensation, HFC0400 supports CCM when the duty cycle exceeds 50%. Set a ratio (KP) of the primary inductor’s ripple current amplitude vs. the peak current value to 0<KP1, where KP=1 for DCM. Figure 12 shows the relevant waveforms. A larger inductor leads to a smaller KP leads, which can reduce RMS current but increase transformer size. An optimal KP value is between 0.6 and 0.8 for the universal input range and 0.8 to 1 for a 230VAC input range. HFC0400 Rev. 1.0 11/28/2012 VO IO (5) Where VO is the output voltage, IO is the rated output current, is the estimated efficiency. Generally, η is between 0.75 and 0.85 depending on the input range and output application. For CCM at minimum input, the converter duty cycle is: D (VO VF ) N (VO VF ) N Vin(min) (6) Where: VF is the secondary diode’s forward voltage, N is the transformer turn ratio, and Vin(min) is the minimum voltage on bulk capacitor. The MOSFET turn-on time is on D s (7) Where τs is the frequency jitter’s dominant switching period, 1 fs 65kHz . s The average, peak, ripple and valley values of the primary current are described as follows: Iav Ipeak Pin Vin(min) Iav K (1 P ) D 2 (8) (9) Iripple K P Ipeak (10) Ivalley (1 K P ) Ipeak (11) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 18 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION The following equation estimates Lm as Lm Vin(min) on Iripples I I 2 1 Psense peak valley Ipeak Ivalley D Rsense 2 12 (15) 2 (12) Low-Pass Filter on CS Pin Current-Sense Resistor DRV HFC0400 Rseries Rsense Figure 14: Low-Pass Filter on CS Pin A small capacitor connected to the CS pin with Rseries forms a low-pass filter for noise filtering when the MOSFET turns on and off, as shown in Figure 14. The series resistance (Rseries) should not exceed 1k. The low-pass filter’s R×C constant should not exceed 1/3 of the leadingedge blanking period for SCP (LEB2, 270ns), or the filtered sensed voltage won’t reach the SCP point (1.5V) to trigger SCP if an output short circuit occurs. b) Typical Waveform Figure 13: Peak-Current Comparator Figure 13 shows the peak-current-comparator logic and the subsequent waveform. When the sum of the sensing resistor voltage and the slope compensator reaches Vpeak, the comparator goes HIGH to reset the RS flip-flop, and the DRV pin is pulled down to turn off the MOSFET. The maximum current limit (Vlimit, as measured by VCS) is 0.95V. The slope compensator (Vslope) is ~25mV/µs. Given the margin, use 0.95×Vlimit as Vpeak at full load. The voltage on sensing resistor is then: (13) So the value of the sense resistor is Rsense Vsense Ipeak Cf Low-pass Filter a) Peak-Current-Comparator Circuit Vsense 95% Vlim it Vslope on CS (14) Jitter Period Frequency jitter is an effective method to reduce EMI by dissipating energy. The nth-order harmonic noise bandwidth is BTn n (2 f fjitter ) , where f is the frequency jitter amplitude. If BTn exceeds the resolution bandwidth (RBW) of the spectrum analyzer (200Hz for noise frequency less than 150 kHz, 9 kHz for noise frequency between 150kHz to 30MHz), the spectrum analyzer receives less noise energy. The capacitor on the TIMER pin determines the period of the frequency jitter. A 10µA current source charges the capacitor; when the TIMER voltage reaches 3.2V, another 10µA current Select the current sense resistor with an appropriate power rating based on the power loss: HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 19 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION source discharges the capacitor to 2.8V. This charging and discharging cycle repeats. Equation (2) describes the jitter period In theory, a smaller fjitter is more effective at EMI reduction. However, the measurement bandwidth requires that fjitter should be large compared to spectrum analyzer RBW for effective EMI reduction. Also, fjitter should be less than the control-loop-gain crossover frequency to avoid disturbing the output voltage regulation. So for most applications, select fjitter between 200Hz and 400Hz. X-Cap Discharge Time Figure 9 shows the X-cap discharger waveforms. The maximum discharge time occurs at a highline input and under no-load because the energy on X-cap dissipates but won’t transfer to the bulk capacitor. The maximum discharge delay time is delay 32 jitter (16) When the high-voltage current source turns on, a constant supply current (IHV, 1.6mA typically) flows into HV. The current-source discharge time for the X-cap to drop to 37% of peak voltage can be estimated by: discharge C X 63% 2 Vac(max) IHV (17) The total discharge time is relative to τjitter. For example, if CTIMER is 47nF and τjitter=3.7ms, the Xcap discharge margin is 1s due to X-cap value deviations (around 10% typically), select an Xcap less than 3.3μF. Though the X-cap has been discharged, it may still retain a high-voltage on the bulk capacitor. For safety, make sure it is released before the debugging the board. PCB Layout Guide PCB layout is important to achieve reliable operation, good EMI performance, and good thermal performance. Follow these guidelines to optimize performance. 1) Minimize the power stage switching stage loop area. This includes the input loop (C1 T1 - Q1 – R12/R13 – C1), the auxiliary winding loop (T1 – D4 – R4 – C3 – T1), and the output loop (T1 – D6 – C10 – T1 and T1 – D7 – C14 – T1). 2) The input loop GND and control circuit should be separate and only connect at C1. 3) Connecting the Q1 heatsink to the primary GND plane improves EMI. 4) Place the control circuit capacitors (such as those for FB, CS and VCC pins) close to IC to decouple noise. Where CX is the X-cap capacitance, Vac(max) is the maximum AC-input RMS value. The first discharging period is 16×τjitter, with subsequent period equal to 48×τjitter. The sections times approximately eequals: n discharge 16 jitter 48 jitter 1 (18) Rounding n determins the number of detecting sections, as every section is 16×τjitter, the detecting time is shown as follow: Tdetect 16 jitter n (19) As a result, the total discharge time is then. total delay discharge detect HFC0400 Rev. 1.0 11/28/2012 (20) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 20 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION Design Example Below is a design example of HFC0400 for dualoutput applications. Table 1—Design Spec. VIN VOUT1 IOUT1 VOUT2 IOUT2 85 to 265VAC 5V 3A 16V 1.5A a) Top b) Bottom Figure 15: PCB Layout Typical Application Circuit Figure 16: Example of a Typical Application HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 21 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION a) Connection Diagram b) Winding Diagram Figure 17: Transformer Structure Table 2—Winding Order Tape (T) Winding Margin Wall PRI side Terminal Start—>End Margin Wall SEC side Wire Size (φ) Turns ( T ) N1 2mm 3—>2 2mm 0.27mm*2 28 N6 2mm 1—>NC 2mm 0.3mm*1 20 N4 2mm 7,8—>9,10 2mm 0.33mm*12 3 N3 2mm 2mm 0.33mm*5 6 1 N2 2mm 5—>6 2mm 0.27mm*1 9 2 N5 2mm 2—>1 2mm 0.27mm*2 29 1 1 3 1 3 HFC0400 Rev. 1.0 11/28/2012 11,12—>7,8 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 22 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION FLOW CHART Start Y Internal High Voltage Current Source ON Shut Down Internal High Voltage Current Source Y Vcc>14.5V Vcc Decrease to 5.3V N Shut off the Switching Pulse Y Y OTP= Logic High? Y Vcc<8.0V Vcc<11.5V N Vcc<2.5V? Latch off the Switching Pulse N N Y Y Y VCC>25V Thermal Monitor N VTIMER <1V N N N Monitor VTIMER after VTIMER>1.0V VHV>HVON Y Monitor VHV Soft Start Monitor Vcc Y Monitor VCOMP VFB<0.32V 0.3V<VFB<3.0V Y Y Normal Operation Switch Off N VFB>0.46V Y Timer recharge 17 times and Fault=Logic High Y N Continuous Fault Monitor VFB>3.7V Y OLP=Logic High Internal High Voltage Current Source ON Switch Off Fault=Logic High Brown-out =Logic High Y Timer recharge 17 times Y Y VHV<HVOFF Input unplugged from Line UVLO, brown-out, OTP & OLP is auto restart, OVP on VCC and Latch-off on TIMER are latch mode Release from the latch condition, need to unplug from the main input. Figure 18: Control Flow Chart HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 23 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION EVOLUTION OF THE SIGNALS IN PRESENCE OF FAULTS Vcc Start up Regulation Occurs Here Over Voltage Occurs Here 14.5V 11.5V Unplug from main input Normal Operation Normal Operation Normal Operation Unplug from main input Re-plug to main input 8.0V 5.3V Driver Pluses Driver Driver Pluses High voltage current source On Off Fault Flag HV Normal Brown-out Fault Operation Occurs Here Normal Operation OVP Fault Occurs Here Normal Operation OLP Fault Occurs Here Normal Operation OTP Fault Occurs Here Normal Operation X-cap Discharge Occurs Here Normal Operation HVON HVOFF Figure 19: Signal Evolution in the Presence of Faults HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 24 HFC0400 – FIXED-FREQUENCY FLYBACK CONTROLLER WITH ULTRA-LOW NO LOAD POWER CONSUMPTION PACKAGE INFORMATION SOIC8-7A 0.189(4.80) 0.197(5.00) 8 0.050(1.27) 0.024(0.61) 5 0.063(1.60) 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.213(5.40) 4 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.013(0.33) 0.020(0.51) 0.050(1.27) BSC 0.0075(0.19) 0.0098(0.25) SEE DETAIL "A" SIDE VIEW FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0o-8o 0.016(0.41) 0.050(1.27) DETAIL "A" NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) JEDEC REFERENCE IS MS-012. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. HFC0400 Rev. 1.0 11/28/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 25