LT3790 - 60V Synchronous 4-Switch Buck-Boost Controller

LT3790
60V Synchronous 4-Switch
Buck-Boost Controller
FEATURES
DESCRIPTION
4-Switch Single Inductor Architecture Allows VIN
Above, Below or Equal to VOUT
nn Synchronous Switching: Up to 98.5% Efficiency
nn Wide V Range: 4.7V to 60V
IN
nn 2% Output Voltage Accuracy: 1.2V ≤ V
OUT < 60V
nn 6% Output Current Accuracy: 0V ≤ V
OUT < 60V
nn Input and Output Current Regulation with Current
Monitor Outputs
nn No Top FET Refresh in Buck or Boost
nn V
OUT Disconnected from VIN During Shutdown
nn C/10 Charge Termination and Output Shorted Flags
nn Capable of 100W or Greater per IC
nn Easy Parallel Capability to Extend Output Power
nn 38-Lead TSSOP with Exposed Pad
The LT®3790 is a synchronous 4-switch buck-boost voltage/current regulator controller. The LT3790 can regulate
output voltage, output current, or input current with input
voltages above, below, or equal to the output voltage. The
constant-frequency, current mode architecture allows its
frequency to be adjusted or synchronized from 200kHz
to 700kHz. No top FET refresh switching cycle is needed
in buck or boost operation. With 60V input, 60V output
capability and seamless transitions between operating
regions, the LT3790 is ideal for voltage regulator, battery/super-capacitor charger applications in automotive,
industrial, telecom, and even battery-powered systems.
nn
The LT3790 provides input current monitor, output current
monitor, and various status flags, such as C/10 charge
termination and shorted output flag.
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Automotive, Telecom, Industrial Systems
nn High Power Battery-Powered System
nn
TYPICAL APPLICATION
120W (24V 5A) Buck-Boost Voltage Regulator
0.003Ω
VIN
1µF
51Ω
IVINP
0.1µF
TG1
0.1µF
EN/UVLO
SWI
OVLO
56.2k
BG1
INTVCC
27.4k
100k
LT3790
200k
47µF
80V
220µF
35V
0.009Ω
4.7µF
50V
×2
3.83k
SNSN
PGND
RT
3.3k
33nF
33nF
SGND
95
90
85
80
75
VIN = 12V
VIN = 24V
VIN = 54V
65
SW2
CTRL SS SYNC V
C
100
70
BG2
TG2
ISP
ISN
FB
Efficiency vs Load Current
VOUT
24V
5A
73.2k
10µH
0.004Ω
PWM
100k
+
SNSP
SHORT
C/10
CCM
IVINMON
ISMON
CLKOUT
PWMOUT
VREF
0.1µF
+
BST1
499k
4.7µF
100V
4.7µF
BST2
IVINN
470nF
499k
INTVCC
EFFICIENCY (%)
VIN
12V TO
58V
60
0
1
2
3
LOAD CURRENT (A)
4
5
3790 TA01b
3790 TA01a
147k
200kHz
3790fa
For more information www.linear.com/LT3790
1
LT3790
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltages
Input Supply (VIN)......................................................60V
SW1, SW2...................................................... –5V to 60V
C/10, SHORT..............................................................15V
EN/UVLO, IVINP, IVINN, ISP, ISN...............................60V
INTVCC, (BST1-SW1), (BST2-SW2)..............................6V
CCM, SYNC, RT, CTRL, OVLO, PWM...........................6V
IVINMON, ISMON, FB, SS, VC, VREF............................6V
IVINP-IVINN, ISP-ISN, SNSP-SNSN........................±0.5V
SNSP, SNSN............................................................±0.3V
Operating Junction Temperature (Notes 2, 3)
LT3790E/LT3790I............................... –40°C to 125°C
LT3790H............................................. –40°C to 150°C
LT3790MP.......................................... –55°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
PIN CONFIGURATION
TOP VIEW
CTRL
1
38 OVLO
SS
2
37 FB
PWM
3
36 VC
C/10
4
35 RT
SHORT
5
34 SYNC
VREF
6
33 CLKOUT
ISMON
7
32 CCM
IVINMON
8
31 PWMOUT
EN/UVLO
9
IVINP 10
30 SGND
39
SGND
29 TEST1
IVINN 11
28 SNSN
VIN 12
27 SNSP
INTVCC 13
26 ISN
TG1 14
25 ISP
BST1 15
24 TG2
SW1 16
23 NC
PGND 17
22 BST2
BG1 18
21 SW2
BG2 19
20 PGND
FE PACKAGE
38-LEAD PLASTIC TSSOP
θJA = 28°C/W
EXPOSED PAD (PIN 39) IS SGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3790EFE#PBF
LT3790EFE#TRPBF
LT3790FE
38-Lead Plastic TSSOP
–40°C to 125°C
LT3790IFE#PBF
LT3790IFE#TRPBF
LT3790FE
38-Lead Plastic TSSOP
–40°C to 125°C
LT3790HFE#PBF
LT3790HFE#TRPBF
LT3790FE
38-Lead Plastic TSSOP
–40°C to 150°C
LT3790MPFE#PBF
LT3790MPFE#TRPBF
LT3790FE
38-Lead Plastic TSSOP
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input
VIN Operating Voltage
4.7
60
V
VIN Shutdown IQ
VEN/UVLO = 0V
0.1
1
µA
VIN Operating IQ (Not Switching)
FB = 1.3V, RT = 59.0k
3.0
4
mA
2
3790fa
For more information www.linear.com/LT3790
LT3790
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
1.16
1.2
1.24
UNITS
Logic Inputs
EN/UVLO Falling Threshold
l
EN/UVLO Rising Hysteresis
15
EN/UVLO Input Low Voltage
IVIN Drops Below 1µA
EN/UVLO Pin Bias Current Low
VEN/UVLO = 1V
EN/UVLO Pin Bias Current High
VEN/UVLO = 1.6V
2
CCM Threshold Voltage
0.3
V
3
4
µA
10
100
nA
1.5
V
0.3
CTRL Input Bias Current
VCTRL = 1V
CTRL Latch-Off Threshold
Rising
45
CTRL Latch-Off Hysteresis
20
50
nA
50
55
mV
13
OVLO Rising Shutdown Voltage
l
2.85
OVLO Falling Hysteresis
V
mV
3
mV
3.15
75
V
mV
Regulation
VREF Voltage
VREF Line Regulation
4.7V < VIN < 60V
V(ISP-ISN) Threshold
VCTRL = 2V, VISP = 12V/0.1V
l
1.96
2.00
2.04
V
l
58
56
0.002
0.04
%/V
60
60
62
64
mV
mV
l
48
46
50
50
52
54
mV
mV
l
28
26
30
30
32
34
mV
mV
l
1
0.2
4.2
4.2
7.4
8.2
mV
mV
VCTRL = 1V, VISP = 12V/0.1V
VCTRL = 600mV, VISP = 12V/0.1V
VCTRL = 100mV, VISP = 12V/0.1V
ISP Bias Current
ISN Bias Current
VISP = 12V, VISN = 11.9V
VISP = 12V, VISN = 11.9V
110
µA
20
Output Current Sense Common Mode Range
0
Output Current Sense Amplifier gm
µA
60
1650
V
µS
ISMON Monitor Voltage
V(ISP-ISN) = 60mV
l
1.14
Input Current Sense Threshold V(IVINP-IVINN)
3V ≤ VIVINP ≤ 60V
l
46.5
IVINP Bias Current
VIVINP = VIVINN = 12V
90
µA
IVINN Bias Current
VIVINP = VIVINN = 12V
20
µA
Input Current Sense Common Mode Range
50
54
60
2.12
V(IVINP-IVINN) = 50mV
1
1.04
V
l
1.2
1.2
1.206
1.220
V
V
0.002
0.025
%/V
565
VC Standby Input Bias Current
PWM = 0V
VSENSE(MAX) (VSNSP-SNSN)
Boost
Buck
V
mS
0.96
FB Amplifier gm
FB in Regulation
mV
1.194
1.176
4.7V < VIN < 60V
FB Pin Input Bias Current
V
l
FB Regulation Voltage
FB Line Regulation
1.26
3
Input Current Sense Amplifier gm
IVINMON Monitor Voltage
1.2
200
20
nA
51
–47.5
60
–39
mV
mV
–20
l
l
42
–56
µS
100
nA
Fault
SS Pull-Up Current
VSS = 0V
SS Discharge Current
14
µA
1.4
µA
3790fa
For more information www.linear.com/LT3790
3
LT3790
ELECTRICAL
CHARACTERISTICS
The
l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted.
PARAMETER
CONDITIONS
C/10 Falling Threshold (V(ISP-ISN))
VFB = 1.2V
MIN
TYP
MAX
UNITS
1
5
9
mV
380
400
450
mV
C/10 Pin Output Impedance
1.1
2.0
kΩ
SHORT Pin Output Impedance
1.1
2.0
kΩ
SS Latch-Off Threshold
1.75
V
SS Reset Threshold
0.2
V
SHORT Falling Threshold (VFB)
Oscillator
Switching Frequency
RT = 147k
RT = 59.0k
RT = 29.1k
190
380
665
SYNC Frequency
200
400
700
200
SYNC Pin Resistance to GND
210
420
735
kHz
kHz
kHz
700
kHz
90
SYNC Threshold Voltage
0.3
kΩ
1.5
V
Internal VCC Regulator
INTVCC Regulation Voltage
Dropout (VIN – INTVCC)
4.8
IINTVCC = –10mA, VIN = 5V
INTVCC Undervoltage Lockout
INTVCC Current Limit
3.1
VINTVCC = 4V
5
5.2
V
240
350
mV
3.5
3.9
V
67
mA
PWM
PWM Threshold Voltage
0.3
1.5
V
PWM Pin Resistance to GND
90
kΩ
PWMOUT Pull-Up Resistance
10
20
Ω
PWMOUT Pull-Down Resistance
5
10
Ω
NMOS Drivers
TG1, TG2 Gate Driver On-Resistance
Gate Pull-Up
Gate Pull-Down
VBST – VSW = 5V
BG1, BG2 Gate Driver On-Resistance
Gate Pull-Up
Gate Pull-Down
VINTVCC = 5V
TG Off to BG On Delay
CL = 3300pF
2.6
1.7
Ω
Ω
3
1.2
Ω
Ω
60
ns
BG Off to TG On Delay
CL = 3300pF
60
TG1, TG2, tOFF(MIN)
RT = 59.0k
240
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3790E is guaranteed to meet performance from 0°C
to 125°C junction temperature. Specification over the -40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls.
The LT3790I is guaranteed to meet performance specifications over the
–40°C to 125°C operating junction temperature range. The LT3790H is
guaranteed to meet performance specifications over the –40°C to 150°C
4
ns
320
ns
operating junction temperature range. The LT3790MP is guaranteed to
meet performance specifications over the –55°C to 150°C operating
junction temperature range. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated for junction temperatures greater
than 125°C.
Note 3: The LT3790 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified absolute maximum operating junction temperature may
impair device reliability.
3790fa
For more information www.linear.com/LT3790
LT3790
TYPICAL PERFORMANCE CHARACTERISTICS
INTVCC Dropout Voltage
vs Current, Temperature
VIN-VINTVCC (V)
90
5.20
TA = 150°C
TA = 25°C
TA = –50°C
2.0
INTVCC Current Limit
vs Temperature
INTVCC Voltage vs Temperature
80
5.15
INTVCC CURRENT LIMIT (mA)
2.5
TA = 25°C, unless otherwise noted.
5.10
INTVCC (V)
1.5
1.0
5.05
VIN = 60V
5.00
VIN = 12V
4.95
4.90
0.5
4.85
0
20
10
0
30
LDO CURRENT (mA)
0
3790 G01
50
40
30
20
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
VREF Voltage vs Temperature
VREF Load Regulation
5.75
2.03
2.15
5.50
2.02
2.10
5.25
2.01
2.05
2.00
4.75
1.99
4.50
1.98
4.25
0
10
20
30
40
50
60
0
1.85
1.80
25 50 75 100 125 150
TEMPERATURE (°C)
V(ISP-ISN) Threshold vs VCTRL
70
VIN = 12V
68 VCTRL = 2V
66
66
64
64
V(ISP-ISN) (mV)
V(ISP-ISN) (mV)
68
62
60
58
56
20
10
RISING
FALLING
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VCTRL (V)
3790 G07
100 150 200 250 300 350 400
IREF (µA)
V(ISP-ISN) Threshold
vs Temperature
70
30
50
3790 G06
V(ISP-ISN) Threshold vs VISP
40
0
3790 G05
50
V(ISP-ISN) (mV)
VIN = 60V
VIN = 12V
VIN = 4.7V
3790 G04
60
0
1.90
1.96
–50 –25
70
2.00
1.95
1.97
ILOAD (mA)
70
VREF (V)
2.20
VREF (V)
2.04
4.00
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G03
6.00
5.00
0
3790 G02
INTVCC Load Regulation
INTVCC (V)
60
10
4.80
–50 –25
40
70
62
60
58
56
54
54
52
52
50
0
10
20
40
30
VISP (V)
60
50
3790 G08
50
–50 –25
VISP = 60V
VISP = 12V
VISP = 0V
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G09
3790fa
For more information www.linear.com/LT3790
5
LT3790
TYPICAL PERFORMANCE CHARACTERISTICS
72
V(ISP-ISN) Threshold vs VFB
TA = 25°C, unless otherwise noted.
ISMON Voltage vs Temperature
1.24
VIN = 12V
V(ISP-ISN) = 60mV
1.23
60
1.2
ISMON Voltage vs V(ISP-ISN)
1.0
36
24
0.8
1.21
VISMON (V)
48
VISMON (V)
V(ISP-ISN) (mV)
1.22
1.20
1.19
0.6
0.4
1.18
12
0
1.17
1.19
1.18
1.20 1.21
VFB (V)
1.22
1.16
–50 –25
1.23
0
3790 G10
V(IVINP-IVINN) Threshold
vs VIVINP
54
51.5
1.03
51.0
1.02
50.5
1.01
VIVINP = 60V
50
VIVINP = 3V
48
46
42
–50 –25
0
50.0
49.5
48.5
0.97
0
10
20
40
VIVINP (V)
50
50
40
0.500
1.23
0.475
1.22
0.450
VFB (V)
1.20
1.18
0
1.17
1.19
1.20 1.21
VFB (V)
1.22
1.23
3790 G16
1.16
–50 –25
RISING
0.425
0.400
FALLING
0.375
0.350
VIN = 60V
VIN = 12V
VIN = 4.7V
1.17
1.18
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G15
1.24
1.19
10
3790 G12
SHORT Threshold
vs Temperature
1.21
20
0
3790 G14
FB VOLTAGE (V)
60
60
VIVINP = 12V
V(IVINP-VINN) = 50mV
0.96
–50 –25
60
FB Regulation Voltage
vs Temperature
V(IVINP-IVINN) Threshold vs VFB
V(IVINP-IVINSN) (mV)
30
50
0.99
0.98
3790 G13
30
20
30
40
V(ISP-ISN) (mV)
10
1.00
49.0
48.0
25 50 75 100 125 150
TEMPERATURE (°C)
VIVINMON (V)
1.04
V(IVINP-IVINN) (mV)
52.0
52
0
IVINMON Voltage vs Temperature
56
44
6
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G11
V(IVINP-IVINN) Threshold
vs Temperature
V(IVINP-IVINN) (mV)
0.2
1.17
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G17
0.325
0.300
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G18
3790fa
For more information www.linear.com/LT3790
LT3790
TYPICAL PERFORMANCE CHARACTERISTICS
16
3.2
14
RISING
FALLING
12
3.0
10
2.5
8
2.8
6
2.7
4
2.5
–50 –25
0
1.0
DISCHARGING
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
3790 G20
EN/UVLO THRESHOLD (V)
3
2
1
1.26
1.24
1.22
RISING
1.20
1.18
FALLING
1.16
1.14
1.10
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
TG1, TG2 MINIMUM OFF-TIME (ns)
TG1, TG2 MINIMUM ON-TIME (ns)
70
60
50
40
30
20
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G26
3790 G22
RT = 59.0k
400
300
RT = 147k
200
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G25
V(BST1-SW1), V(BST2-SW2) UVLO
vs Temperature
350
TG1
60
RT = 29.1k
500
TG1, TG2 Minimum Off-Time
vs Temperature
TG2
80
50
3790 G24
TG1, TG2 Minimum On-Time
vs Temperature
90
40
600
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G23
100
30
VIN (V)
100
1.12
0
20
700
3.9
300
3.8
fSW = 200kHz
250
V(BST1-SW1), V(BST2-SW2) (V)
EN/UVLO PIN CURRENT (µA)
7
4
10
800
1.28
5
0
Oscillator Frequency
vs Temperature
1.30
VEN/UVLO = 1V
0
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
EN/UVLO Threshold Voltage
6
TA = 150°C
TA = 25°C
TA = –50°C
0.5
3790 G21
EN/UVLO Pin Current
8
2.0
1.5
2
2.6
3.5
CHARGING
SWITCHING FREQUENCY (kHz)
2.9
4.0
IQ (mA)
3.1
3.0
Supply Current vs Input Voltage
Soft-Start Current vs Temperature
3.3
ISS (µA)
OVLO THRESHOLD (V)
OVLO Threshold vs Temperature
TA = 25°C, unless otherwise noted.
fSW = 400kHz
200
fSW = 700kHz
150
100
50
0
–50 –25
RISING
3.7
3.6
3.5
3.4
FALLING
3.3
3.2
0
25
50
75
100 125 150
TEMPERATURE (°C)
3790 G27
3.1
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G28
3790fa
For more information www.linear.com/LT3790
7
LT3790
TYPICAL PERFORMANCE CHARACTERISTICS
BG1, BG2 Driver On-Resistance
vs Temperature
TG1, TG2 Driver On-Resistance
vs Temperature
4.0
14
3.5
3.0
2.5
2.0
PULL-DOWN
1.5
1.0
12
PWMOUT RESISTANCE (Ω)
TG1, TG2 RESISTANCE (Ω)
PULL-UP
3.5
PULL-UP
3.0
2.5
PULL-DOWN
2.0
1.5
1.0
0
–50 –25
0
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
6
0
V(SNSP-SNSN) (mV)
BG2
1.0
BG1
0.8
0.6
40
60
DUTY CYCLE (%)
80
60
40
40
20
0
–20
–60
100
0.6
0.8
3790 G32
1.0
1.2
VC (V)
1.4
1.6
40
V(SNSP-SNSN) THRESHOLD (mV)
V(SNSP-SNSN) (mV)
40
20
0
–20
–40
–60
1.2
VC (V)
1.4
1.6
0
–20
VC(MAX)
–40
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G34
V(SNSP-SNSN) Boost Threshold
vs Temperature
60
1.0
20
3790 G33
60
0.8
VC(MIN)
–60
–50 –25
1.8
V(SNSP-SNSN) Boost Threshold
vs VC
–80
0.6
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G31
60
–40
0.2
20
0
V(SNSP-SNSN) Buck Threshold
vs Temperature
0.4
0
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
V(SNSP-SNSN) THRESHOLD (mV)
V(SNSP-SNSN) = 0V
1.2
PULL-DOWN
4
V(SNSP-SNSN) Buck Threshold
vs VC
1.4
8
8
3790 G30
VC Voltage vs Duty Cycle
1.6
PULL-UP
2
3790 G29
0
10
0.5
0.5
VC (V)
PWMOUT On-Resistance
vs Temperature
4.0
4.5
BG1, BG2 RESISTANCE (Ω)
TA = 25°C, unless otherwise noted.
1.8
VC(MAX)
20
0
–20
–40
–60
–80
–50 –25
3790 G35
VC(MIN)
0
25 50 75 100 125 150
TEMPERATURE (°C)
3790 G36
3790fa
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LT3790
PIN FUNCTIONS
CTRL (Pin 1): Output Current Sense Threshold Adjustment
Pin. Regulating threshold V(ISP-ISN) is 1/20th of VCTRL.
CTRL linear range is from 0V to 1.1V. For VCTRL > 1.3V,
the current sense threshold is constant at the full-scale
value of 60mV. For 1.1V < VCTRL < 1.3V, the dependence of
the current sense threshold upon VCTRL transitions from
a linear function to a constant value, reaching 98% of full
scale by VCTRL = 1.2V. Connect CTRL to VREF for the 60mV
default threshold. Force less than 50mV (typical) to stop
switching. Do not leave this pin open.
EN/UVLO (Pin 9): Enable Control Pin. Forcing an accurate
1.2V falling threshold with an externally programmable
hysteresis is generated by the external resistor divider
and a 3µA pull-down current. Above the 1.2V (typical)
threshold (but below 6V), EN/UVLO input bias current is
sub-µA. Below the falling threshold, a 3µA pull-down current is enabled so the user can define the hysteresis with
the external resistor selection. An undervoltage condition
resets soft-start. Tie to 0.3V, or less, to disable the device
and reduce VIN quiescent current below 1µA.
SS (Pin 2): Soft-start reduces the input power sources
surge current by gradually increasing the controller’s current limit. A minimum value of 22nF is recommended on
this pin. A 100k resistor must be placed between SS and
VREF for the LT3790.
IVINP (Pin 10): Positive Input for the Input Current Limit
and Monitor. Input bias current for this pin is typically 90µA.
PWM (Pin 3): A signal low turns off switches, idles switching and disconnects the VC pin from all external loads. The
PWMOUT pin follows the PWM pin. PWM has an internal
90k pull-down resistor. If not used, connect to INTVCC.
VIN (Pin 12): Main Input Supply. Bypass this pin to PGND
with a capacitor.
C/10 (Pin 4): C/10 Charge Termination Pin. An open-drain
pull-down on C/10 asserts if V(ISP-ISN) is less than 5mV
(typical). To function, the pin requires an external pull-up
resistor.
SHORT (Pin 5): Output Shorted Pin. An open-drain pulldown on SHORT asserts if FB is less than 400mV (typical)
and V(ISP-ISN) is larger than 5mV (typical). To function,
the pin requires an external pull-up resistor.
VREF (Pin 6): Voltage Reference Output Pin, Typically 2V.
This pin drives a resistor divider for the CTRL pin, either
for output current adjustment or for temperature limit/
compensation of the output load. Can supply up to 200µA
of current.
ISMON (Pin 7): Monitor pin that produces a voltage that
is twenty times the voltage V(ISP-ISN). ISMON will equal
1.2V when V(ISP-ISN) = 60mV. For parallel applications,
tie master LT3790 ISMON pin to slave LT3790 CTRL pin.
IVINMON (Pin 8): Monitor pin that produces a voltage
that is twenty times the voltage V(IVINP-IVINN). IVINMON
will equal 1V when V(IVINP-IVINN) = 50mV.
IVINN (Pin 11): Negative Input for the Input Current Limit
and Monitor. The input bias current for this pin is typically
20µA.
INTVCC (Pin 13): Internal 5V Regulator Output. The driver
and control circuits are powered from this voltage. Bypass
this pin to PGND with a minimum 4.7µF ceramic capacitor.
TG1 (Pin 14): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage equal to INTVCC superimposed on
the switch node voltage SW1.
BST1 (Pin 15): Bootstrapped Driver Supply. The BST1 pin
swings from a diode voltage below INTVCC up to a diode
voltage below VIN + INTVCC.
SW1 (Pin 16): Switch Node. SW1 pin swings from a diode
voltage drop below ground up to VIN.
PGND (Pins 17, 20): Power Ground. Connect these pins
closely to the source of the bottom N-channel MOSFET.
BG1 (Pin 18): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
BG2 (Pin 19): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTVCC.
SW2 (Pin 21): Switch Node. SW2 pin swings from a diode
voltage drop below ground up to VOUT.
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9
LT3790
PIN FUNCTIONS
BST2 (Pin 22): Bootstrapped Driver Supply. The BST2 pin
swings from a diode voltage below INTVCC up to a diode
voltage below VOUT + INTVCC.
NC (Pin 23): No Connect Pin. Leave this pin floating.
TG2 (Pin 24): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage equal to INTVCC superimposed on
the switch node voltage SW2.
ISP (Pin 25): Connection Point for the Positive Terminal
of the Output Current Feedback Resistor.
ISN (Pin 26): Connection Point for the Negative Terminal
of the Output Current Feedback Resistor.
SNSP (Pin 27): The Positive Input to the Current Sense
Comparator. The VC pin voltage and controlled offsets
between the SNSP and SNSN pins, in conjunction with a
resistor, set the current trip threshold.
lows the inductor current to flow negative. When the pin
voltage is less than 0.3V, the part runs in discontinuous
conduction mode and does not allow the inductor current
to flow backward. This pin is only meant to block inductor
reverse current, and should only be pulled low when the
output current is low. This pin must be either connected to
INTVCC (pin 13) for continuous conduction mode across
all loads, or it must be connected to the C/10 (pin 4) with
a pull-up resistor to INTVCC for continuous conduction
mode at heavy load and for discontinuous conduction
mode at light load.
CLKOUT (Pin 33): Clock Output Pin. A 180° out-of-phase
clock is provided at the oscillator frequency to allow for paralleling two devices for extending output power capability.
SNSN (Pin 28): The Negative Input to the Current Sense
Comparator.
SYNC (Pin 34): External Synchronization Input Pin. This
pin is internally terminated to GND with a 90k resistor.
The internal buck clock is synchronized to the rising edge
of the SYNC signal while the internal boost clock is 180°
phase shifted.
TEST1 (Pin 29): This pin is used for testing purposes only
and must be connected to SGND for the part to operate
properly.
RT (Pin 35): Frequency Set Pin. Place a resistor to GND
to set the internal frequency. The range of oscillation is
200kHz to 700kHz.
SGND (Pin 30, Exposed Pad Pin 39): Signal Ground.
All small-signal components and compensation should
connect to this ground, which should be connected to
PGND at a single point. Solder the exposed pad directly
to the ground plane.
VC (Pin 36): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0.7V to 1.9V.
PWMOUT (Pin 31): Buffered Version of PWM Signal for
Driving Output Load Disconnect N-Channel MOSFET. The
PWMOUT pin is driven from INTVCC. Use of a MOSFET
with a gate cutoff voltage higher than 1V is recommended.
CCM (Pin 32): Continuous Conduction Mode Pin. When
the pin voltage is higher than 1.5V, the part runs in fixed
frequency forced continuous conduction mode and al-
10
FB (Pin 37): Voltage Loop Feedback Pin. FB is intended for
constant-voltage regulation. The internal transconductance
amplifier with output VC will regulate FB to 1.2V (typical)
through the DC/DC converter.
OVLO (Pin 38): Overvoltage Input Pin. This pin is used for
OVLO, if OVLO > 3V then SS is pulled low, the part stops
switching and resets. Do not leave this pin open.
3790fa
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LT3790
BLOCK DIAGRAM
26
–
+
A = 20
7
8
9
A1
A = 20 A = 20
12
ISMON_INT
33
INTVCC
REGS
SHDN_INT
A = 24
TSD
IVINMON_INT
BST1
+
A13
A3
EN/UVLO
TG1
SW1
–
–
A4
SHDN_INT
SHDN_INT
SS_RESET
SS LATCH
PWM
+
BG1
PGND
A15
BG2
SLOPE_COMP_BUCK
SYNC
CLKOUT
SW2
+
SHORT
A16
TG2
BST2
–
+
SNSP
+
0.4V
–
SNSN
–
FB
A5
+
C/10
A11
+
0.1V
Q
R
S
VREF
0.2V
A8
A6
–
ISMON_INT
17
19
+
SS LATCH
IVINMON_INT
FB
21
24
22
27
28
37
1.2V
A12
SS RESET
–
–
+
14µA
–
+
+
–
ISMON_INT
+
3V
CTRL
1
A9
–
1.75V
INTVCC
PWM
18
BOOST
LOGIC
A10
3
16
INTVCC
RT
SLOPE_COMP_BOOST
4
14
INTVCC
A14
A7
5
15
BUCK
LOGIC
CCM
OSC
34
13
VREF
IVINMON
1.2V
35
6
VIN
IVINN
ISMON
3µA
32
11
IVINP
+
A2
10
ISN
ISP
–
25
A18
A17
PWMOUT
SGND
30, 39
1.4µA
31
–
38
VC
SS
2
OVLO
36
3790 BD
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11
LT3790
OPERATION
The LT3790 is a current mode controller that provides an
output voltage above, equal to or below the input voltage.
The LTC proprietary topology and control architecture uses
a current sensing resistor in buck or boost operation. The
sensed inductor current is controlled by the voltage on
the VC pin, which is the output of the feedback amplifiers
A11 and A12. The VC pin is controlled by three inputs, one
input from the output current loop, one input from the
input current loop, and the third input from the feedback
loop. Whichever feedback input is higher takes precedence,
forcing the converter into either a constant-current or a
constant-voltage mode.
The LT3790 is designed to transition cleanly between
the two modes of operation. Current sense amplifier A1
senses the voltage between the IVINP and IVINN pins and
provides a pre-gain to amplifier A11. When the voltage
between IVINP and IVINN reaches 50mV, the output of A1
provides IVINMON_INT to the inverting input of A11 and
the converter is in constant-current mode. If the current
sense voltage exceeds 50mV, the output of A1 increases
causing the output of A11 to decrease, thus reducing the
amount of current delivered to the output. In this manner
the current sense voltage is regulated to 50mV.
The output current amplifier works similar to the input
current amplifier but with a 60mV voltage instead of
50mV. The output current sense level is also adjustable
by the CTRL pin. Forcing CTRL to less than 1.2V forces
ISMON_INT to the same level as CTRL, thus providing
current-level control. The output current amplifier provides
rail-to-rail operation. Similarly if the FB pin goes above
1.2V the output of A11 decreases to reduce the current
level and regulate the output (constant-voltage mode).
The LT3790 provides monitoring pins IVINMON and ISMON
that are proportional to the voltage across the input and
output current amplifiers respectively.
The main control loop is shut down by pulling the EN/
UVLO pin low. When the EN/UVLO pin is higher than 1.2V,
an internal 14µA current source charges soft-start capacitor CSS at the SS pin. The VC voltage is then clamped a
diode voltage higher than the SS voltage while the CSS is
slowly charged during start-up. This soft-start clamping
prevents abrupt current from being drawn from the input
power supply.
12
The top MOSFET drivers are biased from floating bootstrap capacitors C1 and C2, which are normally recharged
through an external diode when the top MOSFET is turned
off. A unique charge sharing technique eliminates top
FET refresh switching cycle in buck or boost operation.
Schottky diodes across the synchronous switch M4 and
synchronous switch M2 are not required, but they do
provide a lower drop during the dead time. The addition
of the Schottky diode typically improves peak efficiency
by 1% to 2% at 500kHz.
Power Switch Control
Figure 1 shows a simplified diagram of how the four
power switches are connected to the inductor, VIN, VOUT
and GND. Figure 2 shows the regions of operation for the
LT3790 as a function of duty cycle D. The power switches
are properly controlled so the transfer between regions is
continuous. When VIN approaches VOUT, the buck-boost
region is reached.
VOUT
VIN
TG1
M1
L1
SW1
BG1
TG2
M4
M2
SW2
M3
BG2
RSENSE
3790 F01
Figure 1. Simplified Diagram of the Output Switches
DMAX
BOOST
(BG2)
DMIN
BOOST
DMAX
BUCK
(TG1)
DMIN
BUCK
BOOST REGION
BUCK-BOOST REGION
BUCK REGION
M1 ON, M2 OFF
PWM M3, M4 SWITCHES
4-SWITCH PWM
M4 ON, M3 OFF
PWM M2, M1 SWITCHES
3790 F02
Figure 2. Operating Regions vs Duty Cycle
3790fa
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LT3790
OPERATION
Buck Region (VIN > VOUT)
Switch M4 is always on and switch M3 is always off during
this mode. At the start of every cycle, synchronous switch
M2 is turned on first. Inductor current is sensed when
synchronous switch M2 is turned on. After the sensed
inductor current falls below the reference voltage, which
is proportional to VC, synchronous switch M2 is turned off
and switch M1 is turned on for the remainder of the cycle.
Switches M1 and M2 will alternate, behaving like a typical
synchronous buck regulator. The duty cycle of switch M1
increases until the maximum duty cycle of the converter
in buck operation reaches DMAX(BUCK, TG1), given by:
DMAX(BUCK,TG1) = 100% – D(BUCK-BOOST)
where D(BUCK-BOOST) is the duty cycle of the buck-boost
switch range:
D(BUCK-BOOST) = 8%
Figure 3 shows typical buck operation waveforms. If VIN
approaches VOUT, the buck-boost region is reached.
Buck-Boost Region (VIN ~ VOUT)
When VIN is close to VOUT, the controller is in buck-boost
operation. Figure 4 and Figure 5 show typical waveforms in
this operation. Every cycle the controller turns on switches
M2 and M4, then M1 and M4 are turned on until 180° later
when switches M1 and M3 turn on, and then switches
M1 and M4 are turned on for the remainder of the cycle.
Boost Region (VIN < VOUT)
Switch M1 is always on and synchronous switch M2 is
always off in boost operation. Every cycle switch M3 is
turned on first. Inductor current is sensed when synchronous switch M3 is turned on. After the sensed inductor
current exceeds the reference voltage which is proportional
to VC, switch M3 turns off and synchronous switch M4
is turned on for the remainder of the cycle. Switches M3
and M4 alternate, behaving like a typical synchronous
boost regulator.
The duty cycle of switch M3 decreases until the minimum
duty cycle of the converter in boost operation reaches
DMIN(BOOST,BG2), given by:
DMIN(BOOST,BG2) = D(BUCK-BOOST)
where D(BUCK-BOOST) is the duty cycle of the buck-boost
switch range:
D(BUCK-BOOST) = 8%
Figure 6 shows typical boost operation waveforms. If VIN
approaches VOUT, the buck-boost region is reached.
Low Current Operation
The LT3790 is recommended to run in forced continuous
conduction mode at heavy load by pulling the CCM pin
higher than 1.5V. In this mode the controller behaves as
a continuous, PWM current mode synchronous switching regulator. In boost operation, switch M1 is always on,
switch M3 and synchronous switch M4 are alternately
turned on to maintain the output voltage independent
of the direction of inductor current. In buck operation,
synchronous switch M4 is always on, switch M1 and synchronous switch M2 are alternately turned on to maintain
the output voltage independent of the direction of inductor
current. In the forced continuous mode, the output can
source or sink current.
However, reverse inductor current from the output to the
input is not desired for certain applications. For these applications, the CCM pin must be connected to C/10 (pin 4)
with a pull-up resistor to INTVCC (see front page Typical
Application). Therefore, the CCM pin will be pulled lower
than 0.3V for discontinuous conduction mode by the C/10
pin when the output current is low. In this mode, switch
M4 turns off when the inductor current flows negative.
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13
LT3790
OPERATION
M2 + M4
M2 + M4
M1 + M4
M2 + M4
M1 + M4
M1 + M4
3790 F03
Figure 3. Buck Operation (VIN > VOUT)
M1 + M4
M1 + M4
M2 + M4
M1+ M3
M1+ M3
M1 + M4
M1 + M4
M2 + M4
M1+ M3
M2 + M4
M1 + M4
M1 + M4
3790 F04
Figure 4. Buck-Boost Operation (VIN ≤ VOUT)
M1 + M4
M2 + M4
M1 + M3
M1 + M4
M1 + M4
M2 + M4
M1 + M3
M1 + M4
M1 + M4
M2 + M4
M1 + M3
M1 + M4
3790 F05
Figure 5. Buck-Boost Operation (VIN ≥ VOUT)
M1 + M3
M1 + M4
M1 + M3
M1 + M4
M1 + M3
M1 + M4
3790 F06
Figure 6. Boost Operation (VIN < VOUT)
14
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LT3790
APPLICATIONS INFORMATION
The Typical Application on the front page is a basic LT3790
application circuit. External component selection is driven
by the load requirement, and begins with the selection of
RSENSE and the inductor value. Next, the power MOSFETs
are selected. Finally, CIN and COUT are selected. This circuit
can operate up to an input voltage of 60V.
200
180
∆IL/ISENSE(MAX) (%)
160
Programming The Switching Frequency
The RT frequency adjust pin allows the user to program
the switching frequency from 200kHz to 700kHz to optimize efficiency/performance or external component size.
Higher frequency operation yields smaller component
size but increases switching losses and gate driving
current, and may not allow sufficiently high or low duty
cycle operation. Lower frequency operation gives better
performance at the cost of larger external component
size. For an appropriate RT resistor value see Table 1.
An external resistor from the RT pin to GND is required;
do not leave this pin open.
Table 1. Switching Frequency vs RT Value
fOSC (kHz)
RT (kΩ)
200
147
300
84.5
400
59.0
500
45.3
600
35.7
700
29.4
Frequency Synchronization
The LT3790 switching frequency can be synchronized
to an external clock using the SYNC pin. Driving SYNC
with a 50% duty cycle waveform is always a good choice,
otherwise maintain the duty cycle between 10% and 90%.
The falling edge of CLKOUT corresponds to the rising edge
of SYNC thus allowing 2-phase paralleling converters. The
rising edge of CLKOUT turns on switch M3 and the falling
edge of CLKOUT turns on switch M2.
Inductor Selection
The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use
of smaller inductor and capacitor values. The inductor
140
BOOST ∆IL/
ISENSE(MAX) LIMIT
120
100
80
BUCK ∆IL/
ISENSE(MAX) LIMIT
60
40
20
0
50 55 60 65 70 75 80 85 90 95 100
BG1, BG2 DUTY CYCLE (%)
3790 F07
Figure 7. Maximum Peak-to-Peak Ripple vs Duty Cycle
value has a direct effect on ripple current. The maximum
inductor current ripple ΔIL can be seen in Figure 7. This
is the maximum ripple that will prevent subharmonic
oscillation and also regulate with zero load. The ripple
should be less than this to allow proper operation over
all load currents. For a given ripple the inductance terms
in continuous mode are as follows:
LBUCK >
(
)
VOUT • VIN(MAX ) – VOUT •100
f •IOUT(MAX ) • %Ripple • VIN(MAX )
LBOOST >
(
)
VIN(MIN)2 • VOUT – VIN(MIN) •100
f •IOUT(MAX ) • %Ripple • VOUT 2
where:
f is operating frequency
% ripple is allowable inductor current ripple
VIN(MIN) is minimum input voltage
VIN(MAX) is maximum input voltage
VOUT is output voltage
IOUT(MAX) is maximum output load current
For high efficiency, choose an inductor with low core
loss. Also, the inductor should have low DC resistance to
reduce the I2R losses, and must be able to handle the peak
inductor current without saturating. To minimize radiated
noise, use a shielded inductor.
3790fa
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15
LT3790
APPLICATIONS INFORMATION
RSENSE Selection and Maximum Output Current
RSENSE is chosen based on the required output current. The
current comparator threshold sets the peak of the inductor
current in boost operation and the maximum inductor valley
current in buck operation. In boost operation, the maximum
average load current at VIN(MIN) is:
 51mV ∆I  VIN(MIN)
IOUT(MAX _ BOOST) = 
– L  •
R

 SENSE 2  VOUT
where ΔIL is peak-to-peak inductor ripple current. In buck
operation, the maximum average load current is:
The formula has a maximum at VIN = 2VOUT. Note that
ripple current ratings from capacitor manufacturers are
often based on only 2000 hours of life which makes it
advisable to derate the capacitor.
In boost operation, the discontinuous current shifts
from the input to the output, so COUT must be capable
of reducing the output voltage ripple. The effects of ESR
(equivalent series resistance) and the bulk capacitance
must be considered when choosing the right capacitor
for a given output ripple voltage. The steady ripple due to
charging and discharging the bulk capacitance is given by:
 47.5mV ∆I 
IOUT(MAX _ BUCK ) = 
+ L 
R
2 
 SENSE
∆VRIPPLE (BOOST _ CAP ) =
The maximum current sensing RSENSE value for the boost
operation is:
RSENSE(MAX ) =
2 • 51mV• VIN(MIN)
2 •IOUT • VOUT + ∆IL(BOOST) • VIN(MIN)
The maximum current sensing RSENSE value for the buck
operation is:
2 • 47.5mV
RSENSE(MAX ) =
2 •IOUT – ∆IL(BUCK )
The final RSENSE value should be lower than the calculated
RSENSE(MAX) in both the boost and buck operation. A 20%
to 30% margin is usually recommended.
CIN and COUT Selection
In boost operation, input current is continuous. In buck
operation, input current is discontinuous. In buck operation, the selection of input capacitor, CIN, is driven by the
need to filter the input square wave current. Use a low ESR
capacitor sized to handle the maximum RMS current. For
buck operation, the input RMS current is given by:
IRMS = IOUT 2 •D+
16
(
IOUT • VOUT – VIN(MIN)
)
COUT • VOUT • f
∆IL
∆VRIPPLE (BUCK _ CAP ) ≈
8 • f •C
OUT
where COUT is the output filter capacitor.
The steady ripple due to the voltage drop across the ESR
is given by:
ΔVBOOST(ESR) = IOUT • ESR
ΔVBUCK(ESR) = IOUT • ESR
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Output capacitors are also used for stability for the LT3790.
A good starting point for output capacitors is seen in the
Typical Applications circuits. Ceramic capacitors have
excellent low ESR characteristics but can have a high
voltage coefficient and are recommended for applications
less than 100W. Capacitors available with low ESR and
high ripple current ratings, such as OS-CON and POSCAP
may be needed for applications greater than 100W.
∆IL 2
•D
12
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LT3790
APPLICATIONS INFORMATION
Programming VIN UVLO and OVLO
The falling UVLO value can be accurately set by the resistor
divider R1 and R2. A small 3µA pull-down current is active
when the EN/UVLO is below the threshold. The purpose
of this current is to allow the user to program the rising
hysteresis. The following equations should be used to
determine the resistor values:
VIN(UVLO – ) = 1.2 •
When the CTRL pin voltage is between 1.1V and 1.3V the
output current varies with VCTRL, but departs from the
equation above by an increasing amount as VCTRL voltage increases. Ultimately, when VCTRL > 1.3V the output
current no longer varies. The typical V(ISP-ISN) threshold
vs VCTRL is listed in Table 2.
Table 2. V(ISP-ISN) Threshold vs CTRL
R1+R2
R2
VIN(UVLO + ) = 3µA •R1+1.215 •
R1+R2
R2
The rising OVLO value can be accurately set by the resistor divider R3 and R4. The following equations should be
used to determine the resistor values:
R3+R4
R4
R3+R4
VIN(OVLO – ) = 2.925 •
R4
VIN
LT3790
R1
R3
R2
R4
OVLO
EN/UVLO
3790 F08
Figure 8. Resistor Connection to Set VIN UVLO
and OVLO Thresholds
Programming Output Current
The output current is programmed by placing an appropriate value current sense resistor, ROUT, in series with
the output load. The voltage drop across ROUT is (Kelvin)
sensed by the ISP and ISN pins. The CTRL pin should
be tied to a voltage higher than 1.2V to get the full-scale
60mV (typical) threshold across the sense resistor. The
CTRL pin can also be used to adjust the output current,
although relative accuracy decreases with the decreasing
sense threshold. When the CTRL pin voltage is less than
1.1V, the output current is:
IOUT =
VCTRL
ROUT • 20
V(ISP-ISN) (mV)
1.1
54.6
1.15
57
1.2
58.8
1.25
59.7
1.3
60
When VCTRL is higher than 1.3V, the output current is
regulated to:
VIN(OVLO + ) = 3 •
VCTRL (V)
IOUT =
60mV
ROUT
The CTRL pin should not be left open (tie to VREF if not
used). The CTRL pin can also be used in conjunction with
a thermistor to provide overtemperature protection for
the output load, or with a resistor divider to VIN to reduce
output power and switching current when VIN is low.
The presence of a time varying differential voltage signal
(ripple) across ISP and ISN at the switching frequency
is expected. The amplitude of this signal is increased by
high output load current, low switching frequency and/
or a smaller value output filter capacitor. Some level of
ripple signal is acceptable: the compensation capacitor
on the VC pin filters the signal so the average difference
between ISP and ISN is regulated to the user-programmed
value. Ripple voltage amplitude (peak-to-peak) in excess
of 20mV should not cause mis-operation, but may lead
to noticeable offset between the average value and the
user-programmed value.
ISMON
The ISMON pin provides a linear indication of the current
flowing through the output. The equation for VISMON is
V(ISP–ISN) • 20. This pin is suitable for driving an ADC input,
however, the output impedance of this pin is 12.5kΩ so
care must be taken not to load this pin.
3790fa
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17
LT3790
APPLICATIONS INFORMATION
Programming Input Current Limit
Dimming Control
The LT3790 has a standalone current sense amplifier. It
can be used to limit the input current. The input current
limit is calculated by the following equation:
There are two methods to control the current source for
dimming using the LT3790. One method uses the CTRL
pin to adjust the current regulated in the output. A second
method uses the PWM pin to modulate the current source
between zero and full current to achieve a precisely programmed average current. To make PWM dimming more
accurate, the switch demand current is stored on the VC
node during the quiescent phase when PWM is low. This
feature minimizes recovery time when the PWM signal goes
high. To further improve the recovery time a disconnect
switch may be used in the output current path to prevent
the ISP node from discharging during the PWM signal low
phase. The minimum PWM on- or off-time is affected by
choice of operating frequency and external component
selection. The best overall combination of PWM and
analog dimming capabilities is available if the minimum
PWM pulse is at least six switching cycles and the PWM
pulse is synchronized to the SYNC signal.
IIN =
50mV
RIN
For loop stability a lowpass RC filter is needed. For
most applications, a 50Ω resistor and 470nF capacitor
is sufficient.
Table 3
RIN (mΩ)
20
15
12
10
6
5
4
3
2
ILIMIT (A)
2.5
3.3
4.2
5.0
8.3
10.0
12.5
16.7
25
IVINMON
The IVINMON pin provides a linear indication of the current
flowing through the input. The equation for VIVINMON is
V(IVINP-IVINN) • 20. This pin is suitable for driving an ADC
input, however, the output impedance of this pin is 12.5kΩ
so care must be taken not to load this pin.
Programming Output Voltage (Constant Voltage
Regulation)
For a voltage regulator, the output voltage can be set by
selecting the values of R5 and R6 (see Figure 9) according
to the following equation:
R5+R6
VOUT = 1.2 •
R6
VOUT
R5
LT3790
SHORT Pin
The LT3790 provides an open-drain status pin,
SHORT, which pulls low when the FB pin is below
400mV and V(ISP-ISN) is above 5mV. The only time the
FB pin will be below 400mV is during start-up or if the
output is shorted. During start-up the LT3790 ignores
the voltage on the FB pin until the soft-start capacitor
reaches 1.75V. To prevent false tripping after startup, a
large enough soft-start capacitor must be used to allow
the output to get up to approximately 40% to 50% of
the final value.
C/10 Pin
The LT3790 provides an open-drain status pin, C/10,
which pulls low when the voltage across V(ISP-ISN) is less
than 5mV. For battery charger applications with output
current sense and limit, the C/10 provides a C/10 charge
termination flag.
FB
R6
3790 F09
Figure 9. Resistor Connection for Constant Output
Voltage Regulation
18
3790fa
For more information www.linear.com/LT3790
LT3790
APPLICATIONS INFORMATION
Soft-Start
Soft-start reduces the input power sources’ surge currents
by gradually increasing the controller’s current limit (proportional to an internally buffered clamped equivalent of
VC). The soft-start interval is set by the soft-start capacitor
selection according to the following equation
tSS =
1.2V
•C
14µA SS
A 100k resistor must be placed between SS and VREF for
the LT3790. This 100k resistor also contributes the extra
SS charge current. Make sure CSS is large enough when
there is loading during start-up.
Loop Compensation
The LT3790 uses an internal transconductance error amplifier whose VC output compensates the control loop. The
external inductor, output capacitor and the compensation
resistor and capacitor determine the loop stability.
In order to select the power MOSFETs, the power dissipated by the device must be known. For switch M1, the
maximum power dissipation happens in boost operation,
when it remains on all the time. Its maximum power dissipation at maximum output current is given by:
2
I
•V 
PM1(BOOST) =  OUT OUT  • ρ T •RDS(ON)
VIN


where ρT is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
with temperature, typically 0.4%/°C as shown in Figure 10.
For a maximum junction temperature of 125°C, using a
value of ρT = 1.5 is reasonable.
Switch M2 operates in buck operation as the synchronous
rectifier. Its power dissipation at maximum output current
is given by:
PM2(BUCK ) =
VIN – VOUT
•IOUT 2 • ρ T •RDS(ON)
VIN
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor and
capacitor at VC are set to optimize control loop response
and stability. For typical applications, a 22nF or higher
compensation capacitor at VC is needed, and a series resistor should always be used to increase the slew rate on
the VC pin to maintain tighter regulation of output current
during fast transients on the input supply of the converter.
Switch M3 operates in boost operation as the control
switch. Its power dissipation at maximum current is
given by:
Power MOSFET Selections and Efficiency
Considerations
where CRSS is usually specified by the MOSFET manufacturers. The constant k, which accounts for the loss caused
by reverse-recovery current, is inversely proportional to
the gate drive current and has an empirical value of 1.7.
The LT3790 requires four external N-channel power MOSFETs, two for the top switches (switch M1 and M4, shown
in Figure 1) and two for the bottom switches (switch M2
and M3 shown in Figure 1). Important parameters for the
power MOSFETs are the breakdown voltage, VBR(DSS),
threshold voltage, VGS(TH), on-resistance, RDS(ON), reverse
transfer capacitance, CRSS, and maximum current, IDS(MAX).
The drive voltage is set by the 5V INTVCC supply. Consequently, logic-level threshold MOSFETs must be used in
LT3790 applications. If the input voltage is expected to
drop below the 5V, then sub-logic threshold MOSFETs
should be considered.
PM3(BOOST) =
( VOUT – VIN ) • VOUT •I
VIN 2
+ k • VOUT 3 •
OUT
2
• ρ T •RDS(ON)
IOUT
•C
•f
VIN RSS
For switch M4, the maximum power dissipation happens
in boost operation, when its duty cycle is higher than
50%. Its maximum power dissipation at maximum output
current is given by:
2
I

OUT • VOUT 
• 
 • ρ T •RDS(ON)
VIN


For the same output voltage and current, switch M1 has
the highest power dissipation and switch M2 has the lowest power dissipation unless a short occurs at the output.
V
PM4(BOOST) = IN
VOUT
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19
LT3790
APPLICATIONS INFORMATION
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
TJ = TA + P • RTH(JA)
The RTH(JA) to be used in the equation normally includes
the RTH(JC) for the device plus the thermal resistance from
the case to the ambient temperature (RTH(JC)). This value
of TJ can then be compared to the original, assumed value
used in the iterative calculation process.
ρT NORMALIZED ON-RESISTANCE (Ω)
2.0
1.5
1.0
where θJA (in °C/W) is the package thermal impedance.
50
100
0
JUNCTION TEMPERATURE (°C)
150
3790 F10
Figure 10. Normalized RDS(ON) vs Temperature
Optional Schottky Diode (D3, D4) Selection
The Schottky diodes D3 and D4 shown in the Typical Applications section conduct during the dead time between
the conduction of the power MOSFET switches. They
are intended to prevent the body diode of synchronous
switches M2 and M4 from turning on and storing charge
during the dead time. In particular, D4 significantly reduces
reverse-recovery current between switch M4 turn-off and
switch M3 turn-on, which improves converter efficiency
and reduces switch M3 voltage stress. In order for the
diode to be effective, the inductance between it and the
synchronous switch must be as small as possible, mandating that these components be placed adjacently.
INTVCC Regulator
An internal P-channel low dropout regulator produces 5V
at the INTVCC pin from the VIN supply pin. INTVCC powers
the drivers and internal circuitry within the LT3790. The
20
Higher input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maximum junction temperature rating for the LT3790 to be
exceeded. The system supply current is normally dominated
by the gate charge current. Additional external loading of
the INTVCC also needs to be taken into account for the
power dissipation calculations. Power dissipation for the
IC in this case is VIN • IINTVCC, and overall efficiency is
lowered. The junction temperature can be estimated by
using the equations given
TJ = TA + (PD • θJA)
0.5
0
–50
INTVCC pin regulator can supply a peak current of 67mA
and must be bypassed to ground with a minimum of 4.7µF
ceramic capacitor or low ESR electrolytic capacitor. An additional 0.1µF ceramic capacitor placed directly adjacent
to the INTVCC and PGND IC pins is highly recommended.
Good bypassing is necessary to supply the high transient
current required by MOSFET gate drivers.
For example, a typical application operating in continuous
current operation might draw 24mA from a 24V supply:
TJ = 70°C + 24mA • 24V • 28°C/W = 86°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked
operating in continuous mode at maximum VIN.
Top Gate (TG) MOSFET Driver Supply (C1, D1, C2, D2)
The external bootstrap capacitors C1 and C2 connected
to the BST1 and BST2 pins supply the gate drive voltage
for the topside MOSFET switches M1 and M4. When the
top MOSFET switch M1 turns on, the switch node SW1
rises to VIN and the BST1 pin rises to approximately VIN +
INTVCC. When the bottom MOSFET switch M2 turns on, the
switch node SW1 drops low and the bootstrap capacitor
C1 is charged through D1 from INTVCC. When the bottom
MOSFET switch M3 turns on, the switch node SW2 drops
low and the bootstrap capacitor C2, is charged through D2
from INTVCC. The bootstrap capacitors C1 and C2 need to
store about 100 times the gate charge required by the top
MOSFET switch M1 and M4. In most applications a 0.1µF
to 0.47µF, X5R or X7R ceramic capacitor is adequate.
3790fa
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LT3790
APPLICATIONS INFORMATION
Efficiency Considerations
PC Board Layout Checklist
The power efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in circuits produce losses, four main sources
account for most of the losses in LT3790 circuits:
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
1. DC I2R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board
traces and cause the efficiency to drop at high output
currents.
n
2. Transition loss. This loss arises from the brief amount
of time switch M1 or switch M3 spends in the saturated
region during switch node transitions. It depends upon
the input voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss
is significant at input voltages above 20V and can be
estimated from:
Transition Loss ≈ 2.7 • VIN2 • IOUT • CRSS • f
where CRSS is the reverse-transfer capacitance.
3. INTVCC current. This is the sum of the MOSFET driver
and control currents.
4. CIN and COUT loss. The input capacitor has the difficult
job of filtering the large RMS input current to the regulator in buck operation. The output capacitor has the
difficult job of filtering the large RMS output current
in boost operation. Both CIN and COUT are required to
have low ESR to minimize the AC I2R loss and sufficient
capacitance to prevent the RMS current from causing
additional upstream losses in fuses or batteries.
5. Other losses. Schottky diode D3 and D4 are responsible for conduction losses during dead time and light
load conduction periods. Inductor core loss occurs
predominately at light loads. Switch M3 causes reverse
recovery current loss in boost operation.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in the input
current, then there is no change in efficiency.
The PGND ground plane layer should not have any traces
and it should be as close as possible to the layer with
power MOSFETs.
n
Place CIN, switch M1, switch M2 and D1 in one compact
area. Place COUT, switch M3, switch M4 and D2 in one
compact area.
Use immediate vias to connect the components (including the LT3790’s SGND and PGND pins) to the ground
plane. Use several large vias for each power component.
n
Use planes for VIN and VOUT to maintain good voltage
filtering and to keep power losses low.
n
Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. Connect the copper areas to any DC net
(VIN or PGND).
n
Separate the signal and power grounds. All small-signal
components should return to the SGND pin at one point,
which is then tied to the PGND pin close to the sources
of switch M2 and switch M3.
n
Place switch M2 and switch M3 as close to the controller as possible, keeping the PGND, BG and SW traces
short.
n
Keep the high dV/dT SW1, SW2, BST1, BST2, TG1 and
TG2 nodes away from sensitive small-signal nodes.
n
The path formed by switch M1, switch M2, D1 and the
CIN capacitor should have short leads and PC trace
lengths. The path formed by switch M3, switch M4, D2
and the COUT capacitor also should have short leads
and PC trace lengths.
n
The output capacitor (–) terminals should be connected
as close as possible to the (–) terminals of the input
capacitor.
n
Connect the top driver bootstrap capacitor, C1,
closely to the BST1 and SW1 pins. Connect the top
driver bootstrap capacitor, C2, closely to the BST2 and
SW2 pins.
n
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3790fa
21
LT3790
APPLICATIONS INFORMATION
Connect the input capacitors, CIN, and output capacitors,
COUT, closely to the power MOSFETs. These capacitors carry the MOSFET AC current in boost and buck
operation.
n
Route SNSN and SNSP leads together with minimum
PC trace spacing. Avoid sense lines pass through noisy
areas, such as switch nodes. Ensure accurate current
sensing with Kelvin connections at the SENSE resistor.
n
Connect the VC pin compensation network close to the
IC, between VC and the signal ground pins. The capacitor helps to filter the effects of PCB noise and output
voltage ripple voltage from the compensation loop.
n
Connect the INTVCC bypass capacitor, CVCC, close to the
IC, between the INTVCC and the power ground pins. This
capacitor carries the MOSFET drivers’ current peaks. An
additional 0.1µF ceramic capacitor placed immediately
next to the INTVCC and PGND pins can help improve
noise performance substantially.
n
22
Differences Between LT3790 and LT3791-1
The LT3790 is an improved version of the LT3791-1 and
is recommended for use in new designs. Some external
component values may change, but otherwise, the LT3790
is functionally equivalent to the LT3791-1. The differences
between the two products are:
1.The LT3790 has a 60mV (typical) full-scale V(ISP-ISN)
current sense voltage, compared to 100mV (typical) for
the LT3791-1. This change allows lower power current
sense resistors to be used for most applications.
2.The LT3790 CTRL pin linear range is from 0V to 1.1V,
and has a turn-off threshold of 50mV(typical), compared
to a 200mV to 1.1V linear range and 175mV (typical)
turn-off threshold for the LT3791-1. These changes
make it easier to parallel two or more LT3790 ICs for
higher power levels.
3.The LT3790 C/10 pin pulls low when the V(ISP-ISN) voltage
is less than 1/10 full scale, compared to the LT3791-1,
where C/10 pulls low when both V(ISP-ISN) is less than
1/10 full scale and VFB is greater than 1.15V(typical).
Since the C/10 pin is used to allow DCM mode for some
applications, this change ensures that negative current
does not occur at light loads for a broader range of
applications.
3790fa
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LT3790
TYPICAL APPLICATIONS
98% Efficient 60W (12V 5A) Voltage Regulator Runs Down to 3V VIN
RIN
0.003Ω
VIN
3V TO 55V
STARTS UP
ABOVE 5.5V
R7
51Ω
D5
D6
INTVCC
VIN
C3
1µF
BST2
IVINN
IVINP
TG1
M1
SWI
EN/UVLO
BG1
OVLO
R4
57.6k
INTVCC
R9
100k
R10
200k
RFAULT
100k
M2
D4
+
VO
M4
L1, 6.8µH
COUT2
100µF
35V
ROUT
0.009Ω
VOUT
12V
5A
COUT
10µF
25V
×3
R5
73.2k
M3
D3
R6
8.06k
SNSP
RSENSE
0.004Ω
LT3790
SNSN
SHORT
C/10
CCM
IVINMON
PGND
BG2
SW2
TG2
ISP
ISN
FB
ISMON
CLKOUT
PWMOUT
VREF
C8
0.1µF
C2
0.1µF
C1
0.1µF
BST1
R3
1M
R2
576k
CVCC
4.7µF
D1 D2
C7
470nF
R1
866k
CIN
4.7µF
100V
×4
VO
PWM
CTRL
SS SYNC VC
RT
RC
5.1k
CC
22nF
CSS
33nF
SGND
R8
84.5k
300kHz
3790 TA02a
D1, D2: NXP BAT46WJ
D3: IRF 10BQ060
D4: IRF 10BQ040
D5, D6: DIODES INC. BAT46W
L1: WURTH ELEKTRONIK WE-HCI 7443556680
M1, M2: RENASAS RJK0651DPB 60VDS
M3, M4: VISHAY SiR424DP 40VDS
COUT2: SUNCON 35HVT100M
Efficiency vs Load Current
Maximum Output Current vs VIN
100
6
MAXIMUM OUTPUT CURRENT (A)
95
EFFICIENCY (%)
90
85
80
75
70
VIN = 3V
VIN = 6V
VIN = 12V
VIN = 28V
VIN = 48V
65
60
55
50
0
1
2
3
LOAD CURRENT (A)
4
5
5
4
3
2
1
0
3
3790 TA02b
4
5
6
7 8 9 10 20 30 40 50 60
INPUT VOLTAGE (V)
3790 TA02c
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For more information www.linear.com/LT3790
23
LT3790
TYPICAL APPLICATIONS
98% Efficient 240W (24V 10A) Parallel Voltage Regulators
0.003Ω
VIN
12V TO
58V
499k
470nF
499k
IVINP
EN/UVLO
51Ω
IVINN VIN INTVCC
27.4k
BST1
INTVCC1
TG1
M1
SWI
SHORT
VREF
0.1µF
BG1
LT3790
PWM
M2
0.1µF
L1
10µH
VOUT
1V/DIV
4.7µF
50V
×2
0.009Ω
VOUT
24V
10A
M4
51Ω
M3
+
COUT1
220µF
35V
×2
IL2
5A/DIV
IL1
5A/DIV
0.47µF
SNSP
CTRL
VIN = 36V
IOUT = 5A TO 10A
SNSN
PGND
SS
BG2
IVINMON
CLKOUT
ISMON
SYNC
VC
SW2
TG2
ISP
ISN
FB
SGND
RT
Startup Waveform
715k
13.7k
VOUT
5V/DIV
38.3k
VSS
1V/DIV
147k
200kHz
3.3k
33nF
IL1
5A/DIV
IL2
5A/DIV
0.003Ω
VIN
499k
IVINP
EN/UVLO
1µF
IVINN VIN INTVCC
27.4k
BST1
TG1
200k
0.1µF
SHORT
VREF
BG1
LT3790
M6
0.1µF
L2
10µH
4.7µF
50V
×2
0.009Ω
Mismatch Current vs Load Current
M7
51Ω
+
1000pF
0.4
0.3
0.22µF
0.2
0.1
SNSN
PGND
CTRL
IVINMON
ISMON
CLKOUT
SYNC
VC
2.2k
22nF
RT
SW2
TG2
ISP
ISN
FB
SGND
147k
200kHz
0.0
–0.1
BG2
1nF
0.5
COUT2
220µF
35V
×2
0.004Ω
SS
3790 TA03b
VIN = 36V
IOUT = 5A
M8
SNSP
100k
33nF
M5
SWI
PWM
4.7µF
10V
D3 D4
0.1µF
C/10
C2
47µF
80V
1ms/DIV
BST2
INTVCC2
SHORT
+
INTVCC2
CCM
OVLO
56.2k
4.7µF
100V
∆I (A)
499k
470nF
51Ω
3790 TA03a
1ms/DIV
0.004Ω
100k
33nF
4.7µF
10V
D1 D2
0.1µF
C/10
Transient Waveform
C1
47µF
80V
BST2
200k
SHORT
+
INTVCC1
CCM
OVLO
56.2k
4.7µF
100V
1µF
715k
–0.2
–0.3
140k
–0.4
–0.5
38.3k
D1–D4: NXP BAT46WJ
L1, L2: COILCRAFT SER2915L-103KL 10µH
M1, M2, M5, M6: RENESAS RJK0651DPB 60Vds
M3, M4, M7, M8: RENESAS RJK0451DPB 40Vds
COUT1, COUT2: SUNCON 35HVT220M ×2
C1, C2: NIPPON CHEMICON EMZA800ADA470MJAOG
0
2
6
4
LOAD CURRENT (A)
8
10
3790 TA03c
3790 TA03
24
3790fa
For more information www.linear.com/LT3790
1µF
VIN
12V TO
58V
27.4k
56.2k
For more information www.linear.com/LT3790
33nF
332k
SS
CTRL
PWM
SHORT
VREF
C/10
OVLO
IVINP
EN/UVLO
OUT2
OUT3
PH
MOD
SET
GND
LTC6902
OUT1
VC
DIV
V+
33nF
3.3k
IVINMON
CLKOUT
ISMON
SYNC1
SYNC
100k
INTVCC1
0.1µF
SHORT
200k
INTVCC1
499k
499k
51Ω
1µF
RT
BG2
SNSN
PGND
SNSP
SW2
TG2
ISP
ISN
FB
SGND
147k
200kHz
LT3790
BG1
SWI
TG1
BST1
BST2
CCM
IVINN VIN INTVCC
470nF
0.003Ω
M2
M1
M3
M4
+
0.004Ω
L1
10µH
0.1µF
0.1µF
D1 D2
INTVCC1
4.7µF
100V
4.7µF
10V
C1
47µF
80V
0.47µF
51Ω
4.7µF
50V
×2
0.009Ω
38.3k
13.7k
715k
+
SYNC3
SYNC2
COUT1
220µF
35V
×2
VOUT
24V
15A
0.1µF
INTVCC2
27.4k
499k
200k
1nF
33nF
100k
SHORT
56.2k
499k
VIN
SLAVE × 2
22nF
1000pF
2.2k
CTRL
IVINMON
ISMON
CLKOUT
SYNC
VC
SS
PWM
SHORT
VREF
C/10
OVLO
IVINP
EN/UVLO
51Ω
1µF
147k
200kHz
SW2
TG2
ISP
ISN
FB
SGND
BG2
SNSN
PGND
SNSP
M6
M5
M7
M8
+
0.004Ω
L2
10µH
0.1µF
0.1µF
D3 D4
INTVCC2
4.7µF
100V
4.7µF
10V
C2
47µF
80V
D1–D4: NXP BAT46WJ
L1, L2: COILCRAFT SER2915L-103KL 10µH
M1, M2, M5, M6: RENESAS RJK0651DPB 60Vds
M3, M4, M7, M8: RENESAS RJK0451DPB 40Vds
COUT1, COUT2: SUNCON 35HVT220M ×2
C1, C2: NIPPON CHEMICON EMZA800ADA470MJAOG
RT
LT3790
BG1
SWI
TG1
BST1
BST2
CCM
IVINN VIN INTVCC
470nF
0.003Ω
0.22µF
51Ω
4.7µF
50V
×2
0.009Ω
38.3k
140k
715k
+
3790 TA04
COUT2
220µF
35V
×2
LT3790
TYPICAL APPLICATIONS
98% Efficient 360W (24V 15A) Parallel Voltage Regulators
3790fa
25
LT3790
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3790#packaging for the most recent package drawings.
FE Package
38-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1772 Rev C)
Exposed Pad Variation AA
4.75 REF
38
9.60 – 9.80*
(.378 – .386)
4.75 REF
(.187)
20
6.60 ±0.10
4.50 REF
2.74 REF
SEE NOTE 4
6.40
2.74
REF (.252)
(.108)
BSC
0.315 ±0.05
1.05 ±0.10
0.50 BSC
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.50 – 0.75
(.020 – .030)
0.09 – 0.20
(.0035 – .0079)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN MILLIMETERS
(INCHES)
3. DRAWING NOT TO SCALE
26
1
0.25
REF
19
1.20
(.047)
MAX
0° – 8°
0.50
(.0196)
BSC
0.17 – 0.27
(.0067 – .0106)
TYP
0.05 – 0.15
(.002 – .006)
FE38 (AA) TSSOP REV C 0910
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3790fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT3790
LT3790
REVISION HISTORY
REV
DATE
DESCRIPTION
A
12/15
Clarified Typical Application schematic
Clarified Electrical V(ISP-ISN) Threshold parameters
Clarified ISP/ISN Bias Current parameters
Clarified Block Diagram
Clarified ILED to IOUT in Equations
Clarified Loop Compensation paragraph
PAGE NUMBER
1
3
3
11
17, 20
10
3790fa
For more information www.linear.com/LT3790
27
LT3790
TYPICAL APPLICATION
2.4A Buck-Boost 36V SLA Battery Charger
PVIN
9V TO 58V
RIN
0.003Ω
1µF
51Ω
VIN
INTVCC
D1
TG1
IVINP
INTVCC
200k
30.9k
BG1
LT3790
SHORT
PWMOUT
CHARGE CURRENT CONTROL
RBAT
0.025Ω
SNSN
PGND
IVINMON
ISMON
CTRL
BG2
SW2
TG2
ISP
PWM
ISN
FB
C/10
SS
CCM
RT
VREF
SYNC VC
D1, D2: BAT46WJ
22nF
L1: COILCRAFT SER2915L-103K
M1-M4: RENESAS RJK0651DPB
M5: NXP NX7002AK
CIN2: NIPPON CHEMI-CON EMZA630ADA101MJA0G
COUT2: SUNCON 50HVT220M
M3
RSENSE
0.004Ω
SGND
100k
L1 10µH
M2
COUT
4.7µF
50V
×2
M4
0.1µF
CIN2
100µF
63V
+
COUT2
220µF
50V
SNSP
CLKOUT
0.1µF
M1
SWI
OVLO
+
0.1µF
BST1
EN/UVLO
57.6k
4.7µF
D2
BST2
IVINN
470nF
499k
CIN
4.7µF
100V
×2
2.2k
+
1µF
2.4A
CHARGE
36V
SLA BATTERY
AGM TYPE
41V FLOAT
44V CHARGE
AT 25°C
51Ω
1.00M
INTVCC
20k
84.5k
300kHz
402k
30.1k
M5
22nF
3790 TA05
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DESCRIPTION
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LT8490
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28 Linear Technology Corporation
4.5V ≤ VIN ≤ 80V, Rail-to-Rail Output Current Monitor and Control,
TSSOP-28E Package
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT3790
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT3790
3790fa
LT 1215 REV A • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2014