TC1301A DATA SHEET (02/11/2010) DOWNLOAD

TC1301A/B
Dual LDO with Microcontroller RESET Function
Features
Description
• Dual Output LDO with Microcontroller Reset
Monitor Functionality:
- VOUT1 = 1.5V to 3.3V @ 300 mA
- VOUT2 = 1.5V to 3.3V @ 150 mA
- VRESET = 2.20V to 3.20V
• Output Voltage and RESET Threshold Voltage
Options Available (See Table 8-1)
• Low Dropout Voltage:
- VOUT1 = 104 mV @ 300 mA (typical)
- VOUT2 = 150 mV @ 150 mA, (typical)
• Low Supply Current: 116 µA (typical),
TC1301A/B with both output voltages available
• Reference Bypass Input for Low-Noise Operation
• Both Output Voltages Stable with a Minimum of
1 µF Ceramic Output Capacitor
• Separate Input for RESET Detect Voltage
(TC1301A)
• Separate VOUT1 and VOUT2 SHDN pins
(TC1301B)
• RESET Output Duration: 300 ms (typical)
• Power-Saving Shutdown Mode of Operation
• Wake-up from SHDN: 5.3 µs (typical)
• Small 8-pin DFN and MSOP Package Options
• Operating Junction Temperature Range:
- -40°C to +125°C
• Overtemperature and Overcurrent Protection
The TC1301A/B combines two Low Dropout (LDO)
regulators and a microcontroller RESET function into a
single 8-pin MSOP or DFN package. Both regulator
outputs feature low dropout voltage, 104 mV
@ 300 mA for VOUT1, 150 mV @ 150 mA for VOUT2,
low quiescent current consumption, 58 µA each and a
typical regulation accuracy of 0.5%. Several fixedoutput voltage and detector voltage combinations are
available. A reference bypass pin is available to further
reduce output noise and improve the power supply
rejection ratio of both LDOs.
Applications
•
•
•
•
•
•
Cellular/GSM/PHS Phones
Battery-Operated Systems
Hand-Held Medical Instruments
Portable Computers/PDAs
Linear Post-Regulators for SMPS
Pagers
Related Literature
• AN765, “Using Microchip’s Micropower LDOs”,
DS00765, Microchip Technology Inc., 2002
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs”, DS00766, Microchip Technology
Inc., 2002
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”,
DS00792, Microchip Technology Inc., 2001
© 2008 Microchip Technology Inc.
The TC1301A/B is stable over all line and load
conditions with a minimum of 1 µF of ceramic output
capacitance, and utilizes a unique compensation
scheme to provide fast dynamic response to sudden
line voltage and load current changes.
For the TC1301A, the microcontroller RESET function
operates independently of both VOUT1 and VOUT2. The
input to the RESET function is connected to the VDET
pin.The SHDN2 pin is used to control the output of
VOUT2 only. VOUT1 will power-up and down with VIN.
In the case of the TC1301B, the detect voltage input of
the RESET function is connected internally to VOUT1.
Both VOUT1 and VOUT2 have independent shutdown
capability.
Additional features include an overcurrent limit and
overtemperature protection that, when combined,
provide a robust design for all load fault conditions.
Package Types
8-Pin DFN/MSOP
TC1301A
MSOP8
DFN8
RESET 1
6 VOUT2
GND 3
Bypass 4
7 VIN
VOUT1 2
7 VIN
VOUT1 2
8 VDET
RESET 1
8 VDET
5 SHDN2
6 VOUT2
GND 3
Bypass 4
5 SHDN2
TC1301B
MSOP8
DFN8
RESET 1
VOUT1 2
GND 3
Bypass 4
8 SHDN1
7 VIN
6 VOUT2
5 SHDN2
RESET 1
VOUT1 2
GND 3
Bypass 4
8 SHDN1
7 VIN
6 VOUT2
5 SHDN2
DS21798C-page 1
TC1301A/B
Functional Block Diagrams
TC1301B
TC1301A
VOUT1
VIN
VOUT1
VIN
LDO #1
300 mA
SHDN1
LDO #1
300 mA
SHDN2
LDO #2
150 mA
VOUT2
GND
Bandgap
Reference
1.2V
Bypass
Threshold
Detector
GND
Bypass
VDET
RESET
Time Delay
300 ms, typ
Bandgap
Reference
1.2V
Threshold
Detector
VOUT1
LDO #2
150 mA
SHDN2
VDET
VOUT2
RESET
Time Delay
300 ms typ
Typical Application Circuits
TC1301A
System RESET
2.8V @ 300 mA
COUT1
1 µF Ceramic
X5R
1
RESET
2 V
OUT1
3
4
GND
VDET 8
BATTERY
VIN 7
VOUT2 6 2.6V @ 150 mA
Bypass SHDN2
CIN
1 µF
COUT2
1 µF Ceramic
X5R
5
CBYPASS(Note)
10 nF Ceramic
2.7V
to
4.2V
ON/OFF Control VOUT2
ON/OFF Control VOUT1
TC1301B
System RESET
2.8V @ 300 mA
COUT1
1 µF Ceramic
X5R
1
2 V
OUT1
3
4
Note: CBYPASS is optional
DS21798C-page 2
RESET SHDN1
GND
8
VIN 7
BATTERY
VOUT2 6 2.6V @ 150 mA
Bypass SHDN2
5
CIN
1 µF
COUT2
1 µF Ceramic
X5R
2.7V
to
4.2V
ON/OFF Control VOUT2
© 2008 Microchip Technology Inc.
TC1301A/B
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
Absolute Maximum Ratings †
VDD...................................................................................6.5V
Maximum Voltage on Any Pin ...... (VSS – 0.3) to (VIN + 0.3)V
Power Dissipation ..........................Internally Limited (Note 7)
Storage temperature .....................................-65°C to +150°C
Maximum Junction Temperature, TJ ........................... +150°C
Continuous Operating Temperature Range ..-40°C to +125°C
ESD protection on all pins, HBM, MM ..................... 4 kV, 400V
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF,
CBYPASS = 10 nF, SHDN > VIH, TA = +25°C.
Boldface type specifications apply for junction temperatures of -40°C to +125°C.
Parameters
Input Operating Voltage
Sym
Min
Typ
Max
Units
VIN
2.7
—
6.0
V
Conditions
Note 1
Maximum Output Current
IOUT1Max
300
—
—
mA
VIN = 2.7V to 6.0V (Note 1)
Maximum Output Current
IOUT2Max
150
—
—
mA
VIN = 2.7V to 6.0V (Note 1)
Output Voltage Tolerance
(VOUT1 and VOUT2)
VOUT
VR – 2.5 VR±0.5 VR + 2.5
%
Note 2
Note 3
Temperature Coefficient
(VOUT1 and VOUT2)
TCVOUT
—
25
—
ppm/°C
Line Regulation
(VOUT1 and VOUT2)
ΔVOUT/
ΔVIN
—
0.02
0.2
%/V
Load Regulation, VOUT ≥ 2.5V
(VOUT1 and VOUT2)
ΔVOUT/
VOUT
-1
0.1
+1
%
IOUTX = 0.1 mA to IOUTMax (Note 4)
Load Regulation, VOUT < 2.5V
(VOUT1 and VOUT2)
ΔVOUT/
VOUT
-1.5
0.1
+1.5
%
IOUTX = 0.1 mA to IOUTMax (Note 4)
ΔVOUT/ΔPD
—
0.04
—
%/W
VOUT1 ≥ 2.7V
VIN – VOUT
—
104
180
mV
IOUT1 = 300 mA
VOUT2 ≥ 2.6V
VIN – VOUT
—
150
250
mV
IOUT2 = 150 mA
TC1301A
IIN(A)
—
103
180
µA
SHDN2 = VIN, VDET = OPEN,
IOUT1 = IOUT2 = 0 mA
TC1301B
IIN(B)
—
114
180
µA
SHDN1 = SHDN2 = VIN,
IOUT1 = IOUT2 = 0 mA
Thermal Regulation
(VR+1V) ≤ VIN ≤ 6V
Note 5
Dropout Voltage (Note 6)
Supply Current
Note 1:
2:
3:
4:
5:
6:
7:
The minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VR + VDROPOUT.
VR is defined as the higher of the two regulator nominal output voltages (VOUT1 or VOUT2).
TCVOUT = ((VOUTmax - VOUTmin) * 106)/(VOUT * ΔT).
Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to ILMAX at VIN = 6V for
t = 10 ms.
Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value
measured at a 1V differential.
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown.
© 2008 Microchip Technology Inc.
DS21798C-page 3
TC1301A/B
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF,
CBYPASS = 10 nF, SHDN > VIH, TA = +25°C.
Boldface type specifications apply for junction temperatures of -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
Shutdown Supply Current
TC1301A
IIN_SHDNA
—
58
90
µA
SHDN2 = GND, VDET = OPEN
Shutdown Supply Current
TC1301B
IIN_SHDNB
—
0.1
1
µA
SHDN1 = SHDN2 = GND
PSRR
—
58
—
dB
f ≤ 100 Hz, IOUT1 = IOUT2 = 50 mA,
CIN = 0 µF
eN
—
830
—
nV/(Hz)½
Power Supply Rejection Ratio
Output Noise
Conditions
f ≤ 1 kHz, IOUT1 = IOUT2 = 50 mA,
CIN = 0 µF
Output Short-Circuit Current (Average)
VOUT1
IOUTsc
—
200
—
mA
RLOAD1 ≤ 1Ω
VOUT2
IOUTsc
—
140
—
mA
RLOAD2 ≤ 1Ω
SHDN Input High Threshold
VIH
45
—
—
%VIN
VIN = 2.7V to 6.0V
SHDN Input Low Threshold
VIL
—
—
15
%VIN
VIN = 2.7V to 6.0V
Wake-Up Time (From SHDN
mode), (VOUT2)
tWK
—
5.3
20
µs
VIN = 5V, IOUT1 = IOUT2 = 30 mA,
See Figure 5-1
tS
—
50
—
µs
VIN = 5V, IOUT1 = IOUT2 = 50 mA,
See Figure 5-2
Thermal Shutdown Die
Temperature
TSD
—
150
—
°C
VIN = 5V, IOUT1 = IOUT2 = 100 µA
Thermal Shutdown Hysteresis
THYS
—
10
—
°C
VIN = 5V
Voltage Range
VDET
1.0
1.2
—
6.0
6.0
V
TA = 0°C to +70°C
TA = -40°C to +125°C
RESET Threshold
VTH
-1.4
—
+1.4
%
-2.8
—
+2.8
%
ΔVTH/ΔT
—
30
—
ppm/°C
VDET RESET Delay
tRPD
—
180
—
µs
VDET = VTH to (VTH – 100 mV),
See Figure 5-3
RESET Active Time-out Period
tRPU
140
300
560
ms
VDET = VTH - 100 mV to VTH + 100 mV,
ISINK = 1.2 mA, See Figure 5-3.
RESET Output Voltage Low
VOL
—
—
0.2
V
VDET = VTHmin, ISINK = 1.2 mA,
ISINK = 100 µA for VDET < 1.8V,
See Figure 5-3
RESET Output Voltage High
VOH
0.9
VDET
—
—
V
VDET > VTHmax, ISOURCE = 500 µA,
See Figure 5-3
Settling Time (From SHDN mode),
(VOUT2)
RESET Threshold Tempco
Note 1:
2:
3:
4:
5:
6:
7:
TA = -40°C to +125°C
The minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VR + VDROPOUT.
VR is defined as the higher of the two regulator nominal output voltages (VOUT1 or VOUT2).
TCVOUT = ((VOUTmax - VOUTmin) * 106)/(VOUT * ΔT).
Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to ILMAX at VIN = 6V for
t = 10 ms.
Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value
measured at a 1V differential.
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown.
DS21798C-page 4
© 2008 Microchip Technology Inc.
TC1301A/B
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VIN = +2.7V to +6.0V.
Parameters
Sym
Min
Typical
Max
Units
Conditions
Operating Junction Temperature
Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Maximum Junction Temperature
TJ
—
—
+150
°C
Thermal Resistance, 8LD MSOP
θJA
—
208
—
°C/W Typical 4-Layer Board
Thermal Resistance, 8LD DFN
θJA
—
41
—
°C/W Typical 4-Layer Board with Vias
Temperature Ranges
Steady State
Transient
Thermal Package Resistances
© 2008 Microchip Technology Inc.
DS21798C-page 5
TC1301A/B
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.
300
3.00
TJ = 25°C
IOUT1 = IOUT2 = 0 µA
VOUT1 Active
TC1301B
250
Output Voltage (V)
Quiescent Current (µA)
350
200
VOUT2 Active
150
VOUT2 SHDN
100
TJ = 25°C
IOUT1 = 100 mA
IOUT2 = 50 mA
2.90
VOUT1
2.80
2.70
VOUT2
50
0
2.60
2.7
2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
Quiescent Current vs. Input
FIGURE 2-4:
Voltage.
Output Voltage vs. Input
2.90
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
2.85
Output Voltage (V)
SHDN Threshold (V)
FIGURE 2-1:
Voltage.
ON
OFF
VOUT1
2.80
2.75
2.70
VOUT2
2.65
TJ = +25°C
IOUT1 = 300 mA
IOUT2 = 100 mA
2.60
2.55
2.50
2.7
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
2.7
6
3
3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7
140
130
120
110
100
90
80
70
60
50
40
TC1301B
VOUT2 Active
VIN = 4.2V
IOUT1 = IOUT2 = 0 µA
VOUT1 Active
VOUT2 SHDN
-40 -25 -10
5
20 35 50 65 80 95 110 125
FIGURE 2-5:
Voltage.
Dropout Voltage VOUT1 (mV)
SHDN Voltage Threshold
FIGURE 2-2:
vs. Input Voltage.
140.0
Output Voltage vs. Input
VR1 = 2.8V
VR2 = 2.6V
IOUT2 = 100 µA
120.0
100.0
DS21798C-page 6
TJ = +125°C
TJ = +25°C
80.0
TJ = - 40°C
60.0
40.0
20.0
0.0
0
50
100
150
200
250
300
IOUT1 (mA)
Junction Temperature (°C)
FIGURE 2-3:
Quiescent Current vs.
Junction Temperature.
6
Input Voltage (V)
Input Voltage (V)
Quiescent Current (µA)
6
Input Voltage (V)
Input Voltage (V)
FIGURE 2-6:
Current (VOUT1).
Dropout Voltage vs. Output
© 2008 Microchip Technology Inc.
TC1301A/B
140
0.40
VR1 = 2.8V
VR2 = 2.6V
IOUT2 = 100 µA
120
IOUT1 = 300 mA
Load Regulation (%)
Dropout Voltage VOUT1 (mV)
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.
100
80
60
IOUT1 = 100 mA
40
IOUT1 = 50 mA
20
VOUT2
0.30
VOUT1
0.10
IOUT1 = 0.1 mA to 300 mA
0.00
-0.10
VR1 = 2.8V
VR2 = 2.6V
VIN = 4.2
-0.20
-0.30
-0.40
0
-40 -25 -10
-40 -25 -10
5
35
50
65
80
95 110 125
FIGURE 2-10:
VOUT1 and VOUT2 Load
Regulation vs. Junction Temperature.
VR1 = 2.8V
VR2 = 2.6V
IOUT1 = 100 µA
Line Regulation (%/V)
0.045
180
160
140
120
100
80
60
20
Junction Temperature (125°C)
FIGURE 2-7:
Dropout Voltage vs.
Junction Temperature (VOUT1).
Dropout Voltage, VOUT2 (mv)
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
TJ = +125°C
TJ = +25°C
TJ = - 40°C
40
20
0
VIN = 3.8V to 6.0V
VR1 = 2.8V, IOUT1 = 100 µA
VR2 = 2.6V, IOUT2 = 100 µA
0.040
0.035
VOUT2
0.030
0.025
0.020
VOUT1
0.015
0.010
0.005
0.000
0
30
60
90
120
150
-40 -25 -10 5 20 35 50 65 80 95 110 125
Junction Temperature (°C)
IOUT2 (mA)
FIGURE 2-8:
Current (VOUT2).
Dropout Voltage vs. Output
FIGURE 2-11:
VOUT1 and VOUT2 Line
Regulation vs. Junction Temperature.
2.832
180
IOUT2 = 150 mA
160
140
VR1 = 2.8V
VR2 = 2.6V
IOUT1 = 100 µA
120
100
80
IOUT2 = 50 mA
60
40
IOUT2 = 10 mA
20
0
Output Voltage VOUT1 (V)
Dropout Voltage VOUT2 (mV)
IOUT2 = 0.1 mA to 150 mA
0.20
2.828
2.824
VIN = 4.2V
VR1 = 2.8V
VR2 = 2.6V, IOUT2 = 100 µA
IOUT1 = 100 mA
IOUT1 = 300 mA
2.820
2.816
IOUT1 = 100 µA
2.812
2.808
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
FIGURE 2-9:
Dropout Voltage vs.
Junction Temperature (VOUT2).
© 2008 Microchip Technology Inc.
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
Junction Temperature (°C)
FIGURE 2-12:
Temperature.
VOUT1 vs. Junction
DS21798C-page 7
TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.
2.848
30
VR1 = 2.8V, IOUT1 = 300 mA
VR2 = 2.6V, IOUT2 = 100 µA
VR1 = 2.8V
VR2 = 2.6V
25
VIN = 3.0V
2.840
2.832
2.824
VIN = 4.2V
2.816
IVDET (µA)
Output Voltage VOUT1 (V)
2.856
VDET = 4.2V
20
15
VDET = 3.0V
10
5
VIN = 6.0V
2.808
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
Junction Temperature (°C)
FIGURE 2-13:
Temperature.
VOUT1 vs. Junction
FIGURE 2-16:
Temperature.
2.640
IOUT2 = 50 mA
2.635
2.630
IOUT2 = 150 mA
2.625
VIN = 4.2V
VR1 = 2.8V, IOUT1 = 100 µA
VR2 = 2.6V
2.620
RESET Active Time (ms)
Output Voltage VOUT2 (V)
20 35 50 65 80 95 110 125
IDET current vs. Junction
400
IOUT2 = 100 µA
2.615
-40 -25 -10
5
VIN = 4.2V
VR1 = 2.8V
VR2 = 2.6V
VDET = 2.63V
375
350
325
300
275
250
225
200
20 35 50 65 80 95 110 125
-40 -25 -10
Junction Temperature (°C)
VOUT2 vs. Junction
2.644
VR1 = 2.8V, IOUT1 = 100 µA
VR2 = 2.6V, IOUT2 = 150 mA
20 35 50 65 80 95 110 125
FIGURE 2-17:
RESET Active Time vs.
Junction Temperature.
2.6395
VIN = 3.0V
2.6390
VIN = 4.2V
2.636
5
Junction Temperature (°C)
VIN = 6.0V
2.632
2.628
VDET Trip Point (V)
FIGURE 2-14:
Temperature.
Output Voltage VOUT2 (V)
5
Junction Temperature (°C)
2.645
2.640
VDET = 6.0V
2.6385
2.6380
2.6375
2.6370
VIN = 4.2V
VR1 = 2.8V
VR2 = 2.6V
VDET = 2.63V
2.6365
2.6360
2.624
2.6355
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
Junction Temperature (°C)
FIGURE 2-15:
Temperature.
DS21798C-page 8
VOUT2 vs. Junction
5
20
35
50
65
80
95 110 125
Junction Temperature (°C)
FIGURE 2-18:
Temperature.
VDET Trip Point vs. Junction
© 2008 Microchip Technology Inc.
TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.
NOISE (μV/—Hz)
10
1
0.1
0.01
VOUT2
VOUT1
VIN = 4.2V
VR1 = 2.8V
VR2=2.6V
IOUT1 = 150 mA
IOUT2 = 100 mA
CBYPASS = 10 nF
0.001
0.01
0.1
1
10
100
1000
Frequency (KHz)
FIGURE 2-19:
Power Supply Rejection
Ratio vs. Frequency (without bypass capacitor).
FIGURE 2-22:
VOUT1 and VOUT2 Noise vs.
Frequency (with bypass capacitor).
FIGURE 2-20:
Power Supply Rejection
Ratio vs. Frequency (with bypass capacitor).
FIGURE 2-23:
VOUT1 and VOUT2 Power-up
from Shutdown TC1301B.
10
NOISE (μV/—Hz)
VOUT2
1
0.1
VOUT1
VIN = 4.2V
VR1 = 2.8V
VR2=2.6V
IOUT1 = 150 mA
IOUT2 = 100 mA
CBYPASS = 0 nF
0.01
0.01
0.1
1
10
100
1000
Frequency (KHz)
FIGURE 2-21:
VOUT1 and VOUT2 Noise vs.
Frequency (without bypass capacitor).
© 2008 Microchip Technology Inc.
FIGURE 2-24:
VOUT2 Power-up from
Shutdown Input TC1301A.
DS21798C-page 9
TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.
FIGURE 2-25:
VOUT1 and VOUT2 Power-up
from Input Voltage TC1301B.
FIGURE 2-28:
VOUT2.
150 mA Dynamic Load Step
FIGURE 2-26:
Dynamic Line Response.
FIGURE 2-29:
TC1301B.
RESET Power-Up From VIN
FIGURE 2-27:
VOUT1.
300 mA Dynamic Load Step
FIGURE 2-30:
Down.
TC1301A RESET Power-
DS21798C-page 10
© 2008 Microchip Technology Inc.
TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.
RESET VOL (V)
0.30
VR1 = 2.8V,VR2 = 2.6V
VDET = VTH - 20 mV
IOL = 3.2 mA
0.25
0.20
0.15
IOL = 1.2 mA
0.10
0.05
0.00
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
FIGURE 2-31:
RESET Output Voltage Low
vs. Junction Temperature.
© 2008 Microchip Technology Inc.
RESET VOH (V)
0.35
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
VR1 = 2.8V,VR2 = 2.6V
VDET = VTH + 20 mV
VDET = 4.2V
RESETISOURCE = 800 µA
VDET = 3.0V
RESETISOURCE = 500 µA
-40 -25 -10
5
20 35 50 65 80 95 110 125
Junction Temperature (°C)
FIGURE 2-32:
RESET Output Voltage High
vs. Junction Temperature.
DS21798C-page 11
TC1301A/B
3.0
TC1301A PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
TC1301A PIN FUNCTION TABLE
Pin No.
Name
1
RESET
Push-pull output pin that will remain low while VDET is below the reset threshold and for
300 ms after VDET rises above the reset threshold.
2
VOUT1
Regulated output voltage #1 capable of 300 mA.
3
GND
Circuit ground pin.
4
Bypass
Internal reference bypass pin. A 10 nF external capacitor can be used to further reduce
output noise and improve PSRR performance.
5
SHDN2
Output #2 shutdown control Input.
6
VOUT2
Regulated output voltage #2 capable of 150 mA.
7
VIN
8
VDET
3.1
Function
Unregulated input voltage pin.
Input pin for Voltage Detector (VDET).
RESET Output Pin
The push-pull output pin is used to monitor the voltage
on the VDET pin. If the VDET voltage is less than the
threshold voltage, the RESET output will be held in the
low state. As the VDET pin rises above the threshold,
the RESET output will remain in the low state for
300 ms and then change to the high state, indicating
that the voltage on the VDET pin is above the threshold.
3.2
Regulated Output Voltage #1
(VOUT1)
Connect VOUT1 to the positive side of the VOUT1
capacitor and load. It is capable of 300 mA maximum
output current. VOUT1 output is available when VIN is
available; there is no pin to turn it OFF. See TC1301B
if ON/OFF control of VOUT1 is desired.
3.3
Circuit Ground Pin (GND)
3.5
Output Voltage #2 Shutdown
(SHDN2)
ON/OFF control is performed by connecting SHDN2 to
its proper level. When the input of this pin is connected
to a voltage less than 15% of VIN, VOUT2 will be OFF. If
this pin is connected to a voltage that is greater than
45% of VIN, VOUT2 will be turned ON.
3.6
Regulated Output Voltage #2
(VOUT2)
Connect VOUT2 to the positive side of the VOUT2
capacitor and load. This pin is capable of a maximum
output current of 150 mA. VOUT2 can be turned ON and
OFF using SHDN2.
3.7
Unregulated Input Voltage Pin
(VIN)
Connect GND to the negative side of the input and
output capacitor. Only the LDO internal circuitry bias
current flows out of this pin (200 µA maximum).
Connect the unregulated input voltage source to VIN. If
the input voltage source is located more than several
inches away, or is a battery, a typical input capacitance
of 1 µF to 4.7 µF is recommended.
3.4
3.8
Reference Bypass Input
By connecting an external 10 nF capacitor (typical) to
the bypass input, both outputs (VOUT1 and VOUT2) will
have less noise and improved Power Supply Ripple
Rejection (PSRR) performance. The LDO output
voltage start-up time will increase with the addition of
an external bypass capacitor. By leaving this pin
unconnected, the start-up time will be minimized.
DS21798C-page 12
Input Pin for Voltage Detector
(VDET)
The voltage on the input of VDET is compared with the
preset VDET threshold voltage. If the voltage is below
the threshold, the RESET output will be low. If the
voltage is above the VDET threshold, the RESET output
will be high after the RESET time period. The IDET
supply current is typically 9 µA at room temperature,
with VDET = 3.8V.
© 2008 Microchip Technology Inc.
TC1301A/B
4.0
TC1301B PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 4-1.
TABLE 4-1:
TC1301B PIN FUNCTION TABLE
Pin No.
Name
1
RESET
Push-pull output pin that will remain low while VDET is below the reset threshold and for
300 ms after VOUT1 rises above the reset threshold
2
VOUT1
Regulated output voltage #1 capable of 300 mA
3
GND
Circuit ground pin
4
Bypass
Internal reference bypass pin. A 10 nF external capacitor can be used to further reduce
output noise and improve PSRR performance
5
SHDN2
Output #2 shutdown control Input
6
VOUT2
Regulated output voltage #2 capable of 150 mA
7
VIN
8
SHDN1
4.1
Function
Unregulated input voltage pin
Output #1 shutdown control input
RESET Output Pin
The push-pull output pin is used to monitor the output
voltage (VOUT1). If VOUT1 is less than the threshold
voltage, the RESET output will be held in the low state.
As VOUT1 rises above the threshold, the RESET output
will remain in the low state for 300 ms and then change
to the high state, indicating that the voltage on VOUT1 is
above the threshold.
4.2
Regulated Output Voltage #1
(VOUT1)
Connect VOUT1 to the positive side of the VOUT1
capacitor and load. It is capable of 300 mA maximum
output current. For the TC1301B, VOUT1 can be turned
ON and OFF using the SHDN1 input pin.
4.3
Circuit Ground Pin (GND)
Connect GND to the negative side of the input and
output capacitor. Only the LDO internal circuitry bias
current flows out of this pin (200 µA maximum).
4.4
Reference Bypass Input
By connecting an external 10 nF capacitor (typical) to
bypass, both outputs (VOUT1 and VOUT2) will have less
noise and improved Power Supply Ripple Rejection
(PSRR) performance. The LDO output voltage start-up
time will increase with the addition of an external
bypass capacitor. By leaving this pin unconnected, the
start-up time will be minimized.
© 2008 Microchip Technology Inc.
4.5
Output Voltage #2 Shutdown
(SHDN2)
ON/OFF control is performed by connecting SHDN2 to
its proper level. When this pin is connected to a voltage
less than 15% of VIN, VOUT2 will be OFF. If this pin is
connected to a voltage that is greater than 45% of VIN,
VOUT2 will be turned ON.
4.6
Regulated Output Voltage #2
(VOUT2)
Connect VOUT2 to the positive side of the VOUT2
capacitor and load. This pin is capable of a maximum
output current of 150 mA. VOUT2 can be turned ON and
OFF using SHDN2.
4.7
Unregulated Input Voltage Pin
(VIN)
Connect the unregulated input voltage source to VIN. If
the input voltage source is located more than several
inches away or is a battery, a typical minimum input
capacitance of 1 µF and 4.7 µF is recommended.
4.8
Output Voltage #1 Shutdown
(SHDN1)
ON/OFF control is performed by connecting SHDN1 to
its proper level. When this pin is connected to a voltage
less than 15% of VIN, VOUT1 will be OFF. If this pin is
connected to a voltage that is greater than 45% of VIN,
VOUT1 will be turned ON.
DS21798C-page 13
TC1301A/B
5.0
DETAILED DESCRIPTION
5.1
Device Overview
The TC1301A/B is a combination device consisting of
one 300 mA LDO regulator with a fixed output voltage,
VOUT1 (1.5V – 3.3V), one 150 mA LDO regulator with a
fixed output voltage, VOUT2 (1.5V – 3.3V), and a
microcontroller voltage monitor/RESET (2.2V to 3.2V).
For the TC1301A, the 300 mA output (VOUT1) is always
present, independent of the level of SHDN2. The
150 mA output (VOUT2) can be turned on/off by
controlling the level of SHDN2.
For the TC1301B, VOUT1 and VOUT2 each have
independent shutdown input pins (SHDN1 and
SHDN2) to control their respective outputs. In the case
of the TC1301B, the voltage detect input of the
microcontroller RESET function is internally connected
to the VOUT1 output of the device.
5.2
LDO Output #1
LDO output #1 is rated for 300 mA of output current.
The typical dropout voltage for VOUT1 = 104 mV @
300 mA. A 1 µF (minimum) output capacitor is needed
for stability and should be located as close to the VOUT1
pin and ground as possible.
5.3
LDO Output #2
LDO output #2 is rated for 150 mA of output current.
The typical dropout voltage for VOUT2 = 150 mV. A 1 µF
(minimum) capacitor is needed for stability and should
be located as close to the VOUT2 pin and ground as
possible.
5.4
RESET Output
the LDO as is practical. Larger input capacitors will help
reduce the input impedance and further reduce any
high-frequency noise on the input and output of the
LDO.
5.6
Output Capacitor
A minimum output capacitance of 1 µF for each of the
TC1301A/B LDO outputs is necessary for stability.
Ceramic capacitors are recommended because of their
size, cost and environmental robustness qualities.
Electrolytic (Tantalum or Aluminum) capacitors can be
used on the LDO outputs as well. The Equivalent
Series Resistance (ESR) requirements on the
electrolytic output capacitors are between 0 and 2
ohms. The output capacitor should be located as close
to the LDO output as is practical. Ceramic materials,
X7R and X5R, have low temperature coefficients and
are well within the acceptable ESR range required. A
typical 1 uF X5R 0805 capacitor has an ESR of 50 milliohms. Larger LDO output capacitors can be used with
the TC1301A/B to improve dynamic performance and
power supply ripple rejection performance. A maximum
of 10 µF is recommended. Aluminum electrolytic
capacitors are not recommended for low temperature
applications of < -25°C.
5.7
Bypass Input
The bypass pin is connected to the internal LDO
reference. By adding capacitance to this pin, the LDO
ripple rejection, input voltage transient response and
output noise performance are all increased. A typical
bypass capacitor between 470 pF to 10 nF is
recommended. Larger bypass capacitors can be used,
but results in a longer time-period for the LDO outputs
to reach their rated output voltage when started from
SHDN or VIN.
The RESET output is used to detect whether the level
on the input of VDET (TC1301A) or VOUT1 (TC1301B) is
above or below a preset threshold. If the voltage
detected is below the preset threshold, the RESET
output is capable of sinking 1.2 mA (VRESET < 0.2V
maximum). Once the voltage being monitored is above
the preset threshold, the RESET output pin will
transition from a logic-low to a logic-high after a 300 ms
delay. The RESET output is a push-pull configuration
and will actively pull the RESET output up to VDET
when not in RESET.
5.8
5.5
The TC1301A SHDN2 pin is used to turn VOUT2 ON
and OFF. A logic-high level on SHDN2 will enable the
VOUT2 output, while a logic-low on the SHDN2 pin will
disable the VOUT2 output. For the TC1301A, VOUT1 is
not affected by SHDN2 and will be enabled as long as
the input voltage is present.
Input Capacitor
Low input source impedance is necessary for the two
LDO outputs to operate properly. When operating from
batteries or in applications with long lead length
(> 10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 1.0 µF to 4.7 µF is recommended for most applications. When using large capacitors on the LDO outputs,
larger capacitance is recommended on the LDO input.
The capacitor should be placed as close to the input of
DS21798C-page 14
GND
For the optimal noise and PSRR performance, the
GND pin of the TC1301A/B should be tied to a quiet
circuit ground. For applications that have switching or
noisy inputs, tie the GND pin to the return of the output
capacitor. Ground planes help lower inductance and
voltage spikes caused by fast transient load currents
and are recommended for applications that are
subjected to fast load transients.
5.9
SHDN1/SHDN2 Operation
The TC1301B SHDN1 and SHDN2 pins are used to
turn VOUT1 and VOUT2 ON and OFF. They operate
independent of each other.
© 2008 Microchip Technology Inc.
TC1301A/B
5.10
TC1301A SHDN2 Timing
VOUT1 will rise independent of the level of SHDN2 for
the TC1301A. Figure 5-1 is used to define the wake-up
time from shutdown (tWK) and the settling time (tS). The
wake-up time is dependant upon the frequency of
operation. The faster the SHDN pin is pulsed, the
shorter the wake-up time will be.
VIN
ts
twk
SHDN2
VOUT1
VDET and RESET Operation
The TC1301A/B integrates an independent voltage
reset monitor that can be used for low-battery input
voltage detection or a microprocessor Power-On Reset
(POR) function. The input voltage for the detector is
different for the TC1301A than it is for the TC1301B.
For the TC1301A, the input voltage to the detector is
pin 8 (VDET). For the TC1301B, the input voltage to the
detector is internally connected to the output of LDO #1
(VOUT1). The detected voltage is sensed and compared to an internal threshold. When the voltage on the
VDET pin is below the threshold voltage, the RESET
output pin is low. When the voltage on the VDET pin
rises above the voltage threshold, the RESET output
will remain low for typically 300 ms (RESET time-out
period). After the RESET time-out period, the RESET
output voltage will transition from the low output state
to the high output state if the detected voltage pin
remains above the threshold voltage.
The RESET output will be driven low within 180 µs of
VDET going below the RESET voltage threshold. The
RESET output will remain valid for detected voltages
greater than 1.2V overtemperature.
VOUT2
5.13
FIGURE 5-1:
5.11
5.12
TC1301A Timing.
TC1301B SHDN1 / SHDN2 Timing
TC1301A RESET Timing
Figure 5-3 shows the RESET timing waveforms for the
TC1301A. This diagram is also used to define the
RESET active time-out period (tRPU) and the VDET
RESET delay time (tRPD).
For the TC1301B, the SHDN1 input pin is used to
control VOUT1. The SHDN2 input pin is used to control
VOUT2, independent of the logic input on SHDN1.
VTH
VDET
RESET Time
VIN
VOH
ts
TRPD
twk
RESET
SHDN1
1V
VOL
VOUT1
FIGURE 5-3:
TC1301A RESET Timing.
SHDN2
VOUT2
FIGURE 5-2:
TC1301B Timing.
© 2008 Microchip Technology Inc.
DS21798C-page 15
TC1301A/B
5.14
TC1301B RESET Timing
5.15
The timing waveforms for the TC1301B RESET output
are shown in Figure 5-4. Note that the RESET
threshold input for the TC1301B is VOUT1. The VOUT1
to RESET threshold detector connection is made
internal in the case of the TC1301B.
VIN
VTH
5.15.1
RESET Time
VOH
TRPD
RESET
1V
FIGURE 5-4:
DS21798C-page 16
VOL
TC1301B RESET Timing.
OVERCURRENT LIMIT
In the event of a faulted output load, the maximum
current the LDO output will permit to flow is limited
internally for each of the TC1301A/B outputs. The peak
current limit for VOUT1 is typically 1.1A, while the peak
current limit for VOUT2 is typically 0.5A. During shortcircuit operation, the average current is limited to
200 mA for VOUT1 and 140 mA for VOUT2.The VDET
and RESET circuit will continue to operate in the event
of an overcurrent on either output for the TC1301A.
The voltage detect and RESET circuit will continue to
operate in the event of an overcurrent on VOUT1 (or
VOUT2) for the TC1301B. In the event of an overcurrent
on VOUT1, the RESET will detect the absence of VOUT1.
5.15.2
VOUT1
Device Protection
OVERTEMPERATURE
PROTECTION
If the internal power dissipation within the TC1301A/B
is excessive due to a faulted load or higher-thanspecified line voltage, an internal temperature-sensing
element will prevent the junction temperature from
exceeding approximately 150°C. If the junction
temperature does reach 150°C, both outputs will be
disabled until the junction temperature cools to
approximately 140°C. The device will resume normal
operation. If the internal power dissipation continues to
be excessive, the device will again shut off. The VDET
and RESET circuit will continue to operate normally
during an overtemperature fault condition for both the
TC1301A and TC1301B.
© 2008 Microchip Technology Inc.
TC1301A/B
6.0
6.1
APPLICATION CIRCUITS/
ISSUES
EQUATION 6-1:
P LDO = ( V IN ( MAX ) ) – V OUT ( MIN ) ) × I OUT ( MAX ) )
Where:
Typical Application
The TC1301A/B is used for applications that require
the integration of two LDO’s and a microcontroller
RESET.
TC1301A
System RESET
2.8V @ 300 mA
COUT1
1 µF Ceramic
X5R
1
2
3
4
RESET
VOUT1
GND
VDET
8
BATTERY
VIN 7
VOUT2
Bypass SHDN2
1.8V
6 @ 150 mA
CIN
1 µF
5
COUT2
1 µF Ceramic
X5R
Cbypass
10 nF Ceramic
2.7V
to
4.2V
ON/OFF Control VOUT2
PLDO
=
LDO Pass device internal power
dissipation
VIN(MAX)
=
Maximum input voltage
VOUT(MIN)
=
LDO minimum output voltage
In addition to the LDO pass element power dissipation,
there is power dissipation within the TC1301A/B as a
result of quiescent or ground current. The power
dissipation as a result of the ground current can be
calculated using the following equation. The VIN pin
quiescent current and the VDET pin current are both
considered. The VIN current is a result of LDO
quiescent current, while the VDET current is a result of
the voltage detector current.
EQUATION 6-2:
P I ( GND ) = V IN ( MAX ) × ( I VIN + I VDET )
ON/OFF Control VOUT1
TC1301B
1
System RESET
RESET SHDN1
2.8V @ 300 mA 2
VIN
VOUT1
COUT1
3
VOUT2
GND
1 µF Ceramic
X5R
4
Bypass SHDN2
Where:
8
BATTERY
7
1.8V
6 @ 150 mA
5
CIN
1 µF
COUT2
1 µF Ceramic
X5R
2.7V
to
4.2V
ON/OFF Control VOUT2
FIGURE 6-1:
TC1301A/B.
6.1.1
Typical Application Circuit
APPLICATION INPUT CONDITIONS
Package Type = 3x3 DFN8
Input Voltage Range = 2.7V to 4.2V
VIN maximum = 4.2V
VIN typical = 3.6V
VOUT1 = 300 mA maximum
VOUT2 = 150 mA maximum
System RESET Load = 10 kΩ
6.2
6.2.1
Power Calculations
POWER DISSIPATION
PI(GND)
=
Total current in ground pin
VIN(MAX)
=
Maximum input voltage
IVIN
=
Current flowing in the VIN pin with
no output current on either LDO
output
IVDET
=
Current in the VDET pin with
RESET loaded
The total power dissipated within the TC1301A/B is the
sum of the power dissipated in both of the LDO’s and
the P(IGND) term. Because of the CMOS construction,
the typical IGND for the TC1301A/B is 116 µA.
Operating at a maximum of 4.2V results in a power
dissipation of 0.5 milliWatts. For most applications, this
is small compared to the LDO pass device power
dissipation and can be neglected.
The maximum continuous operating junction
temperature specified for the TC1301A/B is 125°C. To
estimate the internal junction temperature of the
TC1301A/B, the total internal power dissipation is
multiplied by the thermal resistance from junction to
ambient (RθJA) of the device. The thermal resistance
from junction to ambient for the 3x3 DFN8 pin package
is estimated at 41°C/W.
The internal power dissipation within the TC1301A/B is
a function of input voltage, output voltage, output
current and quiescent current. The following equation
can be used to calculate the internal power dissipation
for each LDO.
© 2008 Microchip Technology Inc.
DS21798C-page 17
TC1301A/B
6.3
EQUATION 6-3:
T J ( MAX ) = P TOTAL × Rθ JA + T AMAX
Where:
TJ(MAX)
=
Maximum continuous junction temperature
PTOTAL
=
Total device power dissipation
RθJA
=
Thermal resistance from junctionto-ambient
TAMAX
=
Maximum ambient temperature
The maximum power dissipation capability for a
package can be calculated given the junction to
ambient thermal resistance and the maximum ambient
temperature for the application. The following equation
can be used to determine the package maximum
internal power dissipation.
EQUATION 6-4:
( T J ( MAX ) – T A ( MAX ) )
P D ( MAX ) = --------------------------------------------------Rθ JA
Where:
PD(MAX)
=
Maximum device power
dissipation
TJ(MAX)
=
Maximum continuous junction
temperature
TAMAX
=
Maximum ambient temperature
RθJA
=
Thermal resistance from junctionto-ambient
EQUATION 6-5:
T J ( RISE ) = P D ( MAX ) × Rθ JA
Where:
TJ(RISE)
=
Rise in device junction
temperature over the ambient
temperature
PD(MAX)
=
Maximum device power
dissipation
RθJA
=
Thermal resistance from junctionto-ambient
EQUATION 6-6:
T J = T J ( RISE ) + T A
Where:
TJ
=
Junction Temperature
TJ(RISE)
=
Rise in device junction
temperature over the ambient
temperature
TA
=
DS21798C-page 18
Ambient Temperature
Typical Application
Internal power dissipation, junction temperature rise,
junction temperature, and maximum power dissipation
are calculated in the following example. The power
dissipation as a result of ground current is small
enough to be neglected.
6.3.1
POWER DISSIPATION EXAMPLE
Package
Package Type = 3x3 DFN8
Input Voltage
VIN = 2.7V to 4.2V
LDO Output Voltages and Currents
VOUT1 = 2.8V
IOUT1 = 300 mA
VOUT2 = 1.8V
IOUT2 = 150 mA
Maximum Ambient Temperature
TA(MAX) = 50°C
Internal Power Dissipation
Internal power dissipation is the sum of the power
dissipation for each LDO pass device.
PLDO1(MAX) = (VIN(MAX) - VOUT1(MIN)) x
IOUT1(MAX)
PLDO1 = (4.2V - (0.975 x 2.8V)) x 300 mA
PLDO1 = 441.0 milliWatts
PLDO2 = (4.2V - (0.975 X 1.8V)) x 150 mA
PLDO2 = 366.8 milliWatts
PTOTAL = PLDO1 + PLDO2
PTOTAL= 807.8 milliWatts
Device Junction Temperature Rise
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction to ambient for the application. The
thermal resistance from junction to ambient (RθJA) is
derived from an EIA/JEDEC standard for measuring
thermal resistance for small surface-mount packages.
The EIA/JEDEC specification is JESD51-7, “High
Effective Thermal Conductivity Test Board for Leaded
Surface Mount Packages”. The standard describes the
test method and board specifications for measuring the
thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
depending on many factors such as copper area and
thickness. Refer to AN792, “A Method To Determine
How Much Power a SOT-23 Can Dissipate in Your
Application” (DS00792), for more information regarding
this subject.
TJ(RISE) = PTOTAL x RqJA
TJRISE = 807.8 milliWatts x 41.0° C/W
TJRISE = 33.1°C
© 2008 Microchip Technology Inc.
TC1301A/B
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
TJ = TJRISE + TA(MAX)
TJ = 83.1°C
Maximum Package Power Dissipation at 50°C
Ambient Temperature
3X3DFN8 (41° C/W RθJA)
PD(MAX) = (125°C - 50°C) / 41° C/W
PD(MAX) = 1.83 Watts
MSOP8 (208° C/W RθJA)
PD(MAX) = (125°C - 50°C) / 208° C/W
PD(MAX) = 0.360 Watts
7.0
FIGURE 7-3:
Example.
3x3 DFN Silk-Screen
8-lead 3X3 DFN physical layout example with bypass
capacitor.
TYPICAL LAYOUT TC1301A
FIGURE 7-4:
Example.
FIGURE 7-1:
MSOP8 Silk Screen Layer.
When doing the physical layout for the TC1301A/B, the
highest priority is placing the input and output
capacitors as close to the device pins as is practical.
Figure 7-1 above represents a typical placement of the
components when using SMT0805 capacitors.
3x3 DFN Top Metal Layer
Vias represent the connection to a ground plane that is
below the wiring layer.
8.0
ADDITIONAL OUTPUT
VOLTAGE AND THRESHOLD
VOLTAGE OPTIONS
8.1
Output Voltage and Threshold
Voltage Range
Table 8-1 describes the range of output voltage options
available for the TC1301A/B. VOUT1 and VOUT2 can be
factory preset from 1.5V to 3.3V in 100 mV increments.
The VDET (TC1301A) or threshold voltage (TC1301B)
can be preset from 2.2V to 3.2V in 10 mV increments.
TABLE 8-1:
FIGURE 7-2:
MSOP8 Wiring Layer.
A wiring example for the TC1301A is shown. The vias
represent the connection to a ground plane that is
below the wiring layer.
© 2008 Microchip Technology Inc.
CUSTOM OUTPUT VOLTAGE
AND THRESHOLD VOLTAGE
RANGES
VOUT1
VOUT2
VDET Threshold
1.5V to 3.3V
1.5V to 3.3V
2.2V to 3.2V
For a listing of TC1301A/B standard parts, refer to the
Product Identification System on page 25.
DS21798C-page 19
TC1301A/B
9.0
PACKAGING INFORMATION
9.1
Package Marking Information
8-Lead MSOP
Example:
XXXXXX
YWWNNN
31AFHA
435256
— 31A = TC1301A
— F = 2.8V VOUT1
— H = 2.6V VOUT2
— A = 2.63V Reset
X1 represents VOUT1 configuration:
Code
VOUT1
A
B
C
D
E
F
8-Lead DFN
Example:
XXXX
YYWW
NNN
AFHA
0435
256
Xr represents the reset voltage range:
Code
VOUT1
Code
VOUT1
Code
Voltage
3.3V
J
2.4V
3.2V
K
2.3V
3.1V
L
3.0V
M
2.9V
2.8V
Code
Voltage
S
1.5V
A
T
1.65V
B
2.63V
J
—
2.2V
K
—
2.2V
U
2.85V
C
2.1V
V
2.65V
D
2.32V
L
—
2.5V
M
—
N
2.0V
W
1.85V
E
O
1.9V
X
—
F
2.4V
N
—
2.6V
O
—
G
2.7V
P
1.8V
Y
—
G
—
P
—
H
2.6V
Q
1.7V
Z
—
H
—
Q
—
I
2.5V
R
1.6V
I
—
R
—
X2 represents VOUT2 configuration:
Code
VOUT2
Code
VOUT2
Code
VOUT2
A
3.3V
J
2.4V
S
1.5V
B
3.2V
K
2.3V
T
1.65V
C
3.1V
L
2.2V
U
2.85V
D
3.0V
M
2.1V
V
2.65V
E
2.9V
N
2.0V
W
1.85V
F
2.8V
O
1.9V
X
—
G
2.7V
P
1.8V
Y
—
H
2.6V
Q
1.7V
Z
—
I
2.5V
R
1.6V
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS21798C-page 20
For a listing of TC1301A/B standard parts, refer to the
Product Identification System section on page 25.
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2008 Microchip Technology Inc.
TC1301A/B
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© 2008 Microchip Technology Inc.
DS21798C-page 21
TC1301A/B
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DS21798C-page 22
© 2008 Microchip Technology Inc.
TC1301A/B
APPENDIX A:
REVISION HISTORY
Revision C (February 2008)
The following is the list of modifications.
1.
Updated Section 9.0 “Packaging Information”.
Revision B (January 2005)
The following is the list of modifications.
1.
2.
Corrected the incorrect part number options
shown on the Product Identification System
page and changed the “standard” output voltage
and reset voltage combinations.
Added Appendix A: Revision History.
Revision A (September 2003)
• Original data sheet release.
© 2008 Microchip Technology Inc.
DS21798C-page 23
TC1301A/B
NOTES:
DS21798C-page 24
© 2008 Microchip Technology Inc.
TC1301A/B
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
TC1301
X-
X
X
X
XX
XX
Package
Tube
or
Tape &
Reel
X
Type VOUT1 VOUT2 Reset
Temp
Voltage Range
A/B
Standard
Configurations
Device:
TC1301A: Dual LDO with microcontroller RESET function
and single shutdown input.
TC1301B: Dual LDO with microcontroller RESET function
and dual shutdown inputs.
Standard
Configurations: *
TC1301A
TC1301B
VOUT1/VOUT2/Reset
Configuration
Code
3.3 / 3.0 / 2.63
3.3 / 1.8 / 2.63
3.0 / 2.8 / 2.63
3.0 / 1.8 / 2.63
2.8 / 3.0 / 2.63
2.8 / 2.6 / 2.63
1.8 / 2.8 / 2.32
1.5 / 2.8 / 2.32
2.85 / 1.85 / 2.63
ADA
APA
DFA
DPA
FDA
FHA
PFC
SFC
UWA
3.3 / 3.0 / 2.63
3.3 / 1.8 / 2.63
3.0 / 2.8 / 2.63
3.0 / 1.8 / 2.63
2.8 / 3.0 / 2.63
2.8 / 2.6 / 2.63
2.7 / 2.8 / 2.5
2.7 / 3.0 / 2.50
2.85 / 1.85 / 2.63
ADA
APA
DFA
DPA
FDA
FHA
GFD
GDD
UWA
* Contact Factory for Alternate Output Voltage and Reset
Voltage Configurations.
Temperature Range:
V
Examples:
a)
TC1301A-ADAVUA:
b)
TC1301A-APAVMFTR:
c)
TC1301A-DFAVUATR:
d)
TC1301A-DPAVMF:
e)
TC1301A-FDAVMF:
f)
TC1301A-FHAVMF:
g)
TC1301A-PFCVUA:
h)
TC1301A-SFCVMFTR:
i)
TC1301A-UWAVUATR:
a)
TC1301B-ADAVMF:
b)
TC1301B-APAVMFTR:
c)
TC1301B-DFAVUA:
d)
TC1301B-DPAVUATR:
e)
TC1301B-FDAVMF:
f)
TC1301B-FHAVMFTR:
g)
TC1301B-GDDVUA:
h)
TC1301B-GFDVMF:
i)
TC1301B-UWAVUATR:
= -40°C to +125°C
Package:
MF
UA
= Dual Flat, No Lead (3x3 mm body), 8-lead
= Plastic Micro Small Outline (MSOP), 8-lead
Tube or
Tape and Reel:
Blank
TR
= Tube
= Tape and Reel
© 2008 Microchip Technology Inc.
3.3, 3.0, 2.63,
MSOP pkg.
3.3 , 1.8, 2.63,
8LD DFN pkg.
Tape and Reel
3.0, 2.8 , 2.63,
MSOP pkg.
Tape and Reel
3.0, 1.8 , 2.63,
8LD DFN pkg.
2.8, 3.0, 2.63,
8LD DFN pkg.
2.8, 2.6, 2.63,
DFN pkg.
1.8, 2.8, 2.32,
MSOP pkg.
1.5, 2.8, 2.32,
DFN pkg.
Tape and Reel
2.85, 1.85, 2.63,
MSOP pkg.
Tape and Reel
3.3, 3.0, 2.63,
8LD DFN pkg.
3.3, 1.8, 2.63,
8LD DFN pkg.
Tape and Reel
3.0, 2.8, 2.63,
MSOP pkg.
3.0, 1.8 ,2.63,
MSOP pkg.
Tape and Reel
2.8 ,3.0, 2.63,
8LD DFN pkg.
2.8, 2.6 ,2.63,
8LD DFN pkg.
Tape and Reel
2.7, 3.0, 2.50,
MSOP pkg.
2.7, 2.8, 2.5,
8LD DFN pkg.
2.85, 1.85, 2.63,
MSOP pkg.
Tape and Reel
21798C-page 25
TC1301A/B
NOTES:
21798C-page 26
© 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PRO MATE, rfPIC and SmartShunt are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2008 Microchip Technology Inc.
DS21798C-page 27
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
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Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
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Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
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Tel: 45-4450-2828
Fax: 45-4485-2829
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Tel: 91-20-2566-1512
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Tel: 886-7-536-4818
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Tel: 86-592-2388138
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Tel: 886-2-2500-6610
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Tel: 66-2-694-1351
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Italy - Milan
Tel: 39-0331-742611
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Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
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Tel: 44-118-921-5869
Fax: 44-118-921-5820
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Tel: 86-756-3210040
Fax: 86-756-3210049
01/02/08
DS21798C-page 28
© 2008 Microchip Technology Inc.