NTMFS5834NL, NVMFS5834NL Power MOSFET 40 V, 75 A, 9.3 mW, Single N−Channel Features • • • • • • Low RDS(on) Low Capacitance Optimized Gate Charge NVMFS5834NLWF − Wettable Flanks Product NVMFS Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX 40 V 75 A 13.6 mW @ 4.5 V D (5,6) MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ±20 V ID 14 A Continuous Drain Current RqJA (Note 1) TA = 25°C TA = 100°C Power Dissipation RqJA (Note 1) Continuous Drain Current RqJC (Note 1) TA = 25°C Steady State TA = 100°C TC = 25°C TC = 25°C ID D PD 1 W 107 75 276 A TJ, TSTG −55 to +175 °C IS 75 A Single Pulse Drain−to−Source Avalanche Energy (L = 0.1 mH) EAS 48 mJ IAS 31 A Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Source Current (Body Diode) MARKING DIAGRAM A 75 IDM Operating Junction and Storage Temperature N−CHANNEL MOSFET W 3.6 63 TC = 100°C tp = 10 ms Pulsed Drain Current S (1,2,3) 2.5 TC = 100°C Power Dissipation RqJC (Note 1) G (4) 12 PD ID MAX 9.3 mW @ 10 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. DFN5 (SO−8FL) CASE 488AA STYLE 1 A Y W ZZ S S S G D XXXXXX AYWZZ D D = Assembly Location = Year = Work Week = Lot Traceability ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Junction−to−Case (Bottom) (Note 1) RqJC 1.4 Junction−to−Case (Top) (Note 1) RqJC 4.5 Junction−to−Ambient Steady State (Note 1) RqJA 41 Junction−to−Ambient Steady State (Note 2) RqJA 75 Unit °C/W 1. Surface−mounted on FR4 board using 1 sq−in pad (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface−mounted on FR4 board using 0.155 in sq (100mm2) pad size. © Semiconductor Components Industries, LLC, 2014 July, 2014 − Rev. 6 1 Publication Order Number: NTMFS5834NL/D NTMFS5834NL, NVMFS5834NL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 34.7 VGS = 0 V, VDS = 40 V mV/°C TJ = 25 °C 1.0 TJ = 125°C 100 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA ±100 mA nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance RDS(on) 1.0 3.0 5.7 VGS = 10 V ID = 20 A 7.1 9.3 VGS = 4.5 V ID = 20 A 11.3 13.6 gFS VDS = 5 V, ID = 20 A V mV/°C 29 mW S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 1231 VGS = 0 V, f = 1 MHz, VDS = 20 V 198 pF 141 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 20 V; ID = 20 A Total Gate Charge QG(TOT) 12 Threshold Gate Charge QG(TH) 1.0 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 6.3 Plateau Voltage VGP 3.4 V Gate Resistance RG 0.7 W td(ON) 10 VGS = 4.5 V, VDS = 20 V; ID = 20 A 24 nC 4.2 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(OFF) VGS = 4.5 V, VDS = 20 V, ID = 20 A, RG = 2.5 W tf 56.4 ns 17.4 6.6 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.84 TJ = 125°C 0.72 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 20 A 1.2 V 18 VGS = 0 V, dIS/dt = 100 A/ms, IS = 20 A QRR 10 11 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns 8.0 nC NTMFS5834NL, NVMFS5834NL TYPICAL CHARACTERISTICS 150 150 TJ = 25°C VDS ≥ 10 V 5.0 V 125 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 V 4.5 V 100 75 4.0 V 50 3.5 V 25 125 100 75 50 TJ = 25°C 25 TJ = 125°C 3.0 V 0 1 2 3 4 5 3 4 5 6 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.050 ID = 20 A TJ = 25°C 0.040 0.030 0.020 0.010 0.000 2 4 6 8 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.020 TJ = 25°C 0.018 0.016 VGS = 4.5 V 0.014 0.012 0.010 VGS = 10 V 0.008 0.006 0.004 5 15 25 35 45 55 65 75 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10,000 2.0 VGS = 0 V VGS = 10 V ID = 20 A IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 2 VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 1.8 TJ = −55°C 0 1.6 1.4 1.2 1.0 TJ = 150°C 1,000 TJ = 125°C 0.8 0.6 −50 100 −25 0 25 50 75 100 125 150 175 10 20 30 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 40 NTMFS5834NL, NVMFS5834NL TYPICAL CHARACTERISTICS 10 VGS = 0 V TJ = 25°C 1600 C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) 1800 1400 Ciss 1200 1000 800 600 Coss 400 200 Crss 0 0 10 20 30 40 4 Qgs Qgd 2 VDS = 20 V ID = 20 A TJ = 25°C 0 0 5 10 15 20 Qg, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source Voltage vs. Total Charge 25 40 IS, SOURCE CURRENT (A) 100 t, TIME (ns) 6 Figure 7. Capacitance Variation VDD = 32 V ID = 20 A VGS = 4.5 V tr td(on) td(off) 10 tf 1 1 10 100 VGS = 0 V TJ = 25°C 30 20 10 0 0.5 0.6 0.7 0.8 0.9 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1.0 50 EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) 100 10 ms ID, DRAIN CURRENT (A) 8 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 10 100 ms 1 ms 10 ms 1 VGS = 10 V Single Pulse TC = 25°C 0.1 0.01 QT dc RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 40 30 20 10 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 175 NTMFS5834NL, NVMFS5834NL TYPICAL CHARACTERISTICS RqJA(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE 100 Duty Cycle = 0.5 10 1 0.2 0.1 0.05 0.02 0.01 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Response DEVICE ORDERING INFORMATION Marking Package Shipping† NTMFS5834NLT1G 5834L DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5834NLT1G V5834L DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5834NLWFT1G 5834LW DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5834NLT3G V5834L DFN5 (Pb−Free) 5000 / Tape & Reel NVMFS5834NLWFT3G 5834LW DFN5 (Pb−Free) 5000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NTMFS5834NL, NVMFS5834NL PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO−8FL) CASE 488AA ISSUE K 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A 2 B D1 2X 0.20 C 4X E1 2 q E c 1 2 3 DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q A1 4 TOP VIEW 0.10 C 3X C e SEATING PLANE DETAIL A A STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 0.10 C SIDE VIEW 8X b 0.10 C A B 0.05 c 3X 4X 1.270 0.750 4X 1.000 e/2 L 1 4 0.965 K 1.330 2X 0.905 2X E2 PIN 5 (EXPOSED PAD) G SOLDERING FOOTPRINT* DETAIL A MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 −−− 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.15 5.30 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.15 6.30 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.61 0.71 1.20 1.35 1.50 0.51 0.61 0.71 0.125 REF 3.00 3.40 3.80 0_ −−− 12 _ L1 0.495 M 4.530 3.200 0.475 D2 2X 1.530 BOTTOM VIEW 4.560 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NTMFS5834NL/D