PD - 96040C
IRF1404ZPbF
IRF1404ZSPbF
IRF1404ZLPbF
Features
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
HEXFET® Power MOSFET
V(BR)DSS
D
40V
RDS(on) typ.
max.
G
I D (Silicon Limited)
Description
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of
this design are a 175°C junction operating temperature,
fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in a wide variety of applications.
I D (Package Limited)
S
TO-220AB
IRF1404ZPbF
D2Pak
IRF1404ZSPbF
2.7mΩ
3.7mΩ
l
180A
120A
TO-262
IRF1404ZLPbF
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS (Thermally limited)
EAS (Tested )
IAR
EAR
TJ
T STG
Max.
c
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
d
c
g
h
W/°C
V
mJ
A
mJ
°C
i
Parameter
RθCS
Case-to-Sink, Flat Greased Surface
RθJA
Junction-to-Ambient
RθJA
Junction-to-Ambient (PCB Mount)
i
W
-55 to + 175
Thermal Resistance
Junction-to-Case
A
1.3
± 20
330
480
See Fig.12a, 12b, 15, 16
Operating Junction and
Storage Temperature Range
RθJC
Units
l
l
l
710
200
Power Dissipation
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
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180
120
120
Continuous Drain Current, VGS @ 10V (S ilicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V (P ackage L imited)
Pulsed Drain Current
j
i
300 (1.6mm from case )
10 lbf in (1.1N m)
y
y
Typ.
Max.
–––
0.75
0.50
–––
–––
62
–––
40
k
Units
°C/W
1
06/19/12
IRF1404Z/S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Typ. Max. Units
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
40
–––
–––
2.0
170
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.033
2.7
–––
–––
–––
–––
–––
–––
100
31
42
18
110
36
58
4.5
–––
–––
3.7
4.0
–––
20
250
200
-200
150
–––
–––
–––
–––
–––
–––
–––
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
4340
1030
550
3300
920
1350
–––
–––
–––
–––
–––
–––
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
V(BR)DSS
ΔV(BR)DSS /ΔT J
RDS(on)
VGS(th)
gfs
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
IGSS
Conditions
V VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 75A **
V VDS = VGS , ID = 150μA
V VDS = 25V, ID = 75A**
μA VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, T J = 125°C
nA VGS = 20V
VGS = -20V
ID = 75A**
nC VDS = 32V
VGS = 10V
VDD = 20V
ID = 75A**
ns RG = 3.0 Ω
e
e
e
VGS = 10V
Between lead,
nH
pF
f
Source-Drain Ratings and Characteristics
Min.
Typ. Max. Units
IS
Continuous Source Current
Parameter
–––
–––
120
ISM
(Body Diode)
Pulsed Source Current
–––
–––
750
VSD
trr
Qrr
ton
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
28
34
1.3
42
51
2
c
l
Conditions
MOSFET symbol
A
V
ns
nC
showing the
integral reverse
p-n junction diode.
T J = 25°C, IS = 75A**,VGS = 0V
T J = 25°C, IF = 75A**, VDD = 20V
di/dt = 100A/μs
e
e
Intrins ic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF1404Z/S/LPbF
1000
1000
VGS
100
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
TOP
10
4.5V
1
20μs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
4.5V
10
100
0.1
1
VDS, Drain-to-Source Voltage (V)
10
100
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
200
T J = 25°C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current ( A)
20μs PULSE WIDTH
Tj = 175°C
T J = 175°C
100
10
VDS = 15V
20μs PULSE WIDTH
1
4.0
5.0
6.0
7.0
8.0
9.0
10.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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T J = 175°C
160
120
T J = 25°C
80
40
VDS = 15V
20μs PULSE WIDTH
0
11.0
0
40
80
120
160
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3
IRF1404Z/S/LPbF
8000
VGS, Gate-to-Source Voltage (V)
Coss = Cds + Cgd
6000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Ciss
4000
2000
Coss
Crss
ID= 75A
VDS= 32V
VDS= 20V
16
12
8
4
0
0
1
10
0
100
VDS, Drain-to-Source Voltage (V)
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000.0
T J = 175°C
100.0
10.0
T J = 25°C
1.0
VGS = 0V
0.1
0.2
0.6
1.0
1.4
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
80
120
160
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
4
40
Q G Total Gate Charge (nC)
1000
100
100μsec
10
1
1.8
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
0
1
10msec
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF1404Z/S/LPbF
200
2.0
ID , Drain Current (A)
160
120
80
40
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
ID = 75A
VGS = 10V
1.5
(Normalized)
RDS(on) , Drain-to-Source On Resistance
LIMITED BY PACKAGE
1.0
0.5
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
Thermal Response ( Z thJC )
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF1404Z/S/LPbF
DRIVER
L
VDS
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
600
15V
TOP
500
BOTTOM
ID
31A
53A
75A
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
4.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2μF
.3μF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
ID = 250μA
3.0
2.0
1.0
-75 -50 -25
VGS
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRF1404Z/S/LPbF
Avalanche Current (A)
10000
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Δ Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
Duty Cycle = Single Pulse
1000
0.01
100
0.05
0.10
10
1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
400
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 75A
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRF1404Z/S/LPbF
D.U.T
Driver Gate Drive
+
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*
RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRF1404Z/S/LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED ON WW 19, 2000
IN THE AS SEMBLY LINE "C"
Note: "P" in assembly line position
indicates "Lead - Free"
INTERNATIONAL
RECTIFIER
LOGO
ASS EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WEEK 19
LINE C
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1404z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRF1404Z/S/LPbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
T HIS IS AN IRF 530S WIT H
LOT CODE 8024
AS SEMBLED ON WW 02, 2000
IN T HE ASSE MBLY LINE "L"
INT ERNAT IONAL
RECT IF IE R
LOGO
ASSE MBLY
LOT CODE
PART NUMBER
F 530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
OR
INTERNAT IONAL
RECTIF IER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
F 530S
DAT E CODE
P = DESIGNAT ES LEAD - F REE
PRODUCT (OPT IONAL)
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SIT E CODE
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1404z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRF1404Z/S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
AS S EMBL ED ON WW 19, 1997
IN T HE AS S EMBLY LINE "C"
INT ERNATIONAL
RECTIFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
OR
INTERNATIONAL
RECTIFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
DATE CODE
P = DES IGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
WEEK 19
A = AS S EMBLY S ITE CODE
Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/datasheets/data/auirf1404z.pdf
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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11
IRF1404Z/S/LPbF
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Notes:
Repetitive rating; pulse width limited by
This is only applied to TO-220AB pakcage.
max. junction temperature. (See fig. 11).
This is applied to D2Pak, when mounted on 1" square PCB (FR Limited by TJmax, starting TJ = 25°C, L = 0.11mH
4 or G-10 Material). For recommended footprint and soldering
RG = 25Ω, IAS = 75A, VGS =10V. Part not
techniques refer to application note #AN-994.
recommended for use above this value.
TO-220 device will have an Rth value of 0.65°C/W.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Calculated continuous current based on maximum allowable
Coss eff. is a fixed capacitance that gives the
junction temperature. Bond wire current limit is 120A. Note that
same charging time as Coss while VDS is rising
current limitations arising from heating of the device leads may
from 0 to 80% VDSS .
occur with some lead mounting arrangements.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for
** All AC and DC test condition based on former Package limited
typical repetitive avalanche performance.
current of 75A.
This value determined from sample failure
population. 100% tested to this value in production.
Data and specifications subject to change without notice.
This product has been designed and qualified for theIndustrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/2012
12
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