PD - 11371 IRF1404Z AUTOMOTIVE MOSFET HEXFET® Power MOSFET Features ● ● ● ● ● Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax D VDSS = 40V RDS(on) = 3.7mΩ G ID = 75A S Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. TO-220AB Absolute Maximum Ratings Parameter Max. ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100°C Continuous Drain Current, VGS @ 10V Units 190 A 130 ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current IDM 750 PD @TC = 25°C Power Dissipation 220 W Linear Derating Factor VGS Gate-to-Source Voltage EAS (Thermally limited) Single Pulse Avalanche Energy Single Pulse Avalanche Energy Tested Value EAS (Tested ) 1.5 ± 20 W/°C V 320 mJ 75 c d c IAR Avalanche Current EAR Repetitive Avalanche Energy TJ Operating Junction and TSTG Storage Temperature Range g Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw h 480 See Fig.12a, 12b, 15, 16 -55 to + 175 °C 300 (1.6mm from case ) y y 10 lbf in (1.1N m) Thermal Resistance Parameter Typ. Max. RθJC Junction-to-Case ––– 0.67 RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– RθJA Junction-to-Ambient ––– 62 www.irf.com A mJ Units °C/W 1 3/5/03 IRF1404Z Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Parameter Min. Typ. Max. Units V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.033 ––– RDS(on) Static Drain-to-Source On-Resistance ––– 2.7 3.7 VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 gfs IDSS Forward Transconductance 170 ––– Drain-to-Source Leakage Current ––– ––– ––– ––– 250 IGSS V Conditions VGS = 0V, ID = 250µA V/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 75A e V VDS = VGS, ID = 250µA ––– V VDS = 25V, ID = 75A 20 µA VDS = 40V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125°C Gate-to-Source Forward Leakage ––– ––– 200 Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = 20V Qg Total Gate Charge ––– 100 150 Qgs Gate-to-Source Charge ––– 31 ––– Qgd Gate-to-Drain ("Miller") Charge ––– 42 ––– VGS = 10V td(on) Turn-On Delay Time ––– 18 ––– VDD = 20V tr Rise Time ––– 110 ––– td(off) Turn-Off Delay Time ––– 36 ––– tf Fall Time ––– 58 ––– VGS = 10V LD Internal Drain Inductance ––– 4.5 ––– Between lead, LS Internal Source Inductance ––– 7.5 ––– 6mm (0.25in.) from package Ciss Input Capacitance ––– 4340 ––– and center of die contact VGS = 0V Coss Output Capacitance ––– 1030 ––– Crss Reverse Transfer Capacitance ––– 550 ––– Coss Output Capacitance ––– 3300 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Coss Output Capacitance ––– 920 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz Coss eff. Effective Output Capacitance ––– 1350 ––– VGS = 0V, VDS = 0V to 32V VGS = -20V ID = 75A nC VDS = 32V e ID = 75A ns nH RG = 3.0 Ω e VDS = 25V pF ƒ = 1.0MHz f Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units IS Continuous Source Current ––– ––– 75 ISM (Body Diode) Pulsed Source Current ––– ––– 750 VSD (Body Diode) Diode Forward Voltage ––– ––– 1.3 V trr Reverse Recovery Time ––– 28 42 ns Qrr Reverse Recovery Charge ––– 34 51 nC ton Forward Turn-On Time c Conditions MOSFET symbol A showing the integral reverse p-n junction diode. TJ = 25°C, IS = 75A, VGS = 0V e TJ = 25°C, IF = 75A, VDD = 25V di/dt = 100A/µs e Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Coss eff. is a fixed capacitance that gives the same charging time max. junction temperature. (See fig. 11). as Coss while VDS is rising from 0 to 80% VDSS . Limited by TJmax, starting TJ = 25°C, L = 0.11mH Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive RG = 25Ω, IAS = 75A, VGS =10V. Part not avalanche performance. recommended for use above this value. This value determined from sample failure population. 100% Pulse width ≤ 1.0ms; duty cycle ≤ 2%. tested to this value in production. Repetitive rating; pulse width limited by 2 www.irf.com IRF1404Z 1000 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 100 TOP ID, Drain-to-Source Current (A) TOP ID, Drain-to-Source Current (A) 1000 VGS 10 4.5V 1 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 100 4.5V 20µs PULSE WIDTH Tj = 25°C 0.1 10 0.1 1 10 100 0.1 1 VDS, Drain-to-Source Voltage (V) 10 100 VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 200 T J = 25°C Gfs, Forward Transconductance (S) ID, Drain-to-Source Current ( A) 20µs PULSE WIDTH Tj = 175°C T J = 175°C 100 10 VDS = 15V 20µs PULSE WIDTH 1 T J = 175°C 160 120 T J = 25°C 80 40 VDS = 15V 20µs PULSE WIDTH 0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 11.0 0 40 80 120 160 ID, Drain-to-Source Current (A) Fig 4. Typical Forward Transconductance Vs. Drain Current 3 IRF1404Z 8000 VGS , Gate-to-Source Voltage (V) Coss = Cds + Cgd 6000 C, Capacitance (pF) 20 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Ciss 4000 2000 Coss ID= 75A VDS= 32V VDS= 20V 16 12 8 4 Crss 0 0 1 10 0 100 40 80 120 160 Q G Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 10000 1000.0 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY R DS(on) T J = 175°C 100.0 10.0 T J = 25°C 1.0 VGS = 0V 0.1 0.2 0.6 1.0 1.4 VSD, Source-toDrain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 1000 100 100µsec 10 1 1.8 1msec Tc = 25°C Tj = 175°C Single Pulse 0 1 10msec 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF1404Z 200 2.0 ID , Drain Current (A) 160 120 80 40 0 25 50 75 100 125 150 175 ID = 75A VGS = 10V 1.5 (Normalized) RDS(on) , Drain-to-Source On Resistance LIMITED BY PACKAGE 1.0 0.5 -60 -40 -20 T C , Case Temperature (°C) 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C) Fig 10. Normalized On-Resistance Vs. Temperature Fig 9. Maximum Drain Current Vs. Case Temperature 1 Thermal Response ( Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF1404Z DRIVER L VDS D.U.T RG + V - DD IAS VGS 20V A 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp EAS, Single Pulse Avalanche Energy (mJ) 600 15V ID 31A 53A BOTTOM 75A TOP 500 400 300 200 100 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) I AS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGD 4.0 VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50KΩ 12V .2µF .3µF D.U.T. + V - DS VGS(th) Gate threshold Voltage (V) QGS ID = 250µA 3.0 2.0 1.0 -75 VGS -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 Fig 14. Threshold Voltage Vs. Temperature www.irf.com IRF1404Z 10000 Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax Duty Cycle = Single Pulse 1000 0.01 100 0.05 0.10 10 1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth EAR , Avalanche Energy (mJ) 400 TOP Single Pulse BOTTOM 10% Duty Cycle ID = 75A 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy Vs. Temperature www.irf.com Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav 7 IRF1404Z D.U.T Driver Gate Drive + + - * D.U.T. ISD Waveform Reverse Recovery Current + RG V DD • dv/dt controlled by RG • Driver same type as D.U.T. • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer - D= Period P.W. + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent ISD Ripple ≤ 5% * VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs VDS VGS RG RD D.U.T. + -V DD 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 18a. Switching Time Test Circuit VDS 90% 10% VGS td(on) tr t d(off) tf Fig 18b. Switching Time Waveforms 8 www.irf.com IRF1404Z TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) -B- 3.78 (.149) 3.54 (.139) 4.69 (.185) 4.20 (.165) -A- 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN 3 14.09 (.555) 13.47 (.530) 4.06 (.160) 3.55 (.140) 3X 1.40 (.055) 3X 1.15 (.045) 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C TO-220AB packages are not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 3/03 www.irf.com 9