StrongIRFET
IRFS7430PbF
IRFSL7430PbF
HEXFET® Power MOSFET
Applications
l Brushed motor drive applications
l BLDC motor drive applications
l Battery powered circuits
l Half-bridge and full-bridge topologies
l Synchronous rectifier applications
l Resonant mode power supplies
l OR-ing and redundant power switches
l DC/DC and AC/DC converters
l DC/AC inverters
D
G
S
IRFSL7430PbF
IRFS7430PbF
TO-262
D2-Pak
195A
:
:
c
D
G
G
D2Pak
IRFS7430PbF
D
S
TO-262
IRFSL7430PbF
G
D
S
Gate
Drain
Source
Standard Pack
Form
Quantity
Tube
50
Tube
50
Tape and Reel Left
800
6.0
Orderable Part Number
IRFSL7430PbF
IRFS7430PbF
IRFS7430TRLPbF
500
ID = 100A
Limited By Package
400
4.0
T J = 125°C
2.0
300
200
100
T J = 25°C
0.0
0
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
ID (Package Limited)
S
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m Ω)
Package Type
40V
0.97m
1.2m
426A
D
Benefits
l Improved gate, avalanche and dynamic dV/dt
ruggedness
l Fully characterized capacitance and avalanche
SOA
l Enhanced body diode dV/dt and dI/dt capability
l Lead-free
Base Part Number
VDSS
R DS(on) typ.
max.
ID (Silicon Limited)
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25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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November 6, 2014
IRFS/SL7430PbF
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
EAS (Thermally limited)
EAS (Thermally limited)
IAR
EAR
d
Thermal Resistance
Symbol
RθJC
RθJA
c
c
d
VGS
TJ
TSTG
Units
Max.
426
301
195
1524
375
2.5
± 20
-55 to + 175
A
W
W/°C
V
°C
300
e
k
760
1452
See Fig. 15, 16, 22a, 22b
d
Parameter
Junction-to-Case
Junction-to-Ambient (PCB Mount, steady-state)
j
Typ.
–––
–––
l
Max.
0.40
40
mJ
A
mJ
Units
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
ΔV(BR)DSS/ΔTJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
IDSS
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
RG
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.15mH
RG = 50Ω, IAS = 100A, VGS =10V.
ISD ≤ 100A, di/dt ≤ 990A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
2
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Min.
40
–––
–––
–––
2.2
–––
–––
–––
–––
–––
Typ.
–––
0.014
0.97
1.2
–––
–––
–––
–––
–––
2.1
Max.
–––
–––
1.2
–––
3.9
1.0
150
100
-100
–––
Units
V
V/°C
mΩ
V
μA
nA
Conditions
VGS = 0V, ID = 250μA
Reference to 25°C, ID = 1.0mA
VGS = 10V, ID = 100A
VGS = 6.0V, ID = 50A
VDS = VGS, ID = 250μA
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
g
g
Ω
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS .
Rθ is measured at TJ approximately 90°C..
Limited by TJmax starting TJ = 25°C, L= 1mH, RG = 50Ω, IAS = 54A, VGS =10V.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.
http://www.irf.com/technical-info/appnotes/an-994.pdf
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November 6, 2014
IRFS/SL7430PbF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min.
150
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
300
77
98
202
32
105
160
100
14240
2130
1460
2605
2920
Max.
–––
460
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Units
S
nC
Min.
–––
Typ.
–––
Max.
426
Units
A
–––
–––
1524
A
–––
–––
–––
–––
–––
–––
–––
0.86
2.7
52
52
97
97
2.3
1.2
–––
–––
–––
–––
–––
–––
V
V/ns
ns
Conditions
VDS = 10V, ID = 100A
ID = 100A
VDS =20V
VGS = 10V
ID = 100A, VDS =0V, VGS = 10V
VDD = 20V
ID = 30A
RG = 2.7Ω
VGS = 10V
VGS = 0V
VDS = 25V
ƒ = 1.0 MHz
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
g
ns
pF
g
i
h
Diode Characteristics
Symbol
VSD
dv/dt
trr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Peak Diode Recovery
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
IS
ISM
d
f
3
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c
nC
A
Conditions
D
MOSFET symbol
showing the
G
integral reverse
S
p-n junction diode.
TJ = 25°C, IS = 100A, VGS = 0V
TJ = 175°C, IS = 100A, VDS = 40V
TJ = 25°C
VR = 34V,
TJ = 125°C
IF = 100A
di/dt = 100A/μs
TJ = 25°C
TJ = 125°C
TJ = 25°C
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g
g
November 6, 2014
IRFS/SL7430PbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
10
4.5V
BOTTOM
100
4.5V
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
1
0.1
1
10
0.1
100
Fig 3. Typical Output Characteristics
100
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 4. Typical Output Characteristics
1000
100
T J = 25°C
TJ = 175°C
10
VDS = 25V
≤60μs PULSE WIDTH
1.0
ID = 100A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
2
3
4
5
6
7
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
14.0
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Ciss
10000
Coss
Crss
1000
ID= 100A
12.0
VDS= 32V
VDS= 20V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
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0
50
100 150 200 250 300 350 400
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFS/SL7430PbF
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
100
10
T J = 25°C
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100μsec
1msec
100
10
10msec
1
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
2.0
0.1
2.5
1
10
100
VDS, Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode
Forward Voltage
2.5
47
Id = 1.0mA
VDS= 0V to 32V
46
2.0
45
Energy (μJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
DC
Tc = 25°C
Tj = 175°C
Single Pulse
44
43
1.5
1.0
42
0.5
41
0.0
40
0
-60 -40 -20 0 20 40 60 80 100120140160180
5
T J , Temperature ( °C )
15
20
25
30
35
40
45
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( mΩ)
10
Fig 12. Typical COSS Stored Energy
6.0
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
4.0
VGS =10V
2.0
0.0
0
200
400
600
800
1000
1200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFS/SL7430PbF
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs.Pulsewidth
800
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
700
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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IRFS/SL7430PbF
12
3.5
3.0
2.5
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
4.0
ID = 250μA
ID = 1.0mA
2.0
ID = 1.0A
10
IF = 60A
V R = 34V
8
TJ = 25°C
TJ = 125°C
6
4
1.5
2
1.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
T J , Temperature ( °C )
600
800
1000
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
12
300
10
IF = 100A
V R = 34V
8
TJ = 25°C
TJ = 125°C
IF = 60A
V R = 34V
250
QRR (nC)
IRRM (A)
400
diF /dt (A/μs)
6
TJ = 25°C
TJ = 125°C
200
150
4
100
2
0
50
0
200
400
600
800
1000
0
200
diF /dt (A/μs)
400
600
800
1000
diF /dt (A/μs)
Fig. 19 - Typical Recovery Current vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
260
IF = 100A
V R = 34V
QRR (nC)
220
TJ = 25°C
TJ = 125°C
180
140
100
60
0
200
400
600
800
1000
diF /dt (A/μs)
Fig. 21 - Typical Stored Charge vs. dif/dt
7
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IRFS/SL7430PbF
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
V DD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
InductorCurrent
Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
V DS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
V GS
D.U.T.
RG
+
- V DD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2μF
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
8
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Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
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IRFS/SL7430PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
T HIS IS AN IRF 530S WIT H
LOT CODE 8024
AS S E MBL ED ON WW 02, 2000
IN T HE AS S EMB LY LINE "L"
INT ERNAT IONAL
RECT IF IER
L OGO
AS S EMBL Y
LOT CODE
PART NUMB ER
F 530S
DAT E CODE
YEAR 0 = 2000
WE EK 02
LINE L
OR
INT ERNAT IONAL
RE CT IF IER
L OGO
AS S EMBL Y
LOT CODE
PART NUMBE R
F 530S
DAT E CODE
P = DE S IGNAT ES L EAD - F REE
PRODUCT (OPT IONAL)
YEAR 0 = 2000
WE EK 02
A = AS S EMB L Y S IT E CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRFS/SL7430PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E XAMP L E : T H IS IS AN IR L 3103L
L OT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y L INE "C"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
P AR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
OR
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
PAR T NU MB E R
DAT E CODE
P = DE S IGNAT E S L E AD-F R E E
P R ODU CT (OP T IONAL )
YE AR 7 = 1997
WE E K 19
A = AS S E MB L Y S IT E CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRFS/SL7430PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
11
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IRFS/SL7430PbF
Qualification information†
Qualification level
Industrial
††
(per JEDEC JESD47F guidelines)
D2Pak
MS L 1
††
(per JE DE C J-S T D-020D )
TO-262
Not applicable
Yes
Moisture Sensitivity Level
RoHS compliant
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
• Updated EAS (L =1mH) = 1452mJ on page 2
11/6/2014
• Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50Ω, IAS = 54A, VGS =10V”. on page 2
• Updated package outline on page 9 & 10
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
12
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