PD - 97782A
StrongIRFET
IRFB7430PbF
Applications
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HEXFET® Power MOSFET
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
D
G
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
40V
1.0m
1.3m
409A
ID (Package Limited)
195A
c
D
Benefits
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Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Fully Characterized Capacitance and Avalanche
SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free
G
D
S
TO-220AB
IRFB7430PbF
G
D
S
Gate
Drain
Source
Ordering Information
Base Part Number
Package Type
TO-220
Complete Part Number
Quantity
50
IRFB7430PbF
500
6.0
ID = 100A
Limited By Package
400
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
IRFB7430PbF
Standard Pack
Form
Tube
4.0
T J = 125°C
2.0
300
200
100
T J = 25°C
0
0.0
4
6
8
10
12
14
16
18
VGS, Gate -to -Source Voltage (V)
20
Fig 1. Typical On-Resistance vs. Gate Voltage
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25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
1
05/22/12
IRFB7430PbF
Absolute Maximum Ratings
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Symbol
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
409
289
195
1524
A
PD @TC = 25°C
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting torque, 6-32 or M3 screw
375
2.5
± 20
-55 to + 175
W/°C
V
VGS
TJ
TSTG
Parameter
d
Avalanche Characteristics
EAS (Thermally limited)
EAS (tested)
IAR
EAR
Single Pulse Avalanche Energy
Symbol
e
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
d
Thermal Resistance
RJC
RCS
RJA
c
c
W
°C
300
10lbf in (1.1N m)
x
x
760
1360
See Fig. 14, 15, 22a, 22b
k
d
Parameter
j
Junction-to-Case
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
0.40
–––
62
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
V(BR)DSS/TJ
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
IDSS
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
RG
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.15mH
RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 990A/μs, VDD V(BR)DSS, TJ 175°C.
2
Min.
Typ.
40
–––
–––
–––
0.014
1.0
Max. Units
–––
–––
1.3
–––
2.2
–––
–––
–––
–––
–––
1.2
–––
–––
–––
–––
–––
2.1
–––
3.9
1.0
150
100
-100
–––
Conditions
V
VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 1.0mA
m VGS = 10V, ID = 100A
V
μA
nA
g
= 50A g
d
VGS = 6.0V, ID
VDS = VGS, ID = 250μA
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
Pulse width 400μs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS .
R is measured at TJ approximately 90°C..
This value determined from sample failure population,
starting TJ = 25°C, L= 0.15mH, R G = 50, IAS = 100A, VGS =10V.
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IRFB7430PbF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
h
i
Min.
Typ.
150
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
300
77
98
202
32
105
160
100
14240
2130
1460
2605
2920
Min.
Typ.
Max. Units
–––
460
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
VDS = 10V, ID = 100A
ID = 100A
VDS =20V
VGS = 10V
ID = 100A, VDS =0V, VGS = 10V
VDD = 20V
ID = 30A
R G = 2.7
VGS = 10V
VGS = 0V
VDS = 25V
ƒ = 1.0 MHz
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
g
ns
pF
g
i
h
Diode Characteristics
Symbol
IS
Parameter
VSD
dv/dt
trr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Peak Diode Recovery
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
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d
f
Max. Units
c
Conditions
MOSFET symbol
showing the
G
–––
–––
1576
A
integral reverse
p-n junction diode.
TJ = 25°C, IS = 100A, VGS = 0V
–––
0.86
1.2
V
–––
2.7
–––
V/ns TJ = 175°C, IS = 100A, VDS = 40V
–––
52
–––
ns TJ = 25°C
VR = 34V,
IF = 100A
–––
52
–––
TJ = 125°C
di/dt = 100A/μs
–––
97
–––
nC TJ = 25°C
–––
97
–––
TJ = 125°C
–––
2.3
–––
A
TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
–––
–––
394
A
g
D
S
g
3
IRFB7430PbF
1000
1000
100
BOTTOM
10
4.5V
BOTTOM
100
4.5V
60μs PULSE WIDTH
60μs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
1
0.1
1
10
0.1
100
Fig 3. Typical Output Characteristics
100
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 4. Typical Output Characteristics
1000
100
T J = 25°C
TJ = 175°C
10
VDS = 25V
60μs PULSE WIDTH
1.0
ID = 100A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
2
3
4
5
6
7
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
14.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
VGS, Gate-to-Source Voltage (V)
C rss = C gd
C oss = C ds + C gd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Ciss
10000
Coss
Crss
1000
ID= 100A
12.0
VDS= 32V
VDS= 20V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
0
50
100 150 200 250 300 350 400
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFB7430PbF
10000
T J = 175°C
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
10
T J = 25°C
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100
Limited by package
10msec
10
1
DC
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
2.0
0.1
2.5
1
10
100
VDS, Drain-toSource Voltage (V)
VSD, Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode
Forward Voltage
2.5
47
Id = 1.0mA
VDS= 0V to 32V
46
2.0
45
Energy (μJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
100μsec
1msec
44
43
1.5
1.0
42
0.5
41
0.0
40
0
-60 -40 -20 0 20 40 60 80 100120140160180
5
T J , Temperature ( °C )
15
20
25
30
35
40
45
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( m)
10
Fig 12. Typical COSS Stored Energy
6.0
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS =10V
4.0
2.0
0.0
0
200
400
600
800
1000
1200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
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5
IRFB7430PbF
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
800
700
EAR , Avalanche Energy (mJ)
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
600
500
400
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
175
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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IRFB7430PbF
12
3.5
3.0
2.5
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
4.0
ID = 250μA
ID = 1.0mA
2.0
ID = 1.0A
10
IF = 60A
V R = 34V
8
TJ = 25°C
TJ = 125°C
6
4
1.5
2
1.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
T J , Temperature ( °C )
600
800
1000
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
12
300
10
IF = 100A
V R = 34V
8
TJ = 25°C
TJ = 125°C
IF = 60A
V R = 34V
250
QRR (nC)
IRRM (A)
400
diF /dt (A/μs)
6
TJ = 25°C
TJ = 125°C
200
150
4
100
2
0
50
0
200
400
600
800
1000
0
200
diF /dt (A/μs)
400
600
800
1000
diF /dt (A/μs)
Fig. 20 - Typical Stored Charge vs. dif/dt
Fig. 19 - Typical Recovery Current vs. dif/dt
260
IF = 100A
V R = 34V
QRR (nC)
220
TJ = 25°C
TJ = 125°C
180
140
100
60
0
200
400
600
800
1000
diF /dt (A/μs)
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Fig. 21 - Typical Stored Charge vs. dif/dt
7
IRFB7430PbF
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
V DD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
InductorCurrent
Curent
ISD
Ripple 5%
* VGS = 5V for Logic Level Devices
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
V DS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
V GS
D.U.T.
RG
+
- V DD
V10V
GS
10%
VGS
Pulse Width µs
Duty Factor
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50K
12V
tf
.2F
.3F
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
8
Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
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IRFB7430PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
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TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Qualification information†
Qualification level
Industrial††
(per JEDEC JESD47F††† guidelines)
TO-220
RoHS compliant
Not applicable
Yes
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/
Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 05/2012
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9