AND8306/D 700 mA/1 A Buck Boost LED Driver using FETs, High Side Current Sensing and a NCP3063 Controller http://onsemi.com Prepared by: DENNIS SOLLEY ON Semiconductor INTRODUCTION particular application may require a driver to supply 700mA to a series string of 3 to 6 LEDs. From Table 1, the driver must support output variations between 7 volts and 26 volts. Therefore, a constant current converter with both a wide input (9-19 V) and wide overlapping output ranges (7-26V), is preferred. This application note targets a current regulated, non inverting buck boost converter. In automotive applications (e.g. emergency vehicles), a high side current sensing scheme can simplify wiring by returning the LED string to chassis ground. The basic buck boost topology, consisting of a buck and boost converter cascaded together, is illustrated in Figure1. This application note and associated demo board will focus on driving 3 to 6 LEDs, at a regulated 700 mA/1A, from low voltage DC or AC sources commonly used in lighting applications at power levels to 20 W. This note is an extension of Application Note AND8305/D. LED Characteristics By combining LED manufacturer's data, taken from several product families, it is possible to come up with minimum and maximum forward voltage drops for a “generic” LED, operating at a specified current. This voltage variation is presented in Table 1, and extended to include 3 to 6 LED combinations at 700 mA. Q1 D2 +Vin +Vout Table 1. Output Voltage Variation for a “Generic” 700 mA LED Generic LED # String Q2 Current (A) VMIN (V) @ TJ(max)5C (Note 1) VMAX (V) @ 255C 1 LED 0.70 2.41 4.41 3 LEDs 0.70 7.22 13.23 4 LEDs 0.70 11.50 17.64 5 LEDs 0.70 12.03 22.05 Either FETs or BJTs can be selected as the primary switches Q1/Q2. In the 20 W power range FETs are the preferred choice. Application Note AND8305/D covers a 7W application using BJTs. 6 LEDs 0.70 14.43 26.46 Theory of Operation D1 Figure 1. Buck Boost Converter To minimize power dissipation in the power circuit, low ripple current is required. So the converter is run in continuous current mode (CCM). For this analysis, all power components are assumed ideal. During the first switching interval D*TSW, Q1 and Q2 are turned ON by the controller across the input source Vin and allow energy to be stored in the inductor. During the second switching interval (1-D)*TSW, switches Q1 and Q2 are turned off by the controller, allowing diodes D1 and D2 to conduct and deliver the energy stored in the inductor to the load. 1. TJ(max) based on LED manufacturer's maximum rating Driver Definition A typical automotive input requirement may require continuous operation between 9 V and 16 V, excursions between 18 V and 19 V for one hour, a double battery jump start to 26 V for one minute and finally a load dump to 70V (typically absorbed by avalanching alternator rectifiers or by a transient suppressor). Similar requirements apply in AC situations. Depending on the illumination required, a © Semiconductor Components Industries, LLC, 2007 December, 2007 - Rev. 0 1 Publication Order Number: AND8306/D AND8306/D Varying the duty cycle will vary the output. When D is below 0.5, the converter is in buck mode, when D is above 0.5, the converter is in boost mode and when D equals 0.5, the voltage gain Vout/Vin is unity. The ripple current in the inductor is given by expression (1-D) * TSW Vout DI L1 + Vin Figure 2. Voltage Waveform Across the Inductor For the inductor flux (V*ms) to remain in equilibrium each switching cycle, the V*ms product across the inductor during each switch interval must balance (see Figure 4). Key Component Selection (eq. 1) -VGS, GATE-TO-SOURCE VOLTAGE (V) (eq. 2) 20 QT 4 -VGS -VDS 3 Q1 16 12 Q2 2 8 1 ID = -5.4 A TJ = 25°C 0 0 4 8 12 16 20 Qg, TOTAL GATE CHARGE (nC) 4 0 24 -VDS, DRAIN-TO-SOURCE VOLTAGE (V) 5 D 1*D VGS, GATE-TO-SOURCE VOLTAGE (V) NTMS5P02 and NTMS4705N were selected from ONSemiconductor's portfolio of FETs for Q1 and Q2 respectively. NTMS5P02 is a -20 V, 5.4 A SO-8 satisfying the 16 V input requirement with a 26 mW RDS(on) at -4.5V. Its gate charge characteristic is shown in Figure3. NTMS4705N is a 30 V, 12 A SO-8 satisfying the 26V output requirement with a 10.5 mW RDS(on) at 4.5 V. Its gate charge characteristic is shown in Figure 4. Rearranging Equation 1 the voltage gain of buck boost is given by: V out + V in @ (eq. 3) For a typical design case, where Vin = 12 V and D*TSW = 0.5*5 ms, a value for L1 of 47 mH (Equation 3) will maintain ±30% ripple current in a 700 mA application, thereby ensuring CCM operation. D * TSW V in @ D @ TSW + V out @ (1 * D) @ T SW V in @ D @ TSW L1 5 QT 4 QGS QGD VGS 3 2 ID = 10 A TJ = 25°C 1 0 0 Figure 3. Gate charge characteristic of NTMS5P02 3 6 9 12 Qg, TOTAL GATE CHARGE (nC) Figure 4. Gate Charge Characteristic The controller used is ON Semiconductor's NCP3063. A functional block diagram is shown in the Figure 5. http://onsemi.com 2 15 AND8306/D NCP3063 8 1 TSD N.C. Switch Collector SET Dominant R Q S 7 Ipk Sense Comparator + 2 S Q Switch Emitter SET Dominant R + 0.2 V Oscillator 6 3 CT Timing Capacitor +VCC 5 1.25 V Reference Regulator Comparator + - 4 GND Inverting Input Figure 5. Block Diagram of NCP3063 This device consists of a 1.25 V reference, comparator, oscillator, an active current limit circuit, a driver and a high current output switch. In its traditional operating mode, the NCP3063 is a hysteretic, regulator that uses a gated oscillator to control the output. Voltage feedback from the output is sensed at pin 5, and gates the oscillator on/off to regulate the output. The oscillator frequency and off-time of the output switch are programmed by the value selected for the timing capacitor; CT. CT is charged and discharged by a 1 to 6 ratio internal current source and sink, generating a ramp at pin 3. The ramp is controlled by two comparators whose levels are set 500 mV apart. In normal operation, D is fixed at 6/7 or 0.86. In this application, the “gated oscillator” mode is only used to protect the LED string if a LED fails “open”. The NCP3063 can also operate as a conventional PWM controller, by injecting current into the CT pin. The control current may be developed either from the input source, providing voltage feedforward or from the output current sensing circuit. In either case, the slope of the oscillator ramp changes causing D to be modulated as shown in Figure 6. VCC IFF IFB NCP3063 ICHARGE CT 6 ICHARGE Figure 6. Current Injection into CT Pin Providing Continuous Duty Cycle Modulation Schottky Diode Selection Schottky diodes have reverse leakage current which increases with reverse voltage and temperature. Hence it is important to select a device and package that will maintain the device temperature in the particular application to avoid thermal runaway. The effect is shown in Figure 7. http://onsemi.com 3 AND8306/D Referring to Figure 8, RS is the high side current sensing resistor. Two equal currents generated by the current sinks designated IREF, flow through resistors (RCM + RREF) and RCM. The voltage IREF*RCM creates a level shift to satisfy the common mode input requirements of the operational amplifier inputs, whose supply is tied to Vout. The additional voltage drop IREF* RREF appearing at the non inverting input, creates a reference VREF for the current sense circuit. The output of the operational amplifier provides current injection into the Ct pin of controller U1. The operational amplifier may be compensated to provide a high closed loop gain to “force” ILED to be equal to VREF / RS with high accuracy. 100 IR, REVERSE CURRENT (mA) TJ = 150°C 10 125°C 100°C 1 75°C 0.1 25°C 0.01 0.001 0 10 20 30 40 50 VR, REVERSE VOLTAGE (V) 60 70 Power Stage Schematics Figure 7. Reverse Leakage Characteristic of MBRD360 The schematic of the power stage is shown in Figure9. When the output Darlington switch within U1 is turned on each switching cycle, the gate source terminals of Q1 and Q2 are connected in series across Vin. As illustrated in Figures 3 and 4, the gate charge characteristics of Q1 and Q2 will be different. Hence the gate to source voltages VGS1/2 appearing at Q1 and Q3 will be defined by balancing the charge across each device. Hence VGS1*QT1 equals VGS2*QT2. As this is dependent on device characteristics, a zener diode D1 is used to define the VGS1 of Q1. Then the VGS2 of Q2 is defined approximately by (Vin-VD1) ignoring the drop in the output Darlington pair in U1. The gate losses in Q2 will increase with Vin, but this is preferable as the Nchannel device Q2 has half the total charge QT of the Pchannel device Q1. At the end of each switching cycle when the output switch within U2 turns off, small signal transistors Q2 and Q4 are activated to discharge the gate charge within 50 ns. When the driver is in boost mode driving multiple LEDs, maximum power (20 watts) is delivered through diodes D1 and D2. Under these conditions D2 also has a high reverse voltage across it. In order to process 20 watts on a 1.5 in. x 2in. demo board, MBRD340 was selected for D2. ILED RS RCM + RREF IFB RCM + - IREF IREF Figure 8. High Side Sensing Scheme http://onsemi.com 4 AND8306/D ISENSP ISENSN Q1 VIN TP1 L1 R5 TP2 LED+ R3 D5 R2 D3 Q2 D1 D2 Q3 D7 + C1 C3 C6 U1 1 R1 CLK 2 3 4 C2 NC SWC SWE ISENS CT VCC GND CMPINV RTN 8 Q4 7 R4 6 R7 5 LED- C4 R6 I_CNTRL Figure 9. Schematic of Power Stage I_SENSP R11 I_CNTRL U2A R8 R10 + - I_SENSN R12 R13 C5 R14 VIN Q5A R9 Q5B U3 R15 R16 Figure 11. Buck Mode from 12 Vin to 8 Vout Figure 10. High Side Current Sensing Control Circuit Note the parallel combination of R10 and R11 sets the VREF for 700 mA operation. If the converter is required to regulate at a 1 A constant current, R11 is removed. Converter Waveforms The voltage waveforms at both the input (upper trace) and output (lower trace) of the inductor L1 were measured while the difference waveform (middle trace) gives the voltage across the inductor. Figure 11 shows the converter operating in buck mode, while Figure 12 illustrates boost operation. The waveform shapes in Figures 11 and 12 are caused by the gate turn off delay associated with switch Q1. (Refer to application note AND8305/D for details.) Figure 12. Boost Mode from 12 Vin to 16 Vout http://onsemi.com 5 AND8306/D Demo Board The top side component layout of the NCP3063 buck boost demo board is shown in Figure 13. Figure 13. Top Side Component Layout The bottom side copper layout is shown in Figure 14. Note that the copper pours mounting the power components Q1, Q2, D1, D2 and L1 have been maximized within the 1.5in. x 2in. footprint of the board. Also additional heat sinking for D1 and D2 has been created using bottom side copper islands and thermal vias. Figure 14. Bottom Side Copper http://onsemi.com 6 AND8306/D Test Data A 12 V source is connected between VIN (positive) and RTN (negative) and the LED string, consisting of 3 to 6, 700mA rated devices are connected across LED+ and LED-. Efficiency data, measured over an extended overlapping input and output voltage range, is shown in Figure 15. 1A Buck-Boost LED Driver Efficiency over Line and Load (8-20 W) 90 88 EFFICIENCY (%) 86 Vin = 12 V 84 Vin = 10 V Vin = 8 V 82 80 Vin = 18 V 78 Vin = 16 V Vin = 14 V 76 74 8 10 12 14 Vout (V) 16 18 Figure 15. Efficiency Data Over Extended Input and Output Voltage Range http://onsemi.com 7 20 AND8306/D The BOM for the NCP3063 buck_boost demo board is given in Table 2. Generic resistors and capacitors are referenced by Digi-Key part numbers. Table 2. BOM for NCP3063 1 A Buck_boost LED Driver Designator Quantity Manufacturer Manufacturer Part Number U1 1 ON Semiconductor NCP3063DR2G U2 1 ON Semiconductor NCV2904DMR2G U3 1 ON Semiconductor TLV431ASN1T1G Q1 1 ON Semiconductor NTMS5P02 Q2 1 ON Semiconductor MMBT3904LT1G Q4 1 ON Semiconductor MMBT2907ALT1G Q3 1 ON Semiconductor NTMS4705NR2G Q5 1 ON Semiconductor MBT3904DW1T1G D1 1 ON Semiconductor MMSZ4686T1G0SCT-ND D2/D7 1 ON Semiconductor MMSD914T1G D4/D6 1 ON Semiconductor MBRD340T4G C1 1 330 mF/16 V 493-1042-ND C2 1 3900 pF/50 V 478-1222-2-ND C3 2 10 mF/25 V 490-3373-2-ND C4 1 1 mF/25 V 587-1248-2-ND C5 1 0.22 mF/50 V 490-1569-2-ND C6 1 47 mF/25 V P834-ND R1 0 Do not insert NA R3 1 IRC LRC-LR1206-01-R200-F R4 1 3.32 k/0603 P3.32KHTR-ND R5 1 IRC LRC-LR1206-01-R050-F R2/R6/R15/R16 4 1.21 k/0603 P1.21KHTR-ND R7 1 24.3 k/0603 P24.3KHTR-ND R8 1 2.00 k/0603 P2.00KHTR-ND R9/R13/R14 3 4.75 k/0603 P4.75KHTR-ND R10 1 4.42 k/0603 P4.42KHTR-ND R11 0 324 k/0603 P324KHTR-ND R12 1 4.22 k/0603 P4.22KHTR-ND L1 1 TDK SLF12575T-680M2R0-PF ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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