SAM3U-EK Evaluation Kit
....................................................................................................................
User Guide
6478F–ATARM–25-Jul-11
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6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Section 1
Introduction .................................................................................................................1-1
1.1
SAM3U Evaluation Kit........................................................................................................ 1-1
1.2
User Guide ......................................................................................................................... 1-1
1.3
References and Applicable Documents ............................................................................. 1-1
Section 2
Kit Contents ................................................................................................................2-1
2.1
Deliverables ....................................................................................................................... 2-1
2.2
Electrostatic Warning ......................................................................................................... 2-2
Section 3
Power Up ....................................................................................................................3-1
3.1
Power up the Board ........................................................................................................... 3-1
3.2
Battery................................................................................................................................ 3-1
3.3
DevStart ............................................................................................................................. 3-1
3.4
Recovery Procedure .......................................................................................................... 3-1
3.5
Sample Code and Technical Support ................................................................................ 3-2
Section 4
Evaluation Kit Hardware .............................................................................................4-1
4.1
Board Overview.................................................................................................................. 4-1
4.2
Features List ...................................................................................................................... 4-2
4.3
Function Blocks.................................................................................................................. 4-2
4.3.1
Processor............................................................................................................. 4-2
4.3.2
Memory ................................................................................................................ 4-2
4.3.3
Clock Circuitry...................................................................................................... 4-4
4.3.4
Reset and Wake-Up Circuitry .............................................................................. 4-5
4.3.5
Power Supply and Management.......................................................................... 4-6
4.3.6
UART ................................................................................................................... 4-7
4.3.7
USART................................................................................................................. 4-7
4.3.8
LEDs .................................................................................................................... 4-8
4.3.9
LCD, Backlight Control and Touch Panel ............................................................ 4-8
4.3.10 JTAG.................................................................................................................. 4-11
4.3.11 Audio Codec ...................................................................................................... 4-11
4.3.12 USB ................................................................................................................... 4-13
4.3.13
ADC Input ........................................................................................................ 4-14
4.3.14 User Buttons ...................................................................................................... 4-14
4.3.15 G-Sensor ........................................................................................................... 4-15
4.3.16 Temperature Sensor .......................................................................................... 4-16
4.3.17 SD Card ............................................................................................................. 4-16
SAM3U-EK Evaluation Kit User Guide
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4.3.18 ZigBee ............................................................................................................... 4-17
4.3.19 PIO Expansion ................................................................................................... 4-18
4.4
Configuration.................................................................................................................... 4-19
4.4.1
PIO Usage ......................................................................................................... 4-19
4.4.2
Jumpers ............................................................................................................. 4-22
4.4.3
Test Points ......................................................................................................... 4-23
4.4.4
Solder Drops ...................................................................................................... 4-23
4.4.5
Assigned PIO Lines, Disconnection Possibility.................................................. 4-23
Section 5
Schematics .................................................................................................................5-1
5.1
Schematics......................................................................................................................... 5-1
Section 6
Troubleshooting ..........................................................................................................6-1
6.1
Self-Test............................................................................................................................. 6-1
6.2
Board Recovery ................................................................................................................. 6-1
Section 7
Errata ..........................................................................................................................7-1
7.1
JTAG/ICE: Missing Pull-up Resistor on TDO Pin............................................................... 7-1
Section 8
Revision History..........................................................................................................8-1
8.1
Revision History ................................................................................................................. 8-1
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6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Section 1
Introduction
1.1
SAM3U Evaluation Kit
The SAM3U Evaluation Kit (SAM3U-EK) allows the evaluation of the SAM3U series devices. It has
enough features to demonstrate most of the product’s capabilities to the users. The SAM3U-EK also features extension connectors to allow the users to add new interfaces in case they are not on-board.
1.2
User Guide
This guide gives details on how the SAM3U-EK has been designed. It is made up of 6 sections:
1.3
Section 1 includes references, applicable documents.
Section 2 describes the kit contents, its main features.
Section 3 provides instructions to power up the SAM3U-EK and describes how to use it.
Section 4 describes the hardware resources, and includes default jumper and switch settings, and the
schematics.
Section 5 provides all the board schematics.
Section 6 gives troubleshooting recommendations.
References and Applicable Documents
Table 1-1. References and Applicable Documents
Title
Comment
SAM3U Datasheet
SAM3U products on Atmel Web site
SAM3U-EK Evaluation Kit User Guide
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6478F–ATARM–25-Jul-11
Section 2
Kit Contents
2.1
Deliverables
The Atmel® SAM3U-EK toolkit contains the following items:
a SAM3U-EK board
power supply
universal input AC/DC power supply with US, Europe and UK plug adapters
one 3V Lithium Battery type CR1225
one USB cable
one serial RS232 cable
A Welcome Letter
Figure 2-1.
Unpacked SAM3U-EK
Unpack and inspect the kit carefully. Contact your local Atmel distributor, should you have issues concerning the contents of the kit.
SAM3U-EK Evaluation Kit User Guide
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6478F–ATARM–25-Jul-11
Kit Contents
2.2
Electrostatic Warning
The SAM3U-EK board is shipped in a protective anti-static package. The board must not be subjected to
high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the components or any other metallic element of the board.
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6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Section 3
Power Up
3.1
Power up the Board
Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right
power plug adapter corresponding to that of your country, and insert it in the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the
screen and enjoy the demo.
3.2
Battery
The SAM3U-EK ships with a 3V coin battery.
This battery is not required for the board to start up.
The coin battery is provided for user convenience in case the user would like to exercise the date and
time backup function of the SAM3U series devices when the board is switched off.
3.3
DevStart
The on-board NAND Flash contains “SAM3U-EK DevStart”.
It is stored in the “SAM3U-EK DevStart” folder on the USB Flash disk available when the SAM3U-EK is
connected to a host computer and you click on the Flash Disk icon of the on-board demo.
Click the file “welcome.html” in this folder to launch SAM3U-EK DevStart.
SAM3U-EK DevStart guides you through installation processes of IAR™ EWARM, Keil MDK and GNU
toolkits. Then, it gives you step-by-step instructions on how to rebuild a single example project and how
to program it into the SAM3U-EK. Optionally, if you have a SAM-ICE™, instructions are also given about
how to debug the code.
We recommend that you backup the “SAM3U-EK DevStart” folder on your computer before
launching it.
3.4
Recovery Procedure
The DevStart ends by giving step-by-step instructions on how to recover the SAM3U-EK to the state as it
was when shipped by Atmel.
Follow the instructions if you deleted the contents of the embedded Flash or the NAND Flash and want
to recover from this situation.
SAM3U-EK Evaluation Kit User Guide
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6478F–ATARM–25-Jul-11
Power Up
3.5
Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can
download sample code and get technical support from Atmel website
http://www.atmel.com/products/at91/default.asp?category_id=163&family_id=605&source=left_nav
Figure 3-1.
Atmel Website for SAM3U Series
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6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Section 4
Evaluation Kit Hardware
4.1
Board Overview
This section introduces the Atmel SAM3U Evaluation Kit design. It introduces system-level concepts,
such as power distribution, memory, and interface assignments.
The SAM3U-EK board is based on the integration of an ARM® Cortex®-M3 processor with on-board fast
PSRAM (pseudo-static RAM), NAND Flash and a set of popular peripherals. It is designed to provide a
high performance processor evaluation solution with high flexibility for various kinds of applications.
Figure 4-1.
SAM3U-EK Block Diagram
Main Memory
TFT LCD
Multimedia Card
LCD TFT
LCD
240 TFT
* 320
240 * 320
PSRAM
NAND
FLASH
HX8347
HX8347
Touch
Touch
Screen
Screen
Audio
Micro
4/8 bits
interface
SD/MMC
Line In
Back Light
AAT3194
Codec
WM8731
EBI / 3.3v
EBI / 3.3v
CD
SPI
SPI
Push Btn
HeadPh
ADS7843
ADS7843
External Memory
External Memory
User I/O
MCI
MCI
SSC
SSC
TWI
TWI
Multimedia Cards Interface
Multimédia Cards Interface
Led
PWM
PWM
SAM3U
SAM3U-LQFP144
PIO
PIO
System Controller
System Controller
Analog
Analog
TWI
TWI
ZIGBEE
ZIGBEE
USART
USART
USB
USB
Device
Device
Power /
Shdn
RS232
MCP9800
VCC 5V
BNC * 2
T°
SAM3U-EK Evaluation Kit User Guide
UART
oooooooo
oooooooo
RS232
oooooooo
oooooooo
ooooo
ooooo
ZIGBEE
SWJ-DP
RS232
USB Device
High / Full
RS232
JTAG
PIO
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6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
4.2
Features List
Here is the list of the main board components and interfaces:
SAM3U4E QFP chip with optional socket footprint
12 MHz crystal
32.768 KHz crystal
Optional SMB connector, for external system clock input
PSRAM
NAND Flash
Backup Battery
2.8 inch TFT color LCD display with touch-panel and backlight
UART port with level shifter IC
USART port with level shifter IC
Audio codec with input and output jacks: stereo headphone out, stereo line in, mono microphone in
SD/MMC interface
3-D accelerometer sensor
Temperature sensor
Reset and Wake-Up buttons: NRST, NRSTB, FWUP
User buttons: Left and Right
High Speed USB device port
JTAG port
On-board power regulation with shutdown control (by the SAM3 chip)
Two user LEDs
Power LED
BNC connectors for ADC input
User potentiometer connected to the ADC input
ZigBee® connector
3x32 bit PIO connection interfaces (PIOA, PIOB, PIOC)
4.3
Function Blocks
4.3.1
Processor
The SAM3U-EK is equipped with a SAM3U4E in LQFP144 package.
4.3.2
Memory
The SAM3U4E chip embeds:
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6478F–ATARM–25-Jul-11
256 Kbytes of embedded Flash
48 Kbytes of embedded SRAM with dual bank
16 Kbytes of ROM with embedded bootloader routines (UART, USB) and IAP (In-Application
Programming functions) routines.
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
The SAM3U4E features an External Bus Interface (EBI) that permits interfacing to a broad range of
external memories and virtually to any parallel peripheral. The SAM3U-EK board is equipped with two
kinds of memory devices connected to the SAM3U4E EBI:
Figure 4-2.
One 512K x16 PSRAM device(1)
One NAND Flash MT29F2G16ABD.
PSRAM
PB[31:0]
PB7
PB19
PB20
PB23
PC[31:0]
+3V3
R10
47K
NCS0
NRD
NWE
JP12
JP
+3V3
R11
47K
MN2
PSRAM 512K x16
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC20
PC21
PC22
PC23
PC24
PC25
3
4
5
9
10
15
16
22
44
45
46
47
39
40
33
34
28
21
43
NBS0
NBS1
PB7
PC15
1
8
PB8
11
2
41
6
PB20
PB19
PB23
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
NC1
NC2
NC3
LB#
UB#
CE#
OE#
WE#
ZZ#
12
17
18
23
29
35
36
42
7
13
14
20
26
32
31
37
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PB6
27
38
48
+3V3
VCC
VCCQ
VSS
VSSQ
24
25
30
19
C28
100nF
C29
1uF
DGND
Note:
1. Brand and reference may vary. Check the bill of materiel (BOM) corresponding to your
kit version to get precise information regarding that matter.
SAM3U-EK Evaluation Kit User Guide
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6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
Figure 4-3.
NAND Flash
P B [31:0]
+3V 3
R 12
47K
NANDRDY
NANDOE
P C [31:0]
P B 24 R 14
P B 17
NCS1
R 13
47K
0R
J P 13
JP
+3V 3
P C 12
C 30
100nF
NANDCL E
NANDAL E
NANDWE
P B 22
P B 21
P B 18
+3V 3
R 17
47K
R 18
DNP
MN3
MT 29F 2G 16AADW P
+3V 3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NC 1
NC 2
NC 3
NC 4
NC 5
NC 6
R /B #
RE#
CE#
NC 7
NC 8
VC C 1
VS S 1
NC 9
NC 10
C LE
ALE
WE #
WP#
NC 11
NC 12
NC 13
NC 14
NC 15
VS S 4
IO15
IO14
IO13
IO7
IO6
IO5
IO4
IO12
VC C 4
NC 17
VC C 3
VS S 3
NC 16
VC C 2
IO11
IO3
IO2
IO1
IO0
IO10
IO9
IO8
VS S 2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
PB6
P B 31
P B 30
P B 16
P B 15
P B 14
P B 13
P B 29
+3V 3
C 31
100nF
C 32
100nF
C 33
100nF
P B 28
P B 12
P B 11
P B 10
PB9
P B 27
P B 26
P B 25
DG ND
DG ND
The chip select signals NCS0 and NCS1 are used for PSRAM and NAND Flash chips selection, respectively. Furthermore, a dedicated jumper can disconnect these from the memories, to let NCS0 and NCS1
be used for other custom purpose.
4.3.3
Clock Circuitry
The clock generator of a SAM3U4E microcontroller is made up of:
A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode
A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB)
A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4, 8 or
12 MHz (default value is 4 MHz).
A 480 MHz UTMI PLL providing a clock for the USB High Speed Device Controller
A 96 to 192 MHz programmable PLL (input from 8 to 16 MHz), capable of providing the clock MCK to
the processor and to the peripherals.
The SAM3U-EK board is equipped with one 12 MHz crystal, one 32,768 Hz crystal and an external clock
input connector (optional, not populated by default).
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6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Figure 4-4.
External Clock Source
MN1B
S AM3U
DG ND
XIN1
XOUT 1
144
143
R6
R7
0R
0R
36
35
C 25
20pF
XIN32
XOUT 32
XIN32
XIN
XOUT
2
XIN32
XOUT 32
XIN32
XOUT 32
Y2
32.768K Hz
J1
1
3
5
2
4
3
1
XIN
XOUT
R8
18
52
60
90
126
DNP
G ND1
G ND2
G ND3
G ND4
G ND5
XOUT 32
140
G NDB U
XIN1
33
G NDP LL
43
G NDUT MI
75
G NDANA
C 27
20pF
DG ND
C 24
20pF
Y1
12.000MHz
C 26
20pF
XOUT 1
DG ND
DG ND
4.3.4
Reset and Wake-Up Circuitry
The on-board NRST button BP1 and NRSTB button BP2 provide the SAM3U4E with external reset control. The on-board WAKE-UP button BP3 can be used to wake up the chip from low power modes.
Figure 4-5.
System Buttons
VBU
R 65
100K
BP1
NR S T
1
2
NR S T B
1
2
3
4
BP2
3
4
BP3
F W UP
WAKE _UP#
1
2
3
4
DG ND
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide
a reset signal out to the external components. Conversely, it can be asserted low from the outside to
reset the microcontroller, its core and peripherals, Backup region (RTC, RTT and Supply Controller)
excepted. The NRST pin integrates a permanent pull-up resistor of about 100 kOhm to VDDIO.
On the SAM3U-EK board, the NRST signal is connected to the LCD module and JTAG port.
The NRSTB pin is an input-only signal that enables the asynchronous reset of the SAM3U4E series
when asserted low. The NRSTB pin integrates a permanent pull-up resistor of about 15 kOhm. This
allows the connection of a simple push button for implementing a system-user reset. Whatever the
mode, this pin will reset the chip including the Backup region (RTC, RTT and Supply Controller). It
makes the chip behave as for a Power-on reset. An external capacitor (10 nF) is connected between
NRSTB and VDDIO to enforce the signal stability on this pin.
SAM3U-EK Evaluation Kit User Guide
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6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
The FWUP pin is Force Wake-Up active low input. It is enabled as a wake-up source with external pullup. If the FWUP pin is asserted for a time longer than the debouncing period (configurable for 100 µs,
1 ms, 16 ms, 128 ms or 1 second), a core power supply wake-up is initiated.
4.3.5
Power Supply and Management
The SAM3U-EK board is supplied with an external 5V DC block through input J11. Protection circuitry is
obtained by a PolyZen diode MN13 and an LC combinatory filter MN14.
The adjustable LDO regulator MN12 is employed for the main supply of the 3.3V rail. It powers all the
3.3V board components. The shut down control of this LDO is made by MOSFETs Q1, Q2 piloted by the
SAM3U4E SHDN pin. When SAM3U4E is in backup mode, SHDN pin outputs a low level signal, which
shuts down the LDO. When the device is running (not in backup mode), SHDN pin output a high level
signal, which enables the LDO.
By closing the “FORCE POWER ON” jumper JP17, the P-channel MOSFET Q1 will be forced on, no
matter the level present on the SHDN pin, and the LDO 3.3V output will thereby be forced active.
MN12
MIC 29152W U
Micrel's 1.5A LDO, T O263-5
1
2
C 92
100nF
3
CG1
CG2
CG3
4
5
6
TP3
+3V 3
+5V
TP4
+5V
+ C 93
P W R _C N
22uF
+3V 3
2
V IN
V OUT
4
1
SD
ADJ
5
3
2
CV
SV
SG
+5V
G ND2
MN14
B NX002-01
G ND1
MN13
ZE N056V 130A24LS
1
3
3
J 11
MP 179P 2.1mm
1
2
Power Block
R 76
330R 1%
+ C 95
DG ND
R 77
200R 1%
+5V
2
1
R 78
100K
DG ND
P W R _C N
3
Q1
IR LML6401
R 79
100K
+3V 3
+3V3
ADV R E F
3
R 80
10K
S HDN
Q2
IR LML2502
1
C 94
15pF
C 104
100nF
J P 17 DG ND
JP
C 103
100nF
+2V5
R 90
4.7K
2
3
JP5
J UMP _3
1
DG ND
D12B V R E F
+5V
J P 20
J UMP _3
1
+2V5
+3V3
2
C 96
100nF
100uF
6
Figure 4-6.
MN15
LM4040-2.5
2
3
DG ND
DG ND
The SAM3U-EK board uses the 3.3V LDO output as its main supply source. VDDUTMI, VDDANA,
VDDIO, VDDIN are powered directly from that source.
The internal 1.8V regulator output feeds VDDCORE and VDDPLL.
VDDCORE and VDDPLL can also be powered by an external supply. (Refer to the SAM3U datasheet for
more details).
VDDBU pin is powered from the 3.3V rail and a backup battery BT1 via a dual Schottky diode D6.
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6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Figure 4-7.
Backup Battery
MN1B
S AM3U
VBU
D6
B AT 54C
139
V DDB U
JP4
JP
+3V 3
1
CR1225
3
2
C 21
1uF
+
3
4
3V
2
4
DG ND
BT1
K Y 001
DG ND
4.3.6
1
3
UART
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for communication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART
is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to
the DB9 male connector J3.
Figure 4-8.
UART
MN6
MAX3232C S E
+3V 3
16
VC C
C 1+
1
C 45
100nF
P A[31:0]
R 31
100K
UTXD
URXD
P A12
P A11
+3V 3
2
V+
C 1-
3
6
V-
C 2+
4
C 47
100nF
R 32
100K
R 103
0R
R 33
0R
T P 17
S MD
4.3.7
C 46
100nF
T P 18
S MD
J3
MALE R IG HT ANG LE D
C 48
100nF
15
G ND
11
12
10
9
T 1IN
R 1OUT
T 2IN
R 2OUT
C 2T 1OUT
R 1IN
T 2OUT
R 2IN
1
6
2
7
3
8
4
9
5
5
14
13
7
8
DG ND
DG ND
11
+3V 3
10
C 44
100nF
USART
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex universal synchronous/asynchronous serial link. The data frame format is extensively configurable (data
length, parity, number of stop bits) to support a broad range of serial communication standards. The
USART is also associated with PDC channels for TX/RX data access.
There are 3 USARTs on the SAM3U4E device, SAM3U-EK connects the USART1 bus (including TXD,
RXD, RTS, CTS handshake signals control) to the DB9 male connector J4 through the RS232 Transceiver MN7.
SAM3U-EK Evaluation Kit User Guide
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6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
Figure 4-9.
USART
MN7
MAX3232C S E
+3V 3
16
R 34
100K
P A[31:0]
TXD1
RXD1
RTS1
CTS1
P A20
P A21
P A22
P A23
+3V 3
C 1+
1
C 50
100nF
2
V+
C 1-
3
6
V-
C 2+
4
C 52
100nF
R 35
100K
R 104
0R
R 105
0R
J4
MALE R IG HT ANG LE D
C 53
100nF
15
G ND
11
12
10
9
T 1IN
R 1OUT
T 2IN
R 2OUT
C 2T 1OUT
R 1IN
T 2OUT
R 2IN
1
6
2
7
3
8
4
9
5
5
14
13
7
8
4.3.8
10
DG ND
T P 19
S MD
DG ND
T P 20
S MD
11
+3V 3
C 51
100nF
VC C
C 49
100nF
LEDs
There are three LEDs on the SAM3U-EK board:
D2 and D3 green LEDs are user defined and controlled by the GPIO.
D4 red LED is a power LED indicating that the 3.3V rail is enabled. It can also be controlled by the
GPIO (by default, the GPIO is disabled and an on-board pull-up to 3.3V lights the LED).
Figure 4-10. LEDs
P B [31:0]
PB4
PB5
USR_L ED1#
PB0
R 85
220R
PB1
R 87
220R
+3V 3
D2
green-led
0603
USR_L ED2#
D3
green-led
0603
POWE R_L E D#
PB2
R 89
100K
1
Q3
IR LML2502
2
3
R 92
220R
D4
red-led
0603
DG ND
4.3.9
LCD, Backlight Control and Touch Panel
SAM3U-EK carries one TFT/Transmissive LCD module with touch screen, FTM280C12D, with integrated driver IC HX8347. The LCD display size is 2.8 inches, with a native resolution of 240 x 320 pixels.
4-8
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Table 4-1. LCD Module Pin Out
Pin
Symbol
Function
1
GND
Ground
2
CS
Chip Select
3
RS
Register select signal
4
WR
Write operation signal
5
RD
Read operation signal
6~21
DB0~DB15
Data bus
22~23
NC
No connection
24
RESET
Reset signal
25
GND
Ground
26
X+
Touch panel X_RIGHT
27
Y+
Touch panel Y_UP
28
X-
Touch panel X_LEFT
29
Y-
Touch panel Y_DOWN
30
GND
Ground
31
VDD1
Power supply for digital IO Pad
32
VDD2
Power supply for analog circuit
33~36
A1~A4
Power supply for backlight
37~38
NC
No connection
K
Backlight ground
39
The LCD module gets its reset from NRST. As explained previously, this NRST is shared with the JTAG
port and the push button BP1. The LCD chip select signal is connected to NCS2 (a dedicated jumper can
disable it, making NCS2 available for other custom usage).
The SAM3U4E communicates with the LCD through PIOB where a 16-bit parallel “8080-like” protocol
data bus has to be implemented by software.
SAM3U-EK Evaluation Kit User Guide
4-9
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
Figure 4-11. LCD Block
J2
F H26-39S -0.3S HW
NR S T
X_R IG HT
Y _UP
X_LE F T
Y _DOW N
+3V 3
+ C 38
10uF
C 39
100nF
LE D_A1
LE D_A2
LE D_A3
LE D_A4
R 93
R 94
R 95
R 96
0R
0R
0R
0R
DG ND
X_R IG HT
Y _UP
X_LE F T
Y _DOW N
LE D_A1
T P 13
S MD
LE D_A2
T P 14
S MD
LE D_A3
T P 15
S MD
LE D_A4
T P 16
S MD
3
G ND1
CS
RS
WR
RD
DB 0
DB 1
DB 2
DB 3
DB 4
DB 5
DB 6
DB 7
DB 8
DB 9
DB 10
DB 11
DB 12
DB 13
DB 14
DB 15
NC 1
NC 2
RESET
G ND2
X+
Y+
XYG ND3
V DD1
V DD2
A1
A2
A3
A4
NC 3
NC 4
K
s helled1
s helled2
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
CS#
5
P C 16
PB8
P B 23
P B 19
PB9
P B 10
P B 11
P B 12
P B 13
P B 14
P B 15
P B 16
P B 25
P B 26
P B 27
P B 28
P B 29
P B 30
P B 31
PB6
D5
P AC DN044Y 5R
T V S , S OT 23-5
2
J P 14
JP
1
P B [31:0]
NOT POPUL AT E D
DG ND
+3V 3
MN4
AAT 3194IT P
4
R 19
47K
P C 19
R 20
0R
+3V 3
B7
B N03K 314S 300R
C 1+
C 2+
1
C 2-
12
C 34
1uF
V LE D
C 35
1uF
3
9
10
C 1E N/S E T
DG ND
2
D1
D2
D3
D4
8
7
6
5
IN
C 36
4.7uF
11
OUT
G ND
LE D_A1
LE D_A2
LE D_A3
LE D_A4
C 37
1uF
DG ND
DG ND
LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3194 charge pump, MN4. The
AAT3194 is controlled by the SAM3U4E through a single line Simple Serial Control (S2Cwire) interface,
which permits to enable, disable, and set the LED drive current (LED brightness control) from a 32-level
logarithmic scale. Four 0-Ohm resistors R93/R94/R95/R96 are implemented for optional current limitation (replace 0 Ohm with the required resistor value).
The LCD module integrates a 4-wire touch screen panel controlled by MN5, ADS7843, which is a slave
device on the SAM3U4E SPI bus.
The ADS7843 touch ADC auxiliary inputs IN3/IN4 are connected to test points for optional function
extension.
4-10
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Figure 4-12. Touch Screen Controller
J2
F H26-39S -0.3S HW
X_R IG HT
Y _UP
X_LE F T
Y _DOW N
26
27
28
29
X+
Y+
XY-
P C [31:0]
P C 14
+3V 3
R 21
100K
MN5
ADS 7843E
X_R IG HT
Y _UP
X_LE F T
Y _DOW N
TP1
S MD
2
3
4
5
TP2
S MD
7
8
R 28
100K
0R
SPCK
MOSI
MI SO
NPCS2
R 25
R 26
0R
0R
P A2
P A24
BUY_TSC
I RQ_TSC
R 27
0R
16
14
12
15
R 24
B US Y
P E NIR Q
13
11
VR E F
VC C 1
VC C 2
9
1
10
IN3
IN4
R 29
100K
G ND
R 22
100K
P A15
P A14
P A13
P C 14
DC LK
DIN
DOUT
CS
XP
YP
XM
YM
+3V 3
C 40
100nF
6
C 41
100nF
C 42
100nF
R 91
1R
L1
10uH/100mA
C 43
4.7uF
R 30
0R
AG ND1
4.3.10
P A[31:0]
+3V 3
DG ND
JTAG
A standard 20-pin JTAG connector is implemented on the SAM3U-EK for any ARM JTAG emulator connection, such as SAM-ICE.
Note that the NRST net is connected to the system button BP1, and is also used to reset the LCD module. 0-Ohm resistor R75 may be removed in order to isolate the JTAG port from the system reset signal.
Figure 4-13. JTAG Connector
+3V 3
R 70
100K
R 71
100K
R 72
100K
R 73
100K
R 74
100K
T DI
T MS
TCK
T DO
NR S T
R 75
0R
J 10
IDC 20-2.54mm
1
3
5
7
9
11
13
15
17
19
V s upply
V T ref
G ND1
nT R S T
G ND2
T DI
G ND3
T MS
G ND4
TCK
G ND5
R TCK
G ND6
T DO
G ND7
nS R S T
DB G R Q G ND8
DB G AC K G ND9
2
4
6
8
10
12
14
16
18
20
+ C 91
C 90
10uF
100nF
DG ND
DG ND
4.3.11
Audio Codec
The SAM3U-EK includes a WOLFSON codec WM8731 for digital sound input and output. This interface
includes audio jacks for:
microphone input,
line audio input, and
headphone output.
SAM3U-EK Evaluation Kit User Guide
4-11
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
The SAM3U4E programmable clock output is used to generate the WM8731 master clock (MCLK). The
SAM3U4E ODT (On-Die Termination) feature guarantees a signal integrity on this clock line without the
need for external discrete components.
WM8731 pin 21 MODE is pulled down by default; this configures the device as a TWI device for internal
register access.
Pin15 CSB is pulled up, which sets its TWI address as 33 [0x0011011].
The WM8731 digital interface works in slave mode on the SAM3U4E Synchronous Serial Controller
(SSC) interface, which means that Codec digital audio bit clock and ADC/DAC left/right control clock are
to be generated by the SAM3U4E.
Figure 4-14. Codec Slave Mode
BCLK
ADCLRC
WM8731
DACLRC
CODEC
ADCDAT
DACDAT
BCLK
PA31
SAM3U4E
PA30
PA27
PA26
Note: The ADC and DAC can run at different rates
The WM8731 ADC and DAC have separated left/right control clocks to run at different rates.
The bit clock is shared; it can be the SSC transmitter clock (TK) or the receiver clock (RK). The default
setting on SAM3U-EK is TK and RK shorted together through R97/R99. Please note that trying different
ADC/DAC rates would mean different RK/TK rates; this default setting can be modified.
The 0-Ohm resistors R46/R47/R97/R99 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
4-12
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Figure 4-15. Codec Block
MN8
XW M8731E DS
+3V 3
1
27
+ C 54
C 55
100nF
10uF
DB V DD
DC V DD
AV DD
HP V DD
14
8
AG ND
HP G ND
15
11
AV DD
C 57
100nF
C 56
100nF
DG ND
26
2
XT O
C LK OUT
16
V MID
LHP OUT
9
C 60
12
13
LOUT
R OUT
R HP OUT
10
C 63
+ C 59
C 58
100nF
10uF
AG ND
220uF
+
C 62
100nF
10uF
DG ND
+
+ C 61
28
220uF
B1
B N03K 314S 600R
R 36
47K
J5
1 E AR J AC K
2
3
4
5
B2
B N03K 314S 600R
R 37
47K
C 64
470pF
C 65
470pF
HE ADPHONE
L I NE - OUT
AG ND
+3V 3
+3V 3
+3V 3
AG ND
R 38
100K
TWD0
TWCK0
PCK0
TD
TF
RD
RF
R 39
4.7K
R 40
4.7K
P A9
P A10
P A21
B C LK
P A26
P A30
P A27
P A31
22
23
24
CSB
S DIN
S C LK
XT I/MC LK
B C LK
DAC DAT
DAC LR C
ADC DAT
ADC LR C
MODE
R 46
R 47
0R
0R
25
3
4
5
6
7
R 49
10K
21
LLINE IN
20
C 66
1uF
R 41
5.6K
R LINE IN
19
C 67
1uF
R 42
5.6K
C 68
220pF
MIC B IAS
17
R 48
680R
MIC IN
18
R 50
330R
C 69
220pF
R 43
5.6K
B4
B N03K 314S 600R
R 44
5.6K
F G ND
B3
B N03K 314S 600R
C 70
470pF
C 71
470pF
AG ND
C 72
L I NE - I N
F G ND
B5
B N03K 314S 600R
1uF
J7
1 E AR J AC K
2
3
4
5
R 51
0R
C 73
220pF
DG ND
J6
1 E AR J AC K
2
3
4
5
R 52
47K
C 74
470pF C 75
DNP
MONO/ S T E RE O
MI CRO I NPUT
AG ND
A[31:0]
L2
10uH/100mA
+3V 3
P A9
P A10
P A21
P A26
P A27
P A28
P A29
P A30
P A31
+ C 76
10uF
0R
0R
R 97
R 99
B C LK
C 77
100nF
+ C 78
R 55
0R
F G ND
47uF
AG ND
AG ND
DG ND
4.3.12
R 53
0R
R 54
0R
AV DD
USB
The SAM3U4E UDPHS port is compliant with the Universal Serial Bus (USB) rev 2.0 High Speed device
specification. J9 is a B-type receptacle for USB device.
Both R2 and R3 39-Ohm resistors build up a 90-Ohm differential impedance together with the 5-Ohm
output impedance of the Hi-speed channel drivers.
R68 and R69 build up a divider bridge from VBUS +5V to implement plug-in detection (5V level gets lowered to a PIO compatible 3.3V level) through PA0. Note that PA0 is also shared with ZigBee signal IRQ0.
Figure 4-16. USB Slave Block
J9
US B T Y P E B P OR T
B6
B N03K 314S 300R
DHS DP
DHS DM
P A[31:0]
P A0
R 68
6
5
3
2
4
1
47K
VBUS_USB
R 69
68K
DG ND
C 88
10pF
MN11
T P D3E 001DR LR
1 IO1 V C C 5
2 IO2
3 G ND IO3 4
DG ND
DG ND
SAM3U-EK Evaluation Kit User Guide
E _G ND1
E _G ND0
D+
DG ND
V B US
C 89
100nF
DG ND
NOT POPUL AT E D
4-13
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
4.3.13
ADC Input
There are 8 multiplexed analog channel inputs on the 12-bit ADC, and 8 multiplexed analog channel
inputs on the 10-bit ADC. SAM3U-EK optionally connects the two ADC channels to BNC header (check
for your actual components implementation, schematics and BOM, on http://www.atmel.com/products/).
One is 12-bit ADC channel 3, shared with PIO pin PB4. The other one is 10-bit ADC channel 0, shared
with PIO PB5.
A potentiometer is also connected to these two channels to implement an easy access to ADC programming and debugging (or implement an analog user control such as display brightness, volume, etc.).
Please note that SAM3U-EK default setting connects both AD12BAD3 and AD0 to the potentiometer so
that AD12BAD3 and AD0 are actually shorted. If these two ports need to work separately, R82 and/or
R84 should be removed.
There is another ADC application capability on SAM3U-EK (See “G-Sensor” on page 4-15.)
Figure 4-17. ADC Input
C N1
B NC
R 81
DNP
5
1
2
3
4
J P 18
JP
C 97
10nF
R 83
49.9R
R 82
0R
ADC
R 84
0R
DG ND
C N2
B NC
R 86
DNP
5
1
2
3
4
AD12BAD3
PB4
AD0
PB5
J P 19
JP
R 88
49.9R
C 98
10nF
1
+3V 3
DG ND
4
VR 1
10K 5
3
Potent i omet er
ADC
2
C 99
10nF
DG ND
4.3.14
User Buttons
2 user buttons on the SAM3U-EK are connected to PIO lines, and are defined as left and right buttons by
default.
4-14
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Figure 4-18. User Buttons
BP4
1
2
C 86
3
4
P A18
BP_L E F T#
P A19
BP_RI GHT#
R 66
100R
10nF
BP5
1
2
C 87
3
4
10nF
R 67
100R
DG ND
4.3.15
G-Sensor
The SAM3U-EK board is equipped with a three axis accelerometer MMA7341. Basically, it is an acceleration to analog voltage converter. Converted data on corresponding directions are read by 3 SAM3U4E
12-bit ADC channels.
Table 4-2. Direction
Direction
PIO usage
ADC channel
XOUT
PB3
AD2
YOUT
PC17
AD6
ZOUT
PC18
AD7
PC13 controls the device sleep mode. A low level on PC13 will place the MMA7341 into sleep mode to
reduce the current; conversely, a high PC13 level will wake it up from sleep mode.
Jumper JP15 controls the device g-select function, which allows the selection between two sensitivity
levels. Depending on the logic input placed on pin 10, the device internal gain will be changed, operating
within a 3g or 11g range with different sensitivities.
Table 4-3. g-Select
g-select
g-range
Sensitivity
0
3g
440mV/g
1
11g
117.5mV/g
Jumper JP16 provides control of the device self-test function. When the self-test function is initiated, an
electrostatic force is applied to each axis to cause it to deflect. The x- and y-axis are deflected slightly
while the z-axis is trimmed to deflect 1g. This procedure assures that both mechanical (g-cell) and electronic sections of the accelerometer are functioning.
Note that the 0-Ohm resistors R61/R62/R63 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
SAM3U-EK Evaluation Kit User Guide
4-15
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
Figure 4-19. G-Sensor
+3V 3
+3V 3
R 60
10K
R 59
10K
P B [31:0]
P C [31:0]
J P 15
JP
J P 16
JP
MN9
MMA7341L
10
13
7
DG ND
3AXS_SL EE P#
ADC0_AD2
ADC0_AD6
ADC0_AD7
P C 13
PB3
P C 17
P C 18
R 61
R 62
R 63
0R
0R
0R
C 82
3.3nF
DG ND
4.3.16
C 83
3.3nF
DG ND
C 84
3.3nF
2
3
4
1
14
g-S elect
S elf T es t
S leep
XOUT
Y OUT
ZOUT
NC 1
NC 6
+3V 3
V DD
6
VS S
5
NC 2
NC 3
NC 4
NC 5
8
9
11
12
C 81
100nF
DG ND
DG ND
Temperature Sensor
A temperature sensor MCP9800 is connected to the SAM3U4E TWI bus. This device also features an
open-drain output ALERT pin. The device outputs an alert signal when the ambient temperature goes
beyond the user-programmed temperature limit.
Note that the 0-Ohm resistors R15 and R16 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
Figure 4-20. Temperature Sensor
+3V 3
P A[31:0]
R 64
47K
TWD0
TWCK0
TE MP_AL ARM
4.3.17
P A9
R 15
0R
P A10
P A17
P A18
P A19
MN10
MC P 9800
5
4
R 16
0R
+3V 3
V DD
1
G ND
2
S C LK ALE R T
3
S DA
C 85
100nF
DG ND
SD Card
The SAM3U-EK has an MMC/MMCPlus high-speed 8-bit multimedia interface. This interface is used as
a 4/8-bit interface, connected to an 8-bit SD/MMC card slot with card detection.
4-16
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Figure 4-21. SD Card Socket
+3V 3
R 58
10K
P C [31:0]
DA4
R A2
47K X4
R A1
47K X4
J8
7S DMM-B 0B 2211
5
6
7
8
R 57
10K
5
6
7
8
R 56
10K
4
3
2
1
4
3
2
1
P A[31:0]
DA2
P A7
1
DAT 2
DA3
P C 28
P A8
2
3
R S V /DAT 3
DAT 4
CDA
P C 29
P A4
4
5
6
C MD
DAT 5
G ND
7
VC C
DA5
DA6
DA7
CK
P C 30
P A3
8
9
C LK
DAT 6
WKUP12
P C 31
P A25
10
11
CD
DAT 7
P A5
P A6
12
13
DAT 0
DAT 1
14
S D_W P
DA0
DA1
G R OUND1
15
S HE LLE D1
S HE LLE D2
17
18
G R OUND
16
DG ND
DG ND
+3V 3
+ C 79
C 80
100nF
10uF
DG ND
Table 4-4. Pin Card Detection Scheme
Status
4.3.18
Detection
WITHOUT CARD
SD_WP: OPEN
CD: OPEN
SD Card inserted with write protection lock
SD_WP: OPEN
CD: GND
SD Card inserted with write protection unlock, or other card inserted
SD_WP: GND
CD: GND
ZigBee
SAM3U4E has a 10-pin male connector for the RZ600 ZigBee module.
Figure 4-22. ZigBee
J 16
ZB_RSTN
I RQ1_ZBE E
SPI O_NPCS0#
MI SO
P C 27
P A1
P A16
P A13
1
3
5
7
9
2
4
6
8
10
R 100
0R
C 100
18pF
I RQ0_ZBEE
SL P_TR
MOSI
J P 21
SPCK
JP
P A0
P C 26
P A14
P A15
C 101
2.2nF
+3V 3
C 102
2.2uF
DG ND
SAM3U-EK Evaluation Kit User Guide
4-17
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
4.3.19
PIO Expansion
Figure 4-23. PIO Expansion Ports
P B [31:0]
SOL DER DROP 2 pi ns open. Nor ma l
P C [31:0]
PB4
PB5
S D3
S D4
BB4
BB5
SOL DER DROP 2 pi ns open. Nor ma l
J 13
048
+5V
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
P C 10
P C 11
P C 12
P C 13
P C 14
P C 15
+3V 3
DG ND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
+5V
P C 16
P C 17
P C 18
P C 19
P C 20
P C 21
P C 22
P C 23
P C 24
P C 25
P C 26
P C 27
P C 28
P C 29
P C 30
P C 31
PB0
PB1
PB2
PB3
BB4
BB5
PB6
PB7
PB8
PB9
P B 10
P B 11
P B 12
P B 13
P B 14
P B 15
+3V 3
DG ND
+3V 3
DG ND
J 14
048
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
+5V
P B 16
P B 17
P B 18
P B 19
P B 20
P B 21
P B 22
P B 23
P B 24
P B 25
P B 26
P B 27
P B 28
P B 29
P B 30
P B 31
P A0
P A1
P A2
P A3
P A4
P A5
P A6
P A7
P A8
P A9
P A10
P A11
P A12
P A13
P A14
P A15
+3V 3
DG ND
+3V 3
DG ND
J 15
048
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
P A16
P A17
P A18
P A19
P A20
P A21
P A22
P A23
P A24
P A25
P A26
P A27
P A28
P A29
P A30
P A31
+3V 3
DG ND
The SAM3U4E product features 3 PIO controllers, PIOA, PIOB and PIOC, which multiplex the I/O lines
of the peripheral set. Each PIO controller controls up to 32 lines. Expansion ports J13, J14, J15 provide
a way for customers to define any PIO channels.
All the expansion port pins are directly connected to the SAM3U4E chip, except PB4 and PB5, which are
assigned as AD12BAD3 and AD0 by default on the board. Solder drops have been implemented on the
board to avoid signal conflicts from traces routing to expansion ports. If PB4 and PB5 need to be connected to the J14 connector, solder drops SD3 and SD4 should be shorted.
Figure 4-24. SD3 Location
Figure 4-25. SD4 Location
4-18
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
4.4
Configuration
This section describes the PIO usage, the jumpers, the test points and the solder drops of a SAM3U-EK
board.
4.4.1
PIO Usage
Table 4-5. PIO Port A Assignment
I/O Line
Peripheral A
Peripheral B
Extra Function
EK Usage
Device
PA0
TIOB0
NPCS1
WKUP0
IRQ0_ZBEE/
VBUS_USB
ZigBee, USB
PA1
TIOA0
NPCS2
WKUP1
IRQ0_ZBEE
ZigBee
PA2
TCLK0
AD12BTRG
WKUP2
BUSY_TSC
Touch Screen
PA3
MCCK
PCK1
MCCK
SD/MMC
PA4
MCCDA
PWMH0
MCCDA
SD/MMC
PA5
MCDA0
PWMH1
MCDA0
SD/MMC
PA6
MCDA1
PWMH2
MCDA1
SD/MMC
PA7
MCDA2
PWML0
MCDA2
SD/MMC
PA8
MCDA3
PWML1
MCDA3
SD/MMC
PA9
TWD0
PWML2
WKUP3
TWD0
Codec, Temp sensor
PA10
TWCK0
PWML3
WKUP4
TWCK0
Codec, Temp sensor
PA11
URXD
PWMFI0
URXD
UART
PA12
UTXD
PWMFI1
URXD
UART
PA13
MISO
MISO
Touch panel, ZigBee
PA14
MOSI
MOSI
Touch panel, ZigBee
PA15
SPCK
PWMH2
SPCK
Touch panel, ZigBee
PA16
NPCS0
NCS1
WKUP5
SPIO_NPCS0#
ZigBee
PA17
SCK0
ADTRG
WKUP6
TEMP_ALARM
Temp sensor
PA18
TXD0
PWMFI2
WKUP7
BP_LEFT#
User Button
PA19
RXD0
NPCS3
WKUP8
BP_RIGHT#
User Button
PA20
TXD1
PWMH3
WKUP9
TXD1
USART
PA21
RXD1
PCK0
WKUP10
RXD1
USART
PA22
TXD2
RTS1
AD12B0
RTS1
USART
PA23
RXD2
CTS1
CTS1
USART
PA24
TWD1
SCK1
WKUP11
IRQ_TSC
Touch Screen
PA25
TWCK1
SCK2
WKUP12
MCI_CD
SD/MMC
PA26
TD
TCLK2
TD
Audio codec
PA27
RD
PCK0
RD
Audio codec
PA28
TK
PWMH0
TK
Audio codec
SAM3U-EK Evaluation Kit User Guide
4-19
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
Table 4-5. PIO Port A Assignment
I/O Line
Peripheral A
Peripheral B
PA29
RK
PWMH1
PA30
TF
TIOA2
PA31
RF
TIOB2
Extra Function
AD12B1
EK Usage
Device
RK
Audio codec
TF
Audio codec
RF
Audio codec
Table 4-6. PIO Port B Assignment
I/O Line
Peripheral A
Peripheral B
Extra Function
EK Usage
Device
PB0
PWMH0
A2
WKUP13
USR_LED1#
USER_LED
PB1
PWMH1
A3
WKUP14
USR_LED2#
USER_LED
PB2
PWMH2
A4
WKUP15
POWER_LED
POWER_LED
PB3
PWMH3
A5
AD12BAD2
3AXS_XOUT
Accelerometer
PB4
TCLK1
A6
AD12BAD3
BNC1
Analog input
PB5
TIOA1
A7
AD0
BNC2
Analog input
PB6
TIOB1
D15
AD1
D15
PSRAM, NAND Flash, LCD
PB7
RTS0
A0/NBS0
AD2
NBS0
PSRAM,
PB8
CTS0
A1
AD3
A1/RS
PSRAM, LCD
PB9
D0
DTR0
D0
PSRAM, NAND Flash, LCD
PB10
D1
DSR0
D1
PSRAM, NAND Flash, LCD
PB11
D2
DCD0
D2
PSRAM, NAND Flash, LCD
PB12
D3
RI0
D3
PSRAM, NAND Flash, LCD
PB13
D4
PWMH0
D4
PSRAM, NAND Flash, LCD
PB14
D5
PWMH1
D5
PSRAM, NAND Flash, LCD
PB15
D6
PWMH2
D6
PSRAM, NAND Flash, LCD
PB16
D7
PWMH3
D7
PSRAM, NAND Flash, LCD
PB17
NANDOE
PWML0
NANDOE
NAND Flash
PB18
NANDWE
PWML1
NANDWE
NAND Flash
PB19
NRD
PWML2
NRD
PSRAM, LCD
PB20
NCS0
PWML3
NCS0
PSRAM
PB21
A21/NANDALE
RTS2
NANDALE
NAND Flash
PB22
A22/NANDCLE
CTS2
NANDCLE
NAND Flash
PB23
NWR0/NEW
PCK2
NWE
PSRAM, LCD
PB24
NANDRDY
PCK1
NANDRDY
NAND Flash
PB25
D8
PWML0
D8
PSRAM, NAND Flash, LCD
PB26
D9
PWML1
D9
PSRAM, NAND Flash, LCD
PB27
D10
PWML2
D10
PSRAM, NAND Flash, LCD
PB28
D11
PWML3
D11
PSRAM, NAND Flash, LCD
4-20
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
Table 4-6. PIO Port B Assignment
I/O Line
Peripheral A
PB29
Peripheral B
Extra Function
EK Usage
Device
D12
D12
PSRAM, NAND Flash, LCD
PB30
D13
D13
PSRAM, NAND Flash, LCD
PB31
D14
D14
PSRAM, NAND Flash, LCD
EK Usage
Device
Table 4-7. PIO Port C Assignment
I/O Line
Peripheral A
PC0
A2
A2
PSRAM
PC1
A3
A3
PSRAM
PC2
A4
A4
PSRAM
PC3
A5
NPCS1
A5
PSRAM
PC4
A6
NPCS2
A6
PSRAM
PC5
A7
NPCS3
A7
PSRAM
PC6
A8
PWML0
A8
PSRAM
PC7
A8
PWML1
A8
PSRAM
PC8
A10
PWML2
A10
PSRAM
PC9
A11
PWML3
A11
PSRAM
PC10
A12
CTS3
A12
PSRAM
PC11
A13
RTS3
A13
PSRAM
PC12
NCS1
TXD3
NCS1
NAND Flash
PC13
A2
RSD3
3AXS_SLEEP#
Accelerometer
PC14
A3
NPCS2
NPCS2
Touch Screen
PC15
NWR1/NBS1
AD12BAD4
NBS1
NAND Flash
PC16
NCS2
AD12BAD5
NCS2
LCD
PC17
NCS3
AD12BAD6
3AXS_YOUT
Accelerometer
PC18
NWAIT
AD12BAD7
3AXS_ZOUT
Accelerometer
PC19
SCK3
BL_EN
Back Light
PC20
A14
A14
PSRAM
PC21
A15
A15
PSRAM
PC22
A16
A16
PSRAM
PC23
A17
A17
PSRAM
PC24
A18
A18
PSRAM
PC25
A19
PWMH1
A19
PSRAM
PC26
A20
PWMH2
SLP_TR
ZigBee
PC27
A23
PWMH3
ZB_RSTN
ZigBee
MCDA4
SD/MMC
PC28
SAM3U-EK Evaluation Kit User Guide
Peripheral B
PWML3
Extra Function
NPCS1
MCDA4
AD4
4-21
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
Table 4-7. PIO Port C Assignment
I/O Line
Peripheral A
Peripheral B
Extra Function
EK Usage
Device
PC29
PWML0
MCDA5
AD5
MCDA5
SD/MMC
PC30
PWML1
MCDA6
AD6
MCDA6
SD/MMC
PC31
PWML2
MCDA7
AD7
MCDA7
SD/MMC
4.4.2
Jumpers
The SAM3U-EK board jumpers are used for many purposes such as internal Flash Memory reinitialization, power current measurement and other configurations.
Table 4-8. Jumpers Setting
Designation
4-22
6478F–ATARM–25-Jul-11
Label
Default Setting
Feature
JP1
ERASE
Open
Close it to reinitialize the Flash content and
some of its NVM bits.
This jumper must be closed for more than
220 ms at power-up to perform the reinitialization.
JP2 (DNP)
TEST
Not populated (open)
reserved
JP3
VIN
Close
Measure current feed into VDDIN pin
JP5
AD12BVREF
Pin1 Pin2 close,
Switch to +3V3
Select the reference voltage of the 12-bit
ADC to be either 3.3V (close 1-2) or 2.5V
(close 2-3)
JP6
VIO
Close
Measure current feed into VDDIO pins
JP7
VUTMI
Close
Measure current feed into VDDUTMI pin
JP8
VANA
Close
Measure current feed into VDDANA pin
JP9
VCORE
Close
Measure current feed into VDDCORE pins
JP10
VPLL
Close
Measure current feed into VDDPLL pin
JP11
VOUT
Close
Measure current out of VDDOUT pin
JP12
NCS0
Close
Disconnection possibility on NCS0
JP13
NCS1
Close
Disconnection possibility on NCS1
JP14
NCS2
Close
Disconnection possibility on NCS2
JP15
3AXS
Close
G-select feature, sensitivity level switch.
Close as 440mv/g, open as 117.5mV/g
JP16
3AXS
Close
Open to cause a slight deflect on each axis
output, which is device self test
JP17
FORCE POWER ON
Close
Force +3V3 LDO output valid
JP18 (DNP)
-
Not populated (open)
Close to enable 50-Ohm terminal resistor for
AD12BAD3 BNC port
JP19 (DNP)
-
Not populated (open)
Close to enable 50-Ohm terminal resistor for
AD0 BNC port
JP20
ADVREF
Pin1 Pin2 close,
Switch to +3V3
Select the reference voltage of the 10-bit
ADC to be either 3.3V (close 1-2) or 2.5V
(close 2-3)
JP21
-
Open
Measure current feed into ZigBee module
SAM3U-EK Evaluation Kit User Guide
Evaluation Kit Hardware
4.4.3
Test Points
Some test points have been placed on the SAM3U-EK board for the verification of important signals.
Table 4-9. Test Points
4.4.4
Designation
Part
Description
TP1
Pad
Aux ADC input IN3 for touch screen control
TP2
Pad
Aux ADC input IN4 for touch screen control
TP3
Ring Hook
+3V3
TP4
Ring Hook
+5V
TP5
Ring Hook
GND
TP6
Ring Hook
GND
TP7
Ring Hook
GND
TP8
Ring Hook
GND
TP9
Pad
FWUP
TP10
Pad
SHDN
TP11
Pad
ADVREF
TP12
Pad
AD12BVREF
TP13
Pad
LED_A1
TP14
Pad
LED_A2
TP15
Pad
LED_A3
TP16
Pad
LED_A4
TP17
Pad
UTXD
TP18
Pad
URXD
TP19
Pad
TXD1
TP20
Pad
RXD1
Solder Drops
Two solder drops have been designed on the SAM3U-EK for isolation puposes.
Table 4-10. Solder Drops
4.4.5
Designation
Default Setting
Feature
SD3
Open
Isolation of AD12BAD3 input from PIO expansion socket
SD4
Open
Isolation of AD0 input from PIO expansion socket
Assigned PIO Lines, Disconnection Possibility
As pointed out in previous interface descriptions, 0-Ohm resistors have been inserted on the PIO lines
receiver path of the SAM3U-EK. Some PIO lines are connected to an external driver on the board. The
0-Ohm resistors allow disconnecting each of these for custom usage (through PIO expansion connec-
SAM3U-EK Evaluation Kit User Guide
4-23
6478F–ATARM–25-Jul-11
Evaluation Kit Hardware
tors, for example). This feature gives the user an added level of versatility for prototyping a system of his
own. See the table below.
Table 4-11. Disconnecting Possibility
4-24
6478F–ATARM–25-Jul-11
Designation
Default Assignment
PIO
R14
NANDRDY
PB24
R15
NANDOE
PB17
R16
NANDWE
PB18
R20
BL_EN
PC19
R24
NPCS2
PC14
R25
BUY_TSC
PA2
R26
IRQ_TSC
PA24
R46
RD
PA27
R47
RF
PA31
R61
AD12BAD2
PB3
R62
AD12BAD6
PC17
R63
AD12BAD7
PC18
R97
TK
PA28
R99
RK
PA29
R100
IRQ0_ZBEE
PA0
R103
URXD
PA11
R104
RXD1
PA21
R105
CTS1
PA23
SAM3U-EK Evaluation Kit User Guide
Section 5
Schematics
5.1
Schematics
This section contains the following schematics:
Block Diagram
Design Notes
SAM3U PIO
SAM3U CPU
EBI Memory 1MB PSRAM
EBI Memory II 2GB NAND Flash
TFT LCD and TSC
UART and COM1 RS232
Audio DAC
SD/MMC Interface
Accelerometer, Temp, Buttons
USB and JTAG
Power Supply, ADC and LED
SAM3U Socket
User Interface and ZigBee
SAM3U-EK Evaluation Kit User Guide
5-1
6478F–ATARM–25-Jul-11
5
4
3
2
1
SAM3U-EK RevB Block Diagram
D
D
ATMEL Cortex M3 Processor SAM3U (LQFP144)
Reset,Debug Logic
Power Manage
C
C
Audio DAC
SD/MMC Card
PSRAM
Accelerometer
B
Temperature sense
Nand Flash
USB & UART
2.8 Inch TFT-LCD
B
User Interface (PIO PortA,B,C)
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
Block Diagram
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
1
15
5
4
3
2
1
D
D
1. SAM3U-EK Revision HISTORY
Rev: A
SCH: SAM3U-EK RevA Data: 2008/12
Note: Original Released
Rev: B
C
C
SCH: SAM3U-EK RevB Data: 2009/04
Note: Final Released
2. Explain of Schematics
(1) Resistance Unit: "K" is
"K¦¸"
"R" is "¦¸"
(2) "DNP" means the component
is not populated by default
B
B
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
Design notes
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
2
15
5
{7,8,9,10,11,12,14,15}
4
3
2
1
PA[31:0]
PB[31:0]
{5,6,7,11,13,14,15}
MN1A
SAM3U
D
109
111
113
115
117
119
121
123
128
130
132
133
134
87
88
91
93
95
99
100
101
102
77
103
105
106
107
64
45
46
78
48
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
C
{5,6,7,10,11,14,15} PC[31:0]
110
112
114
116
118
120
122
124
129
131
89
92
94
98
28
81
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
B
D
PA0/WKUP0
PA1/WKUP1
PA2/WKUP2
PA3/CK
PA4/CDA
PA5/DA0
PA6/DA1
PA7/DA2
PA8/DA3
PA9/TWD0
PA10/TWCK0
PA11/URXD
PA12/UTXD
PA13/MISO
PA14/MOSI
PA15/SPCK
PA16/NPCS0
PA17/WKUP7
PA18/WKUP8
PA19/WKUP9
PA20/TXD1
PA21/RXD1
PA22/RTS1
PA23/CTS2
PA24/WKUP11
PA25/WKUP12
PA26/TD
PA27/PCK0
PA28/TK
PA29/PWMH1
PA30/TF
PA31/RF
PB0/PWMH0
PB1/PWMH1
PB2/PWMH2
PB3/AD12BAD2
PB4/AD12BAD3
PB5/AD0
PB6/D15
PB7/A0/NBS0
PB8/A1
PB9/D0
PB10/D1
PB11/D2
PB12/D3
PB13/D4
PB14/D5
PB15/D6
PB16/D7
PB17/NANDOE
PB18/NANDWE
PB19/NRD
PB20/NCS0
PB21/A21/NANDALE
PB22/A22/NANDCLE
PB23/NWR0/NWE
PB24/NANDRDY
PB25/D8
PB26/D9
PB27/D10
PB28/D11
PB29/D12
PB30/D13
PB31/D14
PC0/A2
PC1/A3
PC2/A4
PC3/A5
PC4/A6
PC5/A7
PC6/A8
PC7/A9
PC8/A10
PC9/A11
PC10/A12
PC11/A13
PC12/NCS1
PC13/RXD3
PC14/NPCS2
PC15/NWR1/NBS1
PC16/NCS2
PC17/AD12BAD6
PC18/AD12BAD7
PC19/NPCS1
PC20/A14
PC21/A15
PC22/A16
PC23/A17
PC24/A18
PC25/A19
PC26/PWMH2
PC27/A23
PC28/DA4
PC29/DA5
PC30/DA6
PC31/DA7
53
55
57
79
80
65
66
67
68
31
30
59
61
62
29
97
96
26
25
24
23
21
20
19
15
14
13
12
10
8
6
5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
C
PC[31:0]
82
83
84
32
108
22
47
49
54
56
58
63
69
70
71
72
{5,6,7,10,11,14,15}
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
B
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
07-jul-11
PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
SAM3U PIO
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
3
15
5
4
VIO
+3V3
C106
10nF
JP1
JP
JP2
DNP
R1
DNP
137
138
142
135
136
39
11
141
{7,11,12,14} NRST
{11,14}
NRSTB
C
1
4
7
9
{12,14}
{12,14}
{12,14}
{12,14}
TDI
TDO
TMS
TCK
{12,14}
{12,14}
DHSDP
DHSDM
{14}
{14}
R6
R7
36
35
0R
0R
XIN
XOUT
NOT POPULATED
VBG
R9
6.8K 1%
J1
1
3
5
2
4
R8
18
52
60
90
126
DNP
C19
10pF
140
33
DGND
43
DGND
VUTMI
75
JP7
JP
L3
10uH/100mA
C107
100nF
VANA
R101
1R
DGND
C109
100nF
A
R102
1R
C110
4.7uF
VDDIN
VBG
NRST
NRSTB
DHSDP
DHSDM
DFSDM
DFSDP
C3
100nF
16
27
44
50
86
125
VDDCORE1
VDDCORE2
VDDCORE3
VDDCORE4
VDDCORE5
VDDCORE6
TDI
TDO/TRACESWO
TMS/SWDIO
TCK/SWCLK
VOUT
2
VDDOUT
+3V3
C4
4.7uF
VCORE
DGND
VPLL
C5
100nF
C6
100nF
C7
100nF
C8
100nF
XIN32
XOUT32
XIN
XOUT
GND1
GND2
GND3
GND4
GND5
DGND
17
51
85
104
127
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
DGND
C12
100nF
VUTMI
40
VDDUTMI
C
VIO
C13
100nF
C14
100nF
C15
100nF
C16
100nF
C18
100nF
GNDBU
GNDPLL
GNDUTMI
GNDANA
C20
100nF
VBU
139
VDDBU
VANA
DGND
73
VDDANA
C24
20pF
DGND
JP4
JP
D6
BAT54C
3
+3V3
B
1
2
C21
1uF
C25
20pF
XIN32
Y1
12.000MHz
XOUT1
JP9
JP
VPLL
JP10
JP
VIO
JP6
JP
JP11
JP
C26
20pF
1
3
CR1225
+
3
XOUT32
4
3V
DGND
BT1
KY001
C27
20pF
DGND
A
VOUT
B
A
INIT EDIT
REV MODIF.
+3V3
SAM3U-EK RevB
DGND
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
SAM3U CPU
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
2
4
3
Y2
32.768KHz
DGND
C17
4.7uF
DGND
DGND
VCORE
C105 + C10
100nF
10uF
C9
100nF
C11
100nF
XIN1
L4
10uH/100mA
D
+ C2
C1
100nF
10uF
DGND
34
VDDPLL
JP3
JP
VIN
3
DGND
DGND
JP8
JP
74
76
ADVREF
AD12BVREF
+3V3
+ C23
10uF
C108
4.7uF
ERASE
TEST
JTAGSEL
FWUP
SHDN
2
B
37
38
41
42
144
143
XIN32
XOUT32
XIN32
XOUT32
XIN1
XOUT1
{14}
{14}
39R DFSDM
39R DFSDP
R2
R3
DFSDM {14}
DFSDP
{14}
ADVREF {13,14}
AD12BVREF{13,14}
MN1B
SAM3U
VBG
VBG
1
DFSDM
DFSDP
{14}
ERASE
{14}
TEST
{14}
JTAGSEL
{11,14}
FWUP
{13,14}
SHDN
{14}
2
1
D
3
3
2
1
4
15
5
4
3
2
1
D
D
{3,6,7,11,13,14,15} PB[31:0]
PB7
PB19
PB20
PB23
{3,6,7,10,11,14,15} PC[31:0]
C
+3V3
+3V3
R10
47K
NCS0
NRD
NWE
PB20
PB19
PB23
JP12
JP
R11
47K
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC20
PC21
PC22
PC23
PC24
PC25
NBS0
NBS1
PB7
PC15
PB8
MN2
PSRAM 512K x16
3
4
5
9
10
15
16
22
44
45
46
47
39
40
33
34
28
21
43
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
1
8
LB#
UB#
11
2
41
6
B
CE#
OE#
WE#
ZZ#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
NC1
NC2
NC3
VCC
VCCQ
VSS
VSSQ
12
17
18
23
29
35
36
42
7
13
14
20
26
32
31
37
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PB6
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
C
27
38
48
24
25
30
19
+3V3
C28
100nF
C29
1uF
B
DGND
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
EBI Memory I 1MB PSRAM
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
5
15
5
4
3
2
1
D
D
{3,5,7,11,13,14,15} PB[31:0]
+3V3
R12
47K
C
PB24 R14
PB17
NANDRDY
NANDOE
{3,5,7,10,11,14,15} PC[31:0]
NCS1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
R13
47K
0R
JP13
JP
PC12
+3V3
+3V3
C30
100nF
NANDCLE
NANDALE
NANDWE
+3V3
PB22
PB21
PB18
R17
47K
R18
DNP
MN3
MT29F2G16AADWP
NC1
NC2
NC3
NC4
NC5
NC6
R/B#
RE#
CE#
NC7
NC8
VCC1
VSS1
NC9
NC10
CLE
ALE
WE#
WP#
NC11
NC12
NC13
NC14
NC15
VSS4
IO15
IO14
IO13
IO7
IO6
IO5
IO4
IO12
VCC4
NC17
VCC3
VSS3
NC16
VCC2
IO11
IO3
IO2
IO1
IO0
IO10
IO9
IO8
VSS2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
PB6
PB31
PB30
PB16
PB15
PB14
PB13
PB29
D15
D14
D13
D7
D6
D5
D4
D12
C
+3V3
C31
100nF
C32
100nF
C33
100nF
PB28
PB12
PB11
PB10
PB9
PB27
PB26
PB25
D11
D3
D2
D1
D0
D10
D9
D8
B
B
DGND
DGND
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
EBI Memory II NAND FLASH
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
6
15
5
4
3
1
J2
FH26-39S-0.3SHW
{4,11,12,14} NRST
X_RIGHT
Y_UP
X_LEFT
Y_DOWN
C
+3V3
LED_A1
LED_A2
LED_A3
LED_A4
C39
100nF
R93
R94
R95
R96
0R
0R
0R
0R
DGND
GND1
CS
RS
WR
RD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
NC1
NC2
RESET
GND2
X+
Y+
XYGND3
VDD1
VDD2
A1
A2
A3
A4
NC3
NC4
K
shelled1
shelled2
X_RIGHT
Y_UP
X_LEFT
Y_DOWN
LED_A1
TP13
SMD
LED_A2
TP14
SMD
LED_A3
TP15
SMD
LED_A4
TP16
SMD
3
4
The part is placed as
close as possible to J2
5
D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
CS#
D5
PACDN044Y5R
TVS, SOT23-5
2
PC16
PB8
PB23
PB19
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PB6
JP14
JP
1
{3,5,6,11,13,14,15} PB[31:0]
+ C38
10uF
2
NOT POPULATED
D
DGND
+3V3
4
R19
47K
PC19
R20
0R
+3V3
B7
BN03K314S300R
C34
1uF
VLED
C36
4.7uF
3
9
10
11
MN4
AAT3194ITP
C1+
C2+
C1EN/SET
C2OUT
IN
D1
D2
D3
D4
GND
1
C35
1uF
12
C
2
8
7
6
5
LED_A1
LED_A2
LED_A3
LED_A4
C37
1uF
DGND
DGND
DGND
{3,5,6,10,11,14,15} PC[31:0]
PC14
PC16
PC19
B
+3V3
2
3
4
5
X_RIGHT
Y_UP
X_LEFT
Y_DOWN
TP1
SMD
B
R28
100K
XP
YP
XM
YM
TP2
SMD
DCLK
DIN
DOUT
CS
BUSY
PENIRQ
7
8
A
R21
100K
MN5
ADS7843E
R29
100K
IN3
IN4
VREF
VCC1
VCC2
GND
R24
13
11
R25
R26
9
1
10
R27
0R
C40
100nF
{3,8,9,10,11,12,14,15}
R22
100K
16
14
12
15
6
PA[31:0]
+3V3
0R
PA15
PA14
PA13
PC14
SPCK
MOSI
MISO
NPCS2
0R
0R
PA2
PA24
BUY_TSC
IRQ_TSC
C41
100nF
AGND1
C42
100nF
R91
1R
+3V3
L1
10uH/100mA
C43
4.7uF
A
B
A
R30
0R
INIT EDIT
REV MODIF.
DGND
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
TFT-LCD & TSC
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
7
15
4
3
16
PA[31:0]
R31
100K
UTXD
URXD
PA12
PA11
6
C47
100nF
R32
100K
R103
0R
R33
0R
C
TP17
SMD
TP18
SMD
+3V3
R34
100K
B
TXD1
RXD1
RTS1
CTS1
PA20
PA21
PA22
PA23
15
11
12
10
9
V+
C1-
V-
C2+
GND
C2-
T1IN
R1OUT
T2IN
R2OUT
T1OUT
R1IN
T2OUT
R2IN
3
J3
MALE RIGHT ANGLED
4
5
1
6
2
7
3
8
4
9
5
C48
100nF
14
13
7
8
C
DGND
DGND
MN7
MAX3232CSE
+3V3
+3V3
2
C45
100nF
16
C51
100nF
C49
100nF
6
C52
100nF
R35
100K
R104
0R
R105
0R
2
15
11
12
10
9
VCC
C1+
V+
C1-
V-
C2+
GND
C2-
T1IN
R1OUT
T2IN
R2OUT
T1OUT
R1IN
T2OUT
R2IN
1
3
C50
100nF
J4
MALE RIGHT ANGLED
4
5
1
6
2
7
3
8
4
9
5
C53
100nF
14
13
7
8
DGND
TP19
SMD
DGND
TP20
SMD
B
11
{3,7,9,10,11,12,14,15}
C46
100nF
C1+
11
C44
100nF
VCC
D
1
10
+3V3
+3V3
1
MN6
MAX3232CSE
D
+3V3
2
10
5
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
UART & COM1 RS232
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
8
15
4
D
1
27
+ C54
10uF
C55
100nF
C56
100nF
28
26
2
DGND
16
+ C61
10uF
C62
100nF
12
13
MN8
XWM8731EDS
DBVDD
DCVDD
AVDD
HPVDD
DGND
AGND
HPGND
XTO
CLKOUT
2
14
8
1
AVDD
C57
100nF
15
11
D
+ C59
10uF
C58
100nF
AGND
VMID
LHPOUT
LOUT
ROUT
RHPOUT
9
C60
10
C63
+
+3V3
3
220uF
+
5
220uF
B1
BN03K314S600R
R36
47K
B2
BN03K314S600R
R37
47K
C64
470pF
J5
1 EARJACK
2
3
4
5
C65
470pF
HEADPHONE
LINE-OUT
AGND
+3V3
C
+3V3
+3V3
C
AGND
R38
100K
TWD0
TWCK0
PCK0
TD
TF
RD
RF
R39
4.7K
R40
4.7K
LLINEIN
PA9
PA10
22
23
24
PA21
BCLK
PA26
PA30
PA27
PA31
R46
R47
0R
0R
25
3
4
5
6
7
R49
10K
21
CSB
SDIN
SCLK
RLINEIN
20
C66
1uF
R41
5.6K
19
C67
1uF
R42
5.6K
C68
220pF
XTI/MCLK
BCLK
DACDAT
DACLRC
ADCDAT
ADCLRC
MICBIAS
MODE
MICIN
17
R48
680R
18
R50
330R
C69
220pF
R43
5.6K
R44
5.6K
B4
BN03K314S600R
C72
L2
10uH/100mA
+3V3
R97
R99
0R
0R
C77
100nF
BCLK
DGND
R55
0R
LINE-IN
FGND
J7
1 EARJACK
2
3
4
5
R52
47K
C74
470pF C75
DNP
AGND
+ C76
10uF
C71
470pF
R51
0R
C73
220pF
PA[31:0]
J6
1 EARJACK
2
3
4
5
B5
BN03K314S600R
1uF
DGND
PA9
PA10
PA21
PA26
PA27
PA28
PA29
PA30
PA31
C70
470pF
AGND
B
{3,7,8,10,11,12,14,15}
FGND
B3
BN03K314S600R
+ C78
47uF
MONO/STEREO
MICRO INPUT
R53
0R
R54
0R
AVDD
B
FGND
AGND
AGND
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
Audio DAC
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
9
15
5
4
3
2
1
D
D
+3V3
R58
10K
RA1
47KX4
{3,5,6,7,11,14,15} PC[31:0]
DA4
C
RA2
47KX4
J8
7SDMM-B0-2211-A
5
6
7
8
R57
10K
5
6
7
8
R56
10K
4
3
2
1
PA[31:0]
4
3
2
1
{3,7,8,9,11,12,14,15}
DA2
PA7
1
DA3
PC28
PA8
2
3
CDA
PC29
PA4
4
5
6
7
DA5
DA6
DA7
8
9
CK
PC30
PA3
WKUP12
PC31
PA25
10
11
PA5
PA6
12
13
DA0
DA1
14
B
RSV/DAT3
DAT4
CMD
DAT5
GND
VCC
CLK
DAT6
GROUND1
SHELLED1
SHELLED2
GROUND
C
15
17
18
16
CD
DAT7
DGND
DAT0
DAT1
SD_WP
B
DGND
+3V3
+ C79
10uF
DAT2
C80
100nF
DGND
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
SD/MMC interface
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
10
15
5
4
3
+3V3
2
+3V3
R59
10K
{3,5,6,7,13,14,15} PB[31:0]
D
{3,5,6,7,10,14,15} PC[31:0]
JP15
JP
JP16
JP
R60
10K
10
13
7
DGND
PC13
3AXS_SLEEP#
PB3
PC17
PC18
ADC0_AD2
ADC0_AD6
ADC0_AD7
R61
R62
R63
2
3
4
1
14
0R
0R
0R
C82
3.3nF
DGND
C
1
C83
3.3nF
C84
3.3nF
MN9
MMA7341L
g-Select
Self Test
Sleep
XOUT
YOUT
ZOUT
NC1
NC6
D
+3V3
6
VDD
C81
100nF
5
VSS
8
9
11
12
NC2
NC3
NC4
NC5
DGND
DGND
DGND
C
+3V3
{3,7,8,9,10,12,14,15}
PA[31:0]
R64
47K
R15
0R
PA9
TWD0
5
MN10
MCP9800
SDA
VDD
GND
R16
0R
PA17
PA18
PA19
TEMP_ALARM
B
4
PA10
TWCK0
SCLK ALERT
+3V3
1
C85
100nF
2
3
DGND
B
VBU
R65
100K
1
2
{4,7,12,14} NRST
{4,14}
{4,14}
1
2
NRSTB
FWUP
1
2
WAKE_UP#
A
BP1
BP2
BP3
3
4
BP4
1
2
C86
3
4
3
4
BP5
C87
10nF
PA18
BP_LEFT#
R66
100R
10nF
1
2
DGND
3
4
3
4
PA19
BP_RIGHT#
R67
100R
A
B
A
INIT EDIT
REV MODIF.
DGND
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
Accelerometer,Temp,Buttons
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
11
15
5
4
3
2
1
D
D
B6
BN03K314S300R
{4,14}
{4,14}
{3,7,8,9,10,11,14,15}
DHSDP
DHSDM
PA[31:0]
VBUS_USB
PA0
R68
47K
C88
10pF
R69
68K
DGND
MN11
TPD3E001DRLR
1
5
2 IO1 VCC
3 IO2
4
GND IO3
DGND
DGND
C
6
5
3
2
4
1
J9
USB TYPE B PORT
E_GND1
E_GND0
D+
DGND
VBUS
C89
100nF
DGND
NOT POPULATED
C
+3V3
R70
100K
R71
100K
R72
100K
R73
100K
R74
100K
B
{4,14}
{4,14}
{4,14}
TDI
TMS
TCK
{4,14}
TDO
{4,7,11,14} NRST
R75
0R
J10
IDC20-2.54mm
1
3
5
7
9
11
13
15
17
19
VTref
Vsupply
nTRST
GND1
TDI
GND2
TMS
GND3
TCK
GND4
RTCK
GND5
TDO
GND6
nSRST
GND7
DBGRQ GND8
DBGACK GND9
2
4
6
8
10
12
14
16
18
20
+ C91
C90
100nF
10uF
B
DGND
DGND
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
USB & JTAG
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
12
15
1
SV
2
C92
100nF
+5V
3
CV
4
5
6
SG CG1
CG2
CG3
TP4
+5V
+5V
+ C93
22uF
1
MN12
MIC29152WU
Micrel's 1.5A LDO, TO263-5
2
PWR_CN
1
VIN
VOUT
SD
ADJ
3
2
D
MN14
BNX002-01
2
GND2
MN13
ZEN056V130A24LS
1
3
3
J11
MP179P 2.1mm
1
2
3
GND1
4
5
R76
330R 1%
2
3
C96
100nF
R77
200R 1%
PWR_CN
Q1
IRLML6401
DGND
R79
100K
1
R78
100K
D
+ C95
100uF
DGND
+5V
TP3
+3V3
+3V3
4
6
5
3
{4,14}
Q2
IRLML2502
1
R80
10K
SHDN
JP17 DGND
JP
C94
15pF
C
CN1
BNC
2
1
2
3
4
PB4
PB5
R83
49.9R 1%
D2
green-led
CN2
BNC
0603
R87
220R
PB1
USR_LED2#
D3
PB2
R89
ADC
R84
0R
R86
DNP
5
JP19
JP
R88
49.9R 1%
100K
PB5
D4
DGND
red-led
0603
TP5
GND
DGND
{4,14}
+3V3 2
ADVREF
C104
100nF
DGND
A
{4,14} AD12BVREF
C103
100nF
+2V5
+3V3
+2V5
2
JP20
JUMP_3
1
+3V3
3
R90
4.7K
TP7
GND
TP8
GND
4
VR1
10K 5
Potentiometer
2
DGND
ADC
C99
10nF
DGND
MN15
LM4040-2.5
A
B
A
REV
DGND
SAM3U-EK RevB
INIT EDIT
MODIF.
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
Power Supply, ADC & Led
DGND
5
TP6
GND
+5V
3
JP5
JUMP_3
1
1
R92
220R
B
+3V3
3
3
AD0
C98
10nF
1
Q3
IRLML2502
2
AD12BAD3
R82
0R
DGND
1
2
3
4
green-led
0603
POWER_LED#
C97
10nF
+3V3
R85
220R
PB0
USR_LED1#
PB4
C
JP18
JP
DGND
{3,5,6,7,11,14,15} PB[31:0]
B
R81
DNP
5
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
4
3
2
1
13
15
5
4
3
2
1
D
D
J12
VOUT
VIN
PB23
PB22
PB21
PC21
PB20
PB19
PB18
PB17
VPLL
TP9
SMD
TP10
SMD
PC14
PB14
PB10
PB9
PC19
XOUT
XIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
PC7
PA7
PC6
PA6
PC5
PA5
PC4
PA4
PC3
PA3
PC2
PA2
PC1
PA1
PC0
PA0
SAM3U Socket
7020-144-608 ANTARES
146
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
146
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
PC20
PA26
PA25
PA24
VIO
PA23
PA21
PA20
PA19
PA18
PC13
PB15
PB16
PA17
PC12
PA16
PC11
PA15
C
PC10
PA14
PA13
VCORE
VIO
PC18
PC17
PC16
PC15
PB4
PB3
PA30
PA22
AD12BVREF
ADVREF
VANA
B
TP11 TP12
SMD SMD
VUTMI
VCORE
VCORE
PB12
PB13
PC27
PA27
PB5
PB6
PB7
PB8
PC28
PC29
PC30
PC31
DGND
PB0
PC24
PB1
PC25
PB2
PC26
PB11
145
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
B
ERASE
TEST
JTAGSEL
FW UP
SHDN
VBG
NRST
NRSTB
TDI
TDO
TMS
TCK
DHSDP
DHSDM
DFSDM
DFSDP
XIN32
XOUT32
XIN
XOUT
ADVREF
AD12BVREF
TDO
PB31
PB30
TMS
PB29
TCK
PB28
NRST
PB27
PB26
PB25
PB24
VCORE
VIO
VCORE
{4}
ERASE
{4}
TEST
{4}
JTAGSEL
{4,11} FW UP
{4,13} SHDN
{4}
VBG
{4,7,11,12} NRST
{4,11} NRSTB
{4,12} TDI
{4,12} TDO
{4,12} TMS
{4,12} TCK
{4,12} DHSDP
{4,12} DHSDM
{4}
DFSDM
{4}
DFSDP
{4}
XIN32
{4}
XOUT32
{4}
XIN
{4}
XOUT
{4,13} ADVREF
{4,13} AD12BVREF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
TDI
TEST
ERASE
SHDN
FWUP
PA12
PA11
PA10
PC9
PA9
PC8
PA8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
VIO VCORE
PA28
PA29
PC22
PA31
PC23
C
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
DFSDM
DFSDP
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
XIN32
XOUT32
JTAGSEL
NRSTB
VBU
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
PC[31:0]
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
PB[31:0]
{3,5,6,7,10,11,15}
145
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
PA[31:0]
{3,5,6,7,11,13,15}
DHSDP
DHSDM
VBG
{3,7,8,9,10,11,12,15}
NOT POPULATED
VIO
A
A
B
A
REV
SAM3U-EK RevB
ZXL
ZXL
INIT EDIT
MODIF.
SCALE
DES.
19-MAY-09 PP
20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
REV.
B
SAM3U socket
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
VER.
1
DATE
SHEET
14
15
5
4
3
2
1
D
D
{3,7,8,9,10,11,12,14}
PA[31:0]
{3,5,6,7,11,13,14} PB[31:0]
SOLDER DROP 2 pins open.Normal
{3,5,6,7,10,11,14} PC[31:0]
PB4
PB5
SD3
SD4
BB4
BB5
SOLDER DROP 2 pins open.Normal
+5V
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
C
+3V3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
J13
048
DGND
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
+5V
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
PB0
PB1
PB2
PB3
BB4
BB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
+3V3
+3V3
DGND
DGND
J14
048
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
+5V
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
+3V3
+3V3
DGND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
J15
048
+5V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
C
+3V3
DGND
DGND
B
B
ZB_RSTN
IRQ1_ZBEE
SPIO_NPCS0#
MISO
PC27
PA1
PA16
PA13
1
3
5
7
9
J16
2
4
6
8
10
R100
0R
C100
18pF
PA0
PC26
PA14
PA15
C101
2.2nF
IRQ0_ZBEE
SLP_TR
MOSI
JP21
SPCK
JP
+3V3
C102
2.2uF
DGND
A
A
B
A
INIT EDIT
REV MODIF.
SAM3U-EK RevB
SCALE
ZXL
ZXL
DES.
19-MAY-09 PP 20-JAN-10
03-FEB-09 XXX XX-XXX-XX
DATE
1/1
VER.
DATE
REV.
SHEET
B
User interface & ZigBee
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
5
4
3
2
1
15
15
Section 6
Troubleshooting
6.1
Self-Test
A test package software is available to implement a functional test for each section of the board. Refer to
the SAM3U-EK page on www.atmel.com.
6.2
Board Recovery
The SAM3U-EK is delivered with an on-board recovery procedure allowing to reprogram the board as it
was when shipped. This procedure is accessible from the Flash disk mounted on a PC when the board is
connected to this PC through the USB as described in Section 3.
SAM3U-EK Evaluation Kit User Guide
6-1
6478F–ATARM–25-Jul-11
Section 7
Errata
7.1
JTAG/ICE: Missing Pull-up Resistor on TDO Pin
The TDO pin is in input mode with the pull-up resistor disabled when the Cortex M3 is not in debug
mode.
Problem Fix/Workaround
To avoid current consumption on VDDIO and/or VDDCORE due to floating input, an external pull-up
resistor (100 kΩ) corresponding to this PIO line must be added.
SAM3U-EK Evaluation Kit User Guide
7-1
6478F–ATARM–25-Jul-11
Errata
7-2
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide
Section 8
Revision History
8.1
Revision History
Table 8-1.
Document
Comments
Change Request
Ref.
6478F
Section 5.1, ” Schematics”, PB5/AD1 changed to PB5/AD0 on Sheet 3/15.
7949
6478E
Erratum added as a Section 7.1 in a newly created Section 7 “Errata” .
7638
6478D
Table 4-5, “PIO Port A Assignment” , first row edited.
7387
6478C
Vendor name and reference removed from PSRAM in Section 4.3.2, ” Memory” and
Figure 4-2, ” PSRAM”
Table 4-8, JP15 and JP16 Default Settings changed from ‘Open’ to ‘Close’; JP16 Feature
6478B
edited.
Table 4-8, JP17 Default Setting changed from ‘Open’ to ‘Close’; JP17 Feature edited.
6478A
6975
6445
6727
First issue.
SAM3U-EK Evaluation Kit User Guide
8-1
6478F–ATARM–25-Jul-11
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6478F–ATARM–25-Jul-11