Data Sheet

BGX7221
Dual receiver down mixer
Rev. 3 — 8 August 2012
Product data sheet
1. General description
The BGX7221 device combines a pair of high performance, high linearity down-mixers for
use in receivers having a common local oscillator, for instance having main and diversity
paths. The device covers the frequency range from 1400 MHz to 2700 MHz. Each mixer
provides an input 1 dB compression point (ICP1dB) above 13 dBm, with an input
third-order intercept point (IP3i) of 26 dBm. The small-signal Noise Figure (NF) is at 10 dB
whereas under large signal blocking conditions the Noise Figure is typically 20 dB.
Isolation between mixers is typically 55 dB.
2. Features and benefits











1400 MHz to 2700 MHz frequency operating range
Conversion gain 8 dB in the 2 GHz band
13 dBm input power at 1 dB gain compression point
26 dBm input third-order intercept point
10 dB typical small signal noise figure
Integrated active biasing
5 V single supply operation
Independent power-down hardware control pins per mixer
Low bias current in Power-down mode
Matched 50  single-ended RF and LO input impedance
ESD protection at all pins
3. Applications
 Mobile network infrastructure
 RF and IF applications
 Communication systems and radars
 Microwave and broadband
 Industrial applications
4. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
BGX7221HN
HVQFN36
plastic thermal enhanced very thin quad flat package; no leads;
36 terminals; body 6  6  0.85 mm
SOT1092-2
BGX7221
NXP Semiconductors
Dual receiver down mixer
5. Functional diagram
RF_A
1
MIXER A
33
32
LO_IN
IF_OUT_P_A
IF_OUT_N_A
27
BGX7221
RF_B
14
9
13
MIXER B
IF_OUT_N_B
IF_OUT_P_B
001aao042
Fig 1.
Functional block diagram
Each mixer, A and B employs a transformer to convert the single-ended RF input into a
differential signal to drive the passive MOS mixer. The MOS mixer directly drives the IF
amplifier. Its open-collector outputs deliver the differential signal into an external
transformer load, referenced to the 5 V supply for maximum signal swing. Each mixer can
be independently powered-off by a combination of POFF_1 and POFF_2 (see Table 3.)
The dual paths allow diversity operation with a common LO path. A transformer at the LO
input converts the single-ended RF into a differential signal to drive the LO buffer chain.
The plastic package has an under-side heat-sink paddle which serves as a good RF
ground.
6. Pinning information
6.1 Pinning
Viewing the device from the top (see Figure 2), the 2 RF input ports are at the left, the
common LO input at the right, with IF outputs at the top and bottom. Multiple power and
ground pins allow for independent supply domains to improve isolation between blocks.
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
2 of 20
BGX7221
NXP Semiconductors
28 n.c.
29 n.c.
30 VCC(IF)(A)
31 IF_GND_A
32 IF_OUT_N_A
33 IF_OUT_P_A
34 IF_GND_A
terminal 1
index area
35 n.c.
36 VCC(RF)(A)
Dual receiver down mixer
RF_A
1
27 LO_IN
RF_GND_A
2
26 LO_GND
RF_GND_A
3
25 LO_GND
VCC(LO)
4
LO_GND
5
VCC(LO)
6
22 POFF_1
RF_GND_B
7
21 VCC(REG)
RF_GND_B
8
20 n.c.
RF_B
9
19 n.c.
24 POFF_2
n.c. 18
n.c. 17
23 n.c.
VCC(IF)(B) 16
IF_GND_B 15
IF_OUT_N_B 14
IF_OUT_P_B 13
IF_GND_B 12
n.c. 11
VCC(RF)(B) 10
BGX7221
Transparent top view
Fig 2.
001aao043
Pinning diagram
6.2 Pin description
BGX7221
Product data sheet
Table 2.
Pin description
Symbol
Pin
Type [1]
Description
RF_A
1
I
receiver mixer single-ended RF input; mixer A
RF_GND_A
2
G
RF ground; mixer A
RF_GND_A
3
G
RF ground; mixer A
VCC(LO)
4
P
LO power supply
LO_GND
5
G
LO ground
VCC(LO)
6
P
LO power supply
RF_GND_B
7
G
RF ground; mixer B
RF_GND_B
8
G
RF ground; mixer B
RF_B
9
I
receiver mixer single-ended RF input; mixer B
VCC(RF)(B)
10
P
RF mixer power supply; mixer B
n.c.
11
-
not connected; to be tied to ground
IF_GND_B
12
G
IF ground; mixer B
IF_OUT_P_B
13
O
symmetrical IF positive output signal; mixer B
IF_OUT_N_B
14
O
symmetrical IF negative output signal; mixer B
IF_GND_B
15
G
IF amplifier ground; mixer B
VCC(IF)(B)
16
P
IF amplifier power supply; mixer B
n.c.
17
-
not connected; to be tied to ground
n.c.
18
-
not connected; to be tied to ground
n.c.
19
-
not connected; to be tied to ground
n.c.
20
-
not connected; to be tied to ground
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
3 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
Table 2.
Pin description …continued
Symbol
Pin
Type [1]
Description
VCC(REG)
21
P
internal regulator power supply
POFF_1
22
I
logic input to power-off mixer
n.c.
23
-
not connected; to be tied to ground
POFF_2
24
I
logic input to power-off mixer
LO_GND
25
G
LO ground
LO_GND
26
G
LO ground
LO_IN
27
I
single-ended local oscillator positive input
n.c
28
-
not connected; to be tied to ground
n.c
29
-
not connected; to be tied to ground
VCC(IF)(A)
30
P
IF amplifier power supply; mixer A
IF_GND_A
31
G
IF amplifier mixer; mixer A
IF_OUT_N_A
32
O
symmetrical IF negative output; mixer A
IF_OUT_P_A
33
O
symmetrical IF positive output; mixer A
IF_GND_A
34
G
IF ground; mixer A
n.c.
35
-
not connected; to be tied to ground
VCC(RF)(A)
36
P
RF power supply; mixer A
Exposed paddle
-
G
exposed paddle; must be connected to RF and DC
ground
[1]
G: ground; I: input; O: output; P: power.
7. Functional description
7.1 Power-up control
Table 3.
Shutdown control
Mode
Description
Function
POFF_1
POFF_2
Active
mixers A and B active
shutdown disabled
0
0
Idle
mixers A and B OFF; current supplied to shutdown enabled
LO buffer
1
0
Main
mixer A active; mixer B OFF
partial shutdown
0
1
Diversity
mixer B active; mixer A OFF
partial shutdown
1
1
Power-up enable pins to allow each mixer to be placed in Power-down mode. These pins
also enable the dedicated LO buffers for individual signal paths. A common LO input
stage remains active whatever the state of the power off control inputs, in order to
maintain good LO port matching. The time required to pass between active and inactive
states is less than 10 s. If the pins are left open or tied to ground, both mixers will be in
active state.
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
4 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
0.3
+5.5
V
Pi(RF)
RF input power
Ptot
total power dissipation
-
20
dBm
-
2.5
W
Tmb
mounting base temperature
40
+85
C
Tj
junction temperature
-
150
C
Tstg
storage temperature
VESD
electrostatic discharge voltage
continuous
65
+150
°C
EIA/JESD22-A114 (HBM)
-2500
+2500
V
EIA/JESD22-C101 (FCDM)
-650
+650
V
9. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Typ
Unit
thermal resistance from junction to mounting base
[1]
8
C/W
Rth(j-mb)
[1]
Defined according to the conditions described in the Application Note AN10998.
10. Static characteristics
Table 6.
Static characteristics
Zs = ZL = 50 ; POFF _1 = VIL and POFF _2 = VIL (shutdown disabled). Typical values at VCC = 5 V. Tmb = 25 C, unless
otherwise specified.
Symbol
Parameter
Conditions
VCC
supply voltage
ICq
quiescent collector current
Min
Typ
Max
Unit
4.75
5.0
5.25
V
[1]
-
60
-
mA
LOW-level input voltage
[1]
0
-
0.5
V
HIGH-level input voltage
[1]
2
-
5
V
LOW-level input current
[1]
-
1
-
A
HIGH-level input current
[1]
-
50
-
A
IF output; per package pin
Shutdown digital input voltage
VIL
VIH
All digital inputs current
IIL
IIH
[1]
VCC = 4.75 V to 5.25 V, Tmb = 40 C to +85 C.
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
5 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
11. Dynamic characteristics
Table 7.
Dynamic characteristics
Typical application values: POFF _1 = VIL and POFF _2 = VIL (shutdown disabled); RF and LO ports driven by 50  sources;
unless otherwise specified.
Symbol
Parameter
Conditions
ICC
supply current
both mixers in active mode
Min[1] Typ[2] Max[1] Unit
fRF = 1400 MHz
-
320
370
mA
fRF = 1700 MHz
-
330
380
mA
fRF = 1900 MHz
-
340
390
mA
-
365
420
mA
RF input frequency
fRF = 2700 MHz
[3]
1400
-
2700
MHz
flo
local oscillator frequency
signal from frequency generator;
fIF = 100 MHz to 300 MHz
[3]
1500
-
2500
MHz
Pi(lo)
local oscillator input power
signal from frequency generator
[3]
3
-
+3
dBm
Gconv
conversion gain
at Tmb = 25 C; fi(RF) = 1400 MHz to
2700 MHz
[4]
6.8
8
9.5
dB
G/T
gain variation with
temperature
Tmb = 40 C to +85 C
-
0.011 -
dB/C
G
gain deviation
fi(RF) = 1400 MHz to 1465 MHz;
flo = 1245 MHz
-
0.2
-
dB
fi(RF)
[4][5]
fi(RF) = 1710 MHz to 1785 MHz;
flo = 1550 MHz
[4][5]
-
0.3
-
dB
fi(RF) = 1850 MHz to 1910 MHz;
flo = 1680 MHz
[4][5]
-
0.25
-
dB
fi(RF) = 1920 MHz to 1980 MHz;
flo = 1750 MHz
[4][5]
-
0.25
-
dB
fi(RF) = 2300 MHz to 2400 MHz;
flo = 2150 MHz
[4][5]
-
0.4
-
dB
fi(RF) = 2500 MHz to 2570 MHz;
flo = 2335 MHz
[4][5]
-
0.25
-
dB
fi(RF) = 2570 MHz to 2620 MHz;
flo = 2395 MHz
[4][5]
-
0.2
-
dB
[6]
12.5
14
-
dBm
[4]
24
25.5
-
dBm
54
60
-
dBc
-
10
12
dB
-
10.5
12.5
dB
-
20
-
dB
ICP1dB
1 dB input compression
point
IP3i
input third-order intercept
point
fi(RF)1 to fi(RF)2 = 1 MHz;
Pi(RF) = 5 dBm per tone
2RF-2LO
second-order spurious
rejection
2 tone inputs at PLO = 0 dBm;
fi(RF) = 2100 MHz; fi(LO) = 1900 MHz;
fi(SPUR) = 2000 MHz
NFSSB
single sideband noise figure fi(RF) = 1400 MHz to 2200 MHz
fi(RF) = 2200 MHz to 2700 MHz
[7]
NFB
noise figure under blocking
conditions
input in-band blocker +8 dBm;
fo = 100 MHz
L(RF)lo
local oscillator RF leakage
at RF input port
-
-
30
dBm
L(IF)lo
local oscillator IF leakage
at IF output port
-
-
30
dBm
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
6 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
Table 7.
Dynamic characteristics …continued
Typical application values: POFF _1 = VIL and POFF _2 = VIL (shutdown disabled); RF and LO ports driven by 50  sources;
unless otherwise specified.
Symbol
Parameter
Conditions
Min[1] Typ[2] Max[1] Unit
isol
isolation
between mixer A and B;
Pi(RF) = 10 dBm; measured at
unwanted IF port
45
55
-
dB
S11_RF
RF input return loss
fi(RF) = 1400 MHz to 2700 MHz
-
12
-
dB
S11_LO
LO input return loss
flo = 1200 MHz to 2500 MHz
-
12
-
dB
S22_IF
IF output return loss
fIF = 100 MHz to 300 MHz
-
14
-
dB
[1]
For all minimum and maximum values the conditions are: Pi(RF) = 5 dBm; Pi(lo) = 0 dBm; fi(RF) = 1900 MHz; flo = 1700 MHz;
fIF = 200 MHz; Tmb = 40 °C to +85 °C; VCC = 4.75 V to 5.25 V. Unless otherwise specified in the conditions.
[2]
For all typical values, the conditions are: Pi(RF) = 5 dBm; Plo = 0 dBm; fi(RF) = 1900 MHz; flo = 1700 MHz; fIF = 200 MHz; Tmb = 25 °C;
VCC = 5 V. Unless otherwise specified in the conditions.
[3]
Operation outside this range is possible but parameters are not guaranteed.
[4]
Class A operation.
[5]
fIF is variable.
[6]
Maximum reliable continuous input power applied to the RF or IF port of this device is 12 dBm from a 50  source.
[7]
NFB can be improved by 1 dB per dB as a function of the Pi(lo).
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
7 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
12. Application information
VCC
VCC
BLM18AG102SN1
VCC
18 pF
1 nF
35
36
34
33
32 31
30
n.c.
15 pF
n.c.
VCC(IF)(A)
IF_GND_A
IF_OUT_N_A
IF_OUT_P_A
150 pF
IF_GND_A
n.c.
VCC(RF)(B)
100 nF
29
28
RF_A 1
RF_GND_A
RF_GND_A
VCC
VCC(LO)
100 nF
18 pF
LO_GND
VCC(LO)
RF_GND_B
TC4-1W-G2+
150
pF
BLM18AG102SN1
27 LO_IN
MIXER A
2
26
BGX7221
3
25
4
24
5
23
6
22
7
21
RF_GND_B
8
RF_B 9
20
MIXER B
19
LO_GND
VCC
S2
POFF_2
n.c.
VCC
S1
POFF_1
VCC(REG)
n.c.
VCC
100 nF
18 pF
n.c.
18
n.c.
17
n.c.
VCC(IF)(B)
14 15 16
IF_GND_B
IF_OUT_N_B
13
IF_OUT_P_B
VCC(RF)(B)
12
IF_GND_B
11
n.c.
10
LO_GND
VCC
18 pF
150 pF
100 nF
1 nF
BLM18AG102SN1
VCC
BLM18AG102SN1
150
pF
TC4-1W-G2+
VCC
15 pF
001aao044
Fig 3.
Application diagram
Figure 3 shows a typical application circuit. Both RF and RF reference pins need to be AC
coupled. The inputs are internally DC biased in order to provide good ESD protection, and
to support large input signals without clamping. The output matching requires a
transformer to cope with the DC at the output.
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
8 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
13. Test information
aaa-002510
9
aaa-002511
9
(3)
Conversion
Gain
(dB)
Conversion
Gain
(dB)
(1)
8
8
(2)
(1)
(2)
(3)
7
7
6
1400
1600
1800
2000
2200
6
1400
2400 2600 2800
RF (MHz)
1600
1800
(1) Tmb = +25 C.
(1) Pi(lo) = 0 dBm.
(2) Tmb = +85 C.
(2) Pi(lo) = +3 dBm.
(3) Tmb = 40 C.
(3) Pi(lo) = 3 dBm.
Fig 4.
Gconv versus fRFand Tmb
Fig 5.
2000
2200
2400 2600 2800
RF (MHz)
Gconv versus fRFand Pi(lo)
aaa-002512
9
Conversion
Gain
(dB)
8
(1)
(2)
(3)
7
6
1400
1600
1800
2000
2200
2400 2600 2800
RF (MHz)
(1) VCC = 5 V.
(2) VCC = 5.25 V.
(3) VCC = 4.75 V.
Fig 6.
Gconv versus fRFand VCC
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
9 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
aaa-002513
28
aaa-002514
28
IIP3
(dBm)
IIP3
(dBm)
27
27
(3)
26
26
(1)
(2)
25
25
(1)
(2)
(3)
24
1400
1600
1800
2000
2200
24
1400
2400 2600 2800
RF (MHz)
1600
1800
(1) Tmb = +25 C.
(1) Pi(lo) = 0 dBm.
(2) Tmb = +85 C.
(2) Pi(lo) = +3 dBm.
(3) Tmb = 40 C.
(3) Pi(lo) = 3 dBm.
Fig 7.
IP3i versus fRFand Tmb
Fig 8.
2000
2200
2400 2600 2800
RF (MHz)
IP3i versus fRFand Pi(lo)
aaa-002515
28
IIP3 vs
RF
27
(1)
(2)
(3)
26
25
24
1400
1600
1800
2000
2200
2400 2600 2800
RF (MHz)
(1) VCC = 5 V.
(2) VCC = 5.25 V.
(3) VCC = 4.75 V.
Fig 9.
IP3i versus fRFand VCC
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
10 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
aaa-002516
13
aaa-002517
13
NF
(dB)
NF
(dB)
12
12
(1)
(2)
(2)
11
(3)
11
(1)
10
10
(3)
9
8
1400
9
1600
1800
2000
2200
8
1400
2400 2600 2800
RF (MHz)
1600
1800
(1) Tmb = +25 C.
(1) Pi(lo) = 0 dBm.
(2) Tmb = +85 C.
(2) Pi(lo) = +3 dBm.
(3) Tmb = 40 C.
(3) Pi(lo) = 3 dBm.
Fig 10. NF versus fRFand Tmb
2000
2200
2400 2600 2800
RF (MHz)
Fig 11. NF versus fRFand Pi(lo)
aaa-002518
13
NF
(dB)
12
(1)
(2)
(3)
11
10
9
8
1400
1600
1800
2000
2200
2400 2600 2800
RF (MHz)
(1) VCC = 5 V.
(2) VCC = 5.25 V.
(3) VCC = 4.75 V.
Fig 12. NF versus fRFand VCC
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
11 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
aaa-002519
16
aaa-002520
16
ICP1dB
(dBm)
ICP1dB
(dBm)
15
15
(1)
(2)
(2)
(3)
(1)
14
14
(3)
13
1400
1600
1800
2000
2200
13
1400
2400 2600 2800
RF (MHz)
1600
1800
(1) Tmb = +25 C.
(1) Pi(lo) = 0 dBm.
(2) Tmb = +85 C.
(2) Pi(lo) = +3 dBm.
(3) Tmb = 40 C.
(3) Pi(lo) = 3 dBm.
Fig 13. ICP1dB versus fRFand Tmb
2000
2200
2400 2600 2800
RF (MHz)
Fig 14. ICP1dB versus fRFand Pi(lo)
aaa-002521
16
ICP1dB
(dBm)
(1)
15
(2)
(3)
14
13
1400
1600
1800
2000
2200
2400 2600 2800
RF (MHz)
(1) VCC = 5 V.
(2) VCC = 5.25 V.
(3) VCC = 4.75 V.
Fig 15. ICP1dB versus fRFand VCC
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
12 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
aaa-002522
80
aaa-002523
80
2RF-2LO
(dBc)
2RF-2LO
(dBc)
70
70
(1)
(2)
(1)
(3)
(2)
(3)
60
50
1400
60
1600
1800
2000
2200
50
1400
2400 2600 2800
RF (MHz)
1600
1800
(1) Tmb = +25 C.
(1) Pi(lo) = 0 dBm.
(2) Tmb = +85 C.
(2) Pi(lo) = +3 dBm.
(3) Tmb = 40 C.
(3) Pi(lo) = 3 dBm.
Fig 16. 2RF-2LO response versus fRFand Tmb
2000
2200
2400 2600 2800
RF (MHz)
Fig 17. 2RF-2LO response versus fRFand Pi(lo)
aaa-002524
80
2RF-2LO
(dBc)
70
60
(1)
(2)
(3)
50
1400
1600
1800
2000
2200
2400 2600 2800
RF (MHz)
(1) VCC = 5 V.
(2) VCC = 5.25 V.
(3) VCC = 4.75 V.
Fig 18. 2RF-2LO response versus fRFand VCC
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
13 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
aaa-002525
70
aaa-002526
70
αisol
(dB)
αisol
(dB)
(1)
(2)
60
60
(3)
(1)
50
40
1400
50
1600
1800
2000
2200
40
1400
2400 2600 2800
RF (MHz)
(1) Tmb = +25 C.
1600
1800
2000
2200
2400 2600 2800
RF (MHz)
(1) Pi(lo) = 0 dBm.
(2) Tmb = +85 C.
(3) Tmb = 40 C.
Fig 19. isol versus fRFand Tmb
Fig 20. isol versus fRFand Pi(lo)
aaa-002527
70
αisol
(dB)
(1)
60
(2)
(3)
50
40
1400
1600
1800
2000
2200
2400 2600 2800
RF (MHz)
(1) VCC = 5 V.
(2) VCC = 5.25 V.
(3) VCC = 4.75 V.
Fig 21. isol versus fRFand VCC
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
14 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
14. Package outline
HVQFN36: plastic thermal enhanced very thin quad flat package; no leads;
36 terminals; body 6 x 6 x 0.85 mm
A
B
D
SOT1092-2
terminal 1
index area
E
A
A1
c
detail X
e1
e
10
18
C
C A B
C
v
w
b
y1 C
y
L
19
9
e
e2
Eh
1
27
terminal 1
index area
36
28
X
Dh
0
2.5
Dimensions
Unit
mm
5 mm
scale
A(1)
A1
b
max 1.00 0.05 0.30
nom 0.85 0.02 0.21
min 0.80 0.00 0.18
c
D(1)
Dh
E(1)
Eh
e
e1
e2
L
v
0.2
6.1
6.0
5.9
4.05
3.90
3.75
6.1
6.0
5.9
4.05
3.90
3.75
0.5
4
4
0.65
0.55
0.45
0.1
w
y
0.05 0.05
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Outline
version
SOT1092-2
References
IEC
JEDEC
JEITA
---
---
sot1092-2_po
European
projection
Issue date
09-02-23
09-02-24
Fig 22. Package outline SOT1092-2 (HVQFN36)
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
15 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
15. Abbreviations
Table 8.
Abbreviations
Acronym
Description
AC
Alternating Current
DC
Direct Current
ESD
ElectroStatic Discharge
FCDM
Field-induced Charged-Device Model
HBM
Human Body Model
IF
Intermediate Frequency
LO
Local Oscillator
MOS
Metal-Oxide Semiconductor
PCB
Printed-Circuit Board
RF
Radio Frequency
16. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BGX7221 v.3
20120808
Product data sheet
-
BGX7221 v.2
Modifications:
•
•
•
Section 13: added
Table 4: updated
Table 7: updated
BGX7221 v.2
20120208
Preliminary data sheet
-
BGX7221 v.1
BGX7221 v.1
20110907
Objective data sheet
-
-
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
16 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
BGX7221
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
17 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
18 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
19. Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Ordering information . . . . . . . . . . . . . . . . . . . . .1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .3
Shutdown control . . . . . . . . . . . . . . . . . . . . . . . .4
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . .5
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Table 6.
Table 7.
Table 8.
Table 9.
Static characteristics . . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16
20. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10.
Fig 11.
Fig 12.
Fig 13.
Fig 14.
Fig 15.
Fig 16.
Fig 17.
Fig 18.
Fig 19.
Fig 20.
Fig 21.
Fig 22.
Functional block diagram . . . . . . . . . . . . . . . . . . . .2
Pinning diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Application diagram . . . . . . . . . . . . . . . . . . . . . . . .8
Gconv versus fRFand Tmb . . . . . . . . . . . . . . . . . . . .9
Gconv versus fRFand Pi(lo) . . . . . . . . . . . . . . . . . . . .9
Gconv versus fRFand VCC . . . . . . . . . . . . . . . . . . . .9
IP3i versus fRFand Tmb . . . . . . . . . . . . . . . . . . . . .10
IP3i versus fRFand Pi(lo) . . . . . . . . . . . . . . . . . . . .10
IP3i versus fRFand VCC . . . . . . . . . . . . . . . . . . . .10
NF versus fRFand Tmb . . . . . . . . . . . . . . . . . . . . . 11
NF versus fRFand Pi(lo) . . . . . . . . . . . . . . . . . . . . . 11
NF versus fRFand VCC . . . . . . . . . . . . . . . . . . . . . 11
ICP1dB versus fRFand Tmb . . . . . . . . . . . . . . . . . .12
ICP1dB versus fRFand Pi(lo) . . . . . . . . . . . . . . . . . .12
ICP1dB versus fRFand VCC . . . . . . . . . . . . . . . . . .12
2RF-2LO response versus fRFand Tmb . . . . . . . .13
2RF-2LO response versus fRFand Pi(lo) . . . . . . . .13
2RF-2LO response versus fRFand VCC . . . . . . . .13
aisol versus fRFand Tmb . . . . . . . . . . . . . . . . . . . . .14
aisol versus fRFand Pi(lo) . . . . . . . . . . . . . . . . . . . .14
aisol versus fRFand VCC . . . . . . . . . . . . . . . . . . . .14
Package outline SOT1092-2 (HVQFN36) . . . . . .15
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
19 of 20
BGX7221
NXP Semiconductors
Dual receiver down mixer
21. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
8
9
10
11
12
13
14
15
16
17
17.1
17.2
17.3
17.4
18
19
20
21
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Power-up control . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal characteristics . . . . . . . . . . . . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Application information. . . . . . . . . . . . . . . . . . . 8
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 8 August 2012
Document identifier: BGX7221