BGX7220 Dual receiver down mixer Rev. 1 — 8 August 2012 Product data sheet 1. General description The BGX7220 device combines a pair of high performance, high linearity down-mixers for use in receivers having a common local oscillator, for instance having main and diversity paths. The device covers the frequency range from 700 MHz to 950 MHz. Each mixer provides an input 1 dB compression point (ICP1dB) above 13 dBm, with an input third-order intercept point (IP3i) of 26 dBm. The small-signal Noise Figure (NF) is below 10 dB whereas under large signal blocking conditions the Noise Figure is typically 20 dB. Isolation between mixers is typically 55 dB. 2. Features and benefits 700 MHz to 950 MHz frequency operating range Conversion gain 8 dB in the 900 MHz band 13 dBm input power at 1 dB input compression point 26 dBm input third-order intercept point 10 dB typical small signal noise figure Integrated active biasing 5 V single supply operation Independent power-down hardware control pins per mixer Low bias current in Power-down mode Matched 50 single-ended RF and LO input impedance ESD protection at all pins 3. Applications Mobile network infrastructure RF and IF applications Communication systems and radars Microwave and broadband Industrial applications 4. Ordering information Table 1. Ordering information Type number Package Name Description Version BGX7220HN HVQFN36 plastic thermal enhanced very thin quad flat package; no leads; 36 terminals; body 6 6 0.85 mm SOT1092-2 BGX7220 NXP Semiconductors Dual receiver down mixer 5. Functional diagram RF_A 1 MIXER A 33 32 LO_IN IF_OUT_P_A IF_OUT_N_A 27 BGX7220 RF_B 14 9 13 MIXER B IF_OUT_N_B IF_OUT_P_B aaa-002507 Fig 1. Functional block diagram Each mixer, A and B employs a transformer to convert the single-ended RF input into a differential signal to drive the passive MOS mixer. The MOS mixer directly drives the IF amplifier. Its open-collector outputs deliver the differential signal into an external transformer load, referenced to the 5 V supply for maximum signal swing. Each mixer can be independently powered-off by a combination of POFF_1 and POFF_2 (see Table 3.) The dual paths allow diversity operation with a common LO path. A transformer at the LO input converts the single-ended RF into a differential signal to drive the LO buffer chain. The plastic package has an under-side heat-sink paddle which serves as a good RF ground. 6. Pinning information 6.1 Pinning Viewing the device from the top (see Figure 2), the 2 RF input ports are at the left, the common LO input at the right, with IF outputs at the top and bottom. Multiple power and ground pins allow for independent supply domains to improve isolation between blocks. BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 2 of 26 BGX7220 NXP Semiconductors 28 n.c. 29 n.c. 30 VCC(IF)(A) 31 IF_GND_A 32 IF_OUT_N_A 33 IF_OUT_P_A 34 IF_GND_A terminal 1 index area 35 n.c. 36 VCC(RF)(A) Dual receiver down mixer RF_A 1 27 LO_IN RF_GND_A 2 26 LO_GND RF_GND_A 3 25 LO_GND VCC(LO) 4 LO_GND 5 VCC(LO) 6 22 POFF_1 RF_GND_B 7 21 VCC(REG) RF_GND_B 8 20 n.c. RF_B 9 19 n.c. 24 POFF_2 n.c. 18 n.c. 17 23 n.c. VCC(IF)(B) 16 IF_GND_B 15 IF_OUT_N_B 14 IF_OUT_P_B 13 IF_GND_B 12 n.c. 11 VCC(RF)(B) 10 BGX7220 aaa-002508 Transparent top view Fig 2. Pinning diagram 6.2 Pin description BGX7220 Product data sheet Table 2. Pin description Symbol Pin Type [1] Description RF_A 1 I receiver mixer single-ended RF input; mixer A RF_GND_A 2 G RF ground; mixer A RF_GND_A 3 G RF ground; mixer A VCC(LO) 4 P LO power supply LO_GND 5 G LO ground VCC(LO) 6 P LO power supply RF_GND_B 7 G RF ground; mixer B RF_GND_B 8 G RF ground; mixer B RF_B 9 I receiver mixer single-ended RF input; mixer B VCC(RF)(B) 10 P RF mixer power supply; mixer B n.c. 11 - not connected; to be tied to ground IF_GND_B 12 G IF ground; mixer B IF_OUT_P_B 13 O symmetrical IF output signal; mixer B IF_OUT_N_B 14 O symmetrical IF output signal; mixer B IF_GND_B 15 G IF amplifier ground; mixer B VCC(IF)(B) 16 P IF amplifier power supply; mixer B n.c. 17 - not connected; to be tied to ground n.c. 18 - not connected; to be tied to ground n.c. 19 - not connected; to be tied to ground n.c. 20 - not connected; to be tied to ground VCC(REG) 21 P internal regulator power supply All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 3 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer Table 2. Pin description …continued Symbol Pin Type [1] Description POFF_1 22 I logic input to power-off mixer n.c. 23 - not connected; to be tied to ground POFF_2 24 I logic input to power-off mixer LO_GND 25 G LO ground LO_GND 26 G LO ground LO_IN 27 I single-ended local oscillator positive input n.c 28 - not connected; to be tied to ground n.c 29 - not connected; to be tied to ground VCC(IF)(A) 30 P IF amplifier power supply; mixer A IF_GND_A 31 G IF amplifier mixer; mixer A IF_OUT_N_A 32 O symmetrical IF negative output; mixer A IF_OUT_P_A 33 O symmetrical IF positive output; mixer A IF_GND_A 34 G IF ground; mixer A n.c. 35 - not connected; to be tied to ground VCC(RF)(A) 36 P RF power supply; mixer A Exposed paddle - G exposed paddle; must be connected to RF and DC ground [1] G: ground; I: input; O: output; P: power. 7. Functional description 7.1 Power-up control Table 3. Mode Shutdown control Description Function POFF_1 POFF_2 Active mixers A and B fully active shutdown disabled 0 0 Idle mixers A and B fully off; current supplied shutdown enabled to LO buffer 1 0 Main mixer A active; mixer B off partial shutdown 0 1 Diversity mixer B active; mixer A off partial shutdown 1 1 Power-up enable pins to allow each mixer to be placed in Power-down mode. These pins also enable the dedicated LO buffers for individual signal paths. A common LO input stage remains active whatever the state of the power off control inputs, in order to maintain good LO port matching. The time required to pass between active and inactive states is less than 10 s. If the pins are left open or tied to ground, both mixers will be in active state. BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 4 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VCC supply voltage Pi(RF) RF input power - 20 dBm Ptot total power dissipation - 1.96 W Tmb mounting base temperature 40 +85 C Tj junction temperature - 150 C Tstg storage temperature VESD electrostatic discharge voltage continuous Min Max Unit 0.3 5.5 V 65 +150 °C EIA/JESD22-A114 (HBM) -2500 +2500 V EIA/JESD22-C101 (FCDM) -650 +650 V 9. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit thermal resistance from junction to mounting base [1] 8 C/W Rth(j-mb) [1] Defined according to the conditions described in the Application Note AN11132. 10. Static characteristics Table 6. Static characteristics Zs = ZL = 50 ; POFF _1 = VIL and POFF _2 = VIL (shutdown disabled). Typical values at VCC = 5 V. Tmb = 25 C, unless otherwise specified. Symbol Parameter Conditions VCC supply voltage ICq quiescent collector current Min Typ Max Unit 4.75 5.0 5.25 V [1] - 60 - mA LOW-level input voltage [1] 0 - 0.5 V HIGH-level input voltage [1] 2 - 5 V LOW-level input current [1] - 1 - A HIGH-level input current [1] - 50 - A IF output; per package pin Shutdown digital input voltage VIL VIH All digital inputs current IIL IIH [1] VCC = 4.75 V to 5.25 V, Tmb = 40 C to +85 C. BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 5 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 11. Dynamic characteristics Table 7. Dynamic characteristics Typical application values: POFF _1 = VIL and POFF _2 = VIL (shutdown disabled); RF and LO ports driven by 50 sources; Pi(RF) = 5 dBm; fi(RF) = 850 MHz; Tmb = 40 C to +85 C; VCC = 4.75 V to 5.25 V. Typical values at VCC = 5 V; Tmb = 25 C; Pi(RF) = 5 dBm; Pi(lo) = 0 dBm; fi(RF) = 850 MHz; fIF = 150 MHz. All parameters are guaranteed by design and characterization, unless otherwise specified. Symbol Parameter Conditions ICC supply current both mixers in active mode Min[1] Typ[2] Max[1] Unit flo = 500 MHz - 285 330 mA flo = 850 MHz - 300 345 mA flo = 1150 MHz - 310 355 mA RF input frequency [3] 700 - 950 MHz flo local oscillator frequency signal from frequency generator; fIF = 50 MHz to 200 MHz [3] 500 - 1150 MHz Pi(lo) local oscillator input power signal from frequency generator [3] 3 - +3 dBm Gconv conversion gain at Tmb = 25 C; fi(RF) = 700 MHz to 950 MHz 7.5 8.2 9 dB G/T gain variation with temperature Tmb = 40 C to +85 C - 0.007 - dB/C G gain deviation fi(RF) = 700 MHz to 715 MHz; flo = 560 MHz or flo = 855 MHz [4][7] - 0.15 - dB fi(RF) = 750 MHz to 760 MHz; flo = 605 MHz or flo = 905 MHz [4][7] - 0.4 - dB fi(RF) = 780 MHz to 795 MHz; flo = 640 MHz or flo = 940 MHz [4][7] - 0.15 - dB fi(RF) = 815 MHz to 860 MHz; flo = 690 MHz or flo = 985 MHz [4][7] - 0.3 - dB fi(RF) = 880 MHz to 915 MHz; flo = 750 MHz or flo = 1045 MHz [4][7] - 0.15 - dB [6] 10.5 13 - dBm [4] 24.5 26 - dBm 57 63 - dBc - 9.5 12 dB - 20 - dB fi(RF) ICP1dB 1 dB input compression point IP3i input third-order intercept point fi(RF)1 to fi(RF)2 = 1 MHz; Pi(RF) = 5 dBm per tone 2RF-2LO second-order spurious rejection 2 tone inputs at Pi(RF) = 10 dBm; fi(RF) = 850 MHz; fi(LO) = 950 MHz; fi(SPUR) = 900 MHz NFSSB single sideband noise figure [4] [7] NFB noise figure under blocking conditions input in-band blocker +8 dBm; fo = 100 MHz L(RF)lo local oscillator RF leakage at RF input port; LO input power = 0 dBm - - 35 dBm L(IF)lo local oscillator IF leakage at IF output port; LO input power = 0 dBm - - 35 dBm isol isolation between mixer A and B; Pi(RF) = 10 dBm; measured at unwanted IF port 45 55 - dB BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 6 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer Table 7. Dynamic characteristics …continued Typical application values: POFF _1 = VIL and POFF _2 = VIL (shutdown disabled); RF and LO ports driven by 50 sources; Pi(RF) = 5 dBm; fi(RF) = 850 MHz; Tmb = 40 C to +85 C; VCC = 4.75 V to 5.25 V. Typical values at VCC = 5 V; Tmb = 25 C; Pi(RF) = 5 dBm; Pi(lo) = 0 dBm; fi(RF) = 850 MHz; fIF = 150 MHz. All parameters are guaranteed by design and characterization, unless otherwise specified. Symbol Parameter Conditions Min[1] Typ[2] Max[1] Unit S11_RF RF input return loss fi(RF) = 700 MHz to 950 MHz - 12 - dB S11_LO LO input return loss flo = 500 MHz to 1150 MHz - 12 - dB S22_IF IF output return loss fIF = 50 MHz to 200 MHz - 14 - dB [1] For all minimum and maximum values the conditions are: Pi(RF) = 5 dBm; Pi(lo) = 0 dBm; fi(RF) = 850 MHz; fIF = 150 MHz; Tmb = 40 °C to +85 °C; VCC = 4.75 V to 5.25 V. Unless otherwise specified in the conditions. [2] For all typical values, the conditions are: Pi(RF) = 5 dBm; Plo = 0 dBm; fi(RF) = 850 MHz; fIF = 150 MHz; Tmb = 25 °C; VCC = 5 V. Unless otherwise specified in the conditions. [3] Operation outside this range is possible but parameters are not guaranteed. [4] Class A operation. [5] fIF is variable. [6] Maximum reliable continuous input power applied to the RF or IF port of this device is 12 dBm from a 50 source. [7] NFB can be improved by 1 dB per dB as a function of the Pi(lo). BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 7 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 12. Application information VCC VCC BLM18AG102SN1 VCC 47 pF 1 nF 35 36 34 33 15 nF 32 31 30 n.c. 18 pF n.c. VCC(IF)(A) IF_GND_A IF_OUT_N_A IF_OUT_P_A 150 pF IF_GND_A n.c. VCC(RF)(A) 100 nF 29 28 RF_A 1 RF_GND_A RF_GND_A VCC VCC(LO) 100 nF 47 pF LO_GND VCC(LO) RF_GND_B TC4-1W-G2+ 150 pF BLM18AG102SN1 27 LO_IN MIXER A 2 26 BGX7220 3 25 4 24 5 23 6 22 7 21 RF_GND_B 8 RF_B 9 20 MIXER B 19 LO_GND VCC S2 POFF_2 n.c. VCC S1 POFF_1 VCC(REG) n.c. VCC 100 nF 47 pF n.c. 18 n.c. 17 n.c. VCC(IF)(B) 14 15 16 IF_GND_B IF_OUT_N_B 13 IF_OUT_P_B VCC(RF)(B) 12 IF_GND_B 11 n.c. 10 LO_GND VCC 47 pF 150 pF 100 nF 1 nF BLM18AG102SN1 VCC BLM18AG102SN1 VCC 150 pF TC4-1W-G2+ 15 nF 18 pF aaa-002509 Fig 3. Application diagram Figure 3 shows a typical wideband application circuit. Both RF and RF reference pins need to be AC coupled. The inputs are internally DC biased in order to provide good ESD protection, and to support large input signals without clamping. The output matching requires a transformer to cope with the DC at the output. BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 8 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 13. Test information Parameters for the following drawings: VCC = 5 V; Tmb = 25 C; Pi(RF) = 5 dBm; Pi(lo) = 0 dBm; fIF = 150 MHz; unless otherwise specified. aaa-004183 10 Gconv (dB) (1) (2) (3) 9 8 7 6 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 4. Gconv versus fRF (high side LO) and Tmb aaa-004184 10 Gconv (dB) aaa-004185 10 Gconv (dB) 9 (1) (2) (3) 9 8 8 (1) (2) (3) 7 7 6 700 800 900 RF (MHz) 6 700 1000 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 5. Gconv versus fRF (high side LO) and Pi(lo) BGX7220 Product data sheet Fig 6. 800 900 RF (MHz) 1000 Gconv versus fRF (high side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 9 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004186 29 IP3I (dBm) (1) (2) (3) 27 25 23 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 7. IP3i versus fRF (high side LO) and Tmb aaa-004187 29 IP3I (dBm) aaa-004188 29 IP3I (dBm) (1) (2) (3) 27 (1) (2) (3) 27 25 25 23 700 800 900 RF (MHz) 23 700 1000 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 8. IP3i versus fRF (high side LO) and Pi(lo) BGX7220 Product data sheet Fig 9. 800 900 RF (MHz) 1000 IP3i versus fRF (high side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 10 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004189 14 NF (dB) 12 (3) (1) 10 (2) 8 6 700 800 900 RF (MHz) 1000 (1) Tmb= +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 10. NF versus fRF (high side LO) and Tmb aaa-004190 14 NF (dB) NF (dB) (1) (2) (3) 12 12 10 10 8 8 6 700 800 900 RF (MHz) 1000 6 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 11. NF versus fRF (high side LO) and Pi(lo) BGX7220 Product data sheet aaa-004191 14 (1) (2) (3) 800 900 RF (MHz) 1000 Fig 12. NF versus fRF (high side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 11 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004193 15 lCP1dB (dBm) (3) 14 (1) 13 (2) 12 11 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 13. ICP1dB versus fRF (high side LO) and Tmb aaa-004194 15 lCP1dB (dBm) lCP1dB (dBm) 14 13 14 (1) (2) (3) 12 800 900 RF (MHz) 1000 11 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 14. ICP1dB versus fRF (high side LO) and Pi(lo) BGX7220 Product data sheet (1) (2) (3) 13 12 11 700 aaa-004195 15 800 900 RF (MHz) 1000 Fig 15. ICP1dB versus fRF (high side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 12 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004196 85 2RF-2LO (dBc) (1) (2) (3) 75 65 55 45 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 16. 2RF-2LO response versus fRF (high side LO) and Tmb aaa-004197 85 2RF-2LO (dBc) 2RF-2LO (dBc) 75 75 (1) (2) (3) 65 65 55 55 45 700 800 900 RF (MHz) 1000 45 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 17. 2RF-2LO response versus fRF (high side LO) and Pi(lo) BGX7220 Product data sheet aaa-004198 85 (1) (2) (3) 800 900 RF (MHz) 1000 Fig 18. 2RF-2LO response versus fRF (high side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 13 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004199 70 αisol (dB) (1) (2) (3) 60 50 40 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 19. isol versus fRF (high side LO) and Tmb aaa-004200 70 αisol (dB) αisol (dB) (1) (2) (3) 60 50 800 900 RF (MHz) 1000 40 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 20. isol versus fRF (high side LO) and Pi(lo) BGX7220 Product data sheet (1) (2) (3) 60 50 40 700 aaa-004201 70 800 900 RF (MHz) 1000 Fig 21. isol versus fRF (high side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 14 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004202 10 Gconv (dB) 9 (2) (1) (3) 8 7 6 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 22. Gconv versus fRF (low side LO) and Tmb aaa-004203 10 Gconv (dB) Gconv (dB) (1) (2) (3) 9 8 7 7 800 900 RF (MHz) 1000 6 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 23. Gconv versus fRF (low side LO) and Pi(lo) BGX7220 Product data sheet (1) (2) (3) 9 8 6 700 aaa-004204 10 800 900 RF (MHz) 1000 Fig 24. Gconv versus fRF (low side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 15 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004205 29 IP3I (dBm) (1) (2) (3) 27 25 23 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 25. IP3i versus fRF (low side LO) and Tmb aaa-004206 29 IP3I (dBm) IP3I (dBm) (1) (2) (3) 27 25 800 900 RF (MHz) 1000 23 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 26. IP3i versus fRF (low side LO) and Pi(lo) BGX7220 Product data sheet (1) (2) (3) 27 25 23 700 aaa-004207 29 800 900 RF (MHz) 1000 Fig 27. IP3i versus fRF (low side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 16 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004208 14 NF (dB) 12 (3) (1) 10 (2) 8 6 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 28. NF versus fRF (low side LO) and Tmb aaa-004209 14 NF (dB) aaa-004210 14 NF (dB) 12 12 (1) (2) (3) (1) (2) (3) 10 10 8 8 6 700 800 900 RF (MHz) 1000 6 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 29. NF versus fRF (low side LO) and Pi(lo) BGX7220 Product data sheet 800 900 RF (MHz) 1000 Fig 30. NF versus fRF (low side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 17 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004211 15 ICP1dB (dBm) 14 (3) 13 (1) (2) 12 11 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 31. ICP1dB versus fRF (low side LO) and Tmb aaa-004212 15 ICP1dB (dBm) aaa-004213 15 ICP1dB (dBm) 14 14 (1) (2) (3) (1) (2) (3) 13 13 12 12 11 700 800 900 RF (MHz) 1000 11 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 32. ICP1dB versus fRF (low side LO) and Pi(lo) BGX7220 Product data sheet 800 900 RF (MHz) 1000 Fig 33. ICP1dB versus fRF (low side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 18 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004214 85 2RF-2LO (dBc) (1) (2) (3) 75 65 55 45 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 34. 2RF-2LO response versus fRF (low side LO) and Tmb aaa-004215 85 2RF-2LO (dBc) 2RF-2LO (dBc) (1) (2) (3) 75 75 65 65 55 55 45 700 800 900 RF (MHz) 1000 45 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 35. 2RF-2LO response versus fRF (low side LO) and Pi(lo) BGX7220 Product data sheet aaa-004216 85 (1) (2) (3) 800 900 RF (MHz) 1000 Fig 36. 2RF-2LO response versus fRF (low side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 19 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer aaa-004217 70 αisol (dB) 60 (1) (2) (3) 50 40 700 800 900 RF (MHz) 1000 (1) Tmb = +25 C. (2) Tmb = 40 C. (3) Tmb = +85 C. Fig 37. isol versus fRF (low side LO) and Tmb aaa-004218 70 αisol (dB) 60 αisol (dB) 60 (1) (2) (3) 50 40 700 aaa-004219 70 (1) (2) (3) 50 800 900 RF (MHz) 1000 40 700 (1) Pi(lo) = 0 dBm. (1) VCC = 5 V. (2) Pi(lo) = 3 dBm. (2) VCC = 4.75 V. (3) Pi(lo) = +3 dBm. (3) VCC = 5.25 V. Fig 38. isol versus fRF (low side LO) and Pi(lo) BGX7220 Product data sheet 800 900 RF (MHz) 1000 Fig 39. isol versus fRF (low side LO) and VCC All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 20 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 14. Package outline HVQFN36: plastic thermal enhanced very thin quad flat package; no leads; 36 terminals; body 6 x 6 x 0.85 mm A B D SOT1092-2 terminal 1 index area E A A1 c detail X e1 e 10 18 C C A B C v w b y1 C y L 19 9 e e2 Eh 1 27 terminal 1 index area 36 28 X Dh 0 2.5 Dimensions Unit mm 5 mm scale A(1) A1 b max 1.00 0.05 0.30 nom 0.85 0.02 0.21 min 0.80 0.00 0.18 c D(1) Dh E(1) Eh e e1 e2 L v 0.2 6.1 6.0 5.9 4.05 3.90 3.75 6.1 6.0 5.9 4.05 3.90 3.75 0.5 4 4 0.65 0.55 0.45 0.1 w y 0.05 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline version SOT1092-2 References IEC JEDEC JEITA --- --- sot1092-2_po European projection Issue date 09-02-23 09-02-24 Fig 40. Package outline SOT1092-2 (HVQFN36) BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 21 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 15. Abbreviations Table 8. Abbreviations Acronym Description AC Alternating Current DC Direct Current ESD ElectroStatic Discharge FCDM Field-induced Charged-Device Model HBM Human Body Model IF Intermediate Frequency LO Local Oscillator MOS Metal-Oxide Semiconductor PCB Printed-Circuit Board RF Radio Frequency 16. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes BGX7220 v.1 20120808 Product data sheet - - BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 22 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 17.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. BGX7220 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 23 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 24 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 19. Tables Table 1. Table 2. Table 3. Table 4. Table 5. Ordering information . . . . . . . . . . . . . . . . . . . . .1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .3 Shutdown control . . . . . . . . . . . . . . . . . . . . . . . .4 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . .5 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Table 6. Table 7. Table 8. Table 9. Static characteristics . . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 20. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Fig 26. Fig 27. Fig 28. Fig 29. Fig 30. Fig 31. Fig 32. Fig 33. Fig 34. Fig 35. Fig 36. Fig 37. Fig 38. Fig 39. Fig 40. Functional block diagram . . . . . . . . . . . . . . . . . . . .2 Pinning diagram . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Application diagram . . . . . . . . . . . . . . . . . . . . . . . .8 Gconv versus fRF (high side LO) and Tmb . . . . . . . .9 Gconv versus fRF (high side LO) and Pi(lo) . . . . . . . .9 Gconv versus fRF (high side LO) and VCC . . . . . . . .9 IP3i versus fRF (high side LO) and Tmb . . . . . . . .10 IP3i versus fRF (high side LO) and Pi(lo) . . . . . . . .10 IP3i versus fRF (high side LO) and VCC . . . . . . . .10 NF versus fRF (high side LO) and Tmb . . . . . . . . . 11 NF versus fRF (high side LO) and Pi(lo) . . . . . . . . 11 NF versus fRF (high side LO) and VCC . . . . . . . . . 11 ICP1dB versus fRF (high side LO) and Tmb . . . . . .12 ICP1dB versus fRF (high side LO) and Pi(lo) . . . . .12 ICP1dB versus fRF (high side LO) and VCC . . . . . .12 2RF-2LO response versus fRF (high side LO) and Tmb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 2RF-2LO response versus fRF (high side LO) and Pi(lo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 2RF-2LO response versus fRF (high side LO) and VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 aisol versus fRF (high side LO) and Tmb . . . . . . . .14 aisol versus fRF (high side LO) and Pi(lo) . . . . . . . .14 aisol versus fRF (high side LO) and VCC . . . . . . . .14 Gconv versus fRF (low side LO) and Tmb . . . . . . . .15 Gconv versus fRF (low side LO) and Pi(lo) . . . . . . .15 Gconv versus fRF (low side LO) and VCC . . . . . . . .15 IP3i versus fRF (low side LO) and Tmb . . . . . . . . .16 IP3i versus fRF (low side LO) and Pi(lo) . . . . . . . . .16 IP3i versus fRF (low side LO) and VCC . . . . . . . . .16 NF versus fRF (low side LO) and Tmb . . . . . . . . . .17 NF versus fRF (low side LO) and Pi(lo) . . . . . . . . .17 NF versus fRF (low side LO) and VCC . . . . . . . . .17 ICP1dB versus fRF (low side LO) and Tmb . . . . . . .18 ICP1dB versus fRF (low side LO) and Pi(lo) . . . . . .18 ICP1dB versus fRF (low side LO) and VCC . . . . . .18 2RF-2LO response versus fRF (low side LO) and Tmb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 2RF-2LO response versus fRF (low side LO) and Pi(lo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 2RF-2LO response versus fRF (low side LO) and VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 aisol versus fRF (low side LO) and Tmb . . . . . . . . .20 aisol versus fRF (low side LO) and Pi(lo). . . . . . . . .20 aisol versus fRF (low side LO) and VCC . . . . . . . . .20 Package outline SOT1092-2 (HVQFN36) . . . . . .21 BGX7220 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1. — 8 August 2012 © NXP B.V. 2012. All rights reserved. 25 of 26 BGX7220 NXP Semiconductors Dual receiver down mixer 21. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 17.1 17.2 17.3 17.4 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Power-up control . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Thermal characteristics . . . . . . . . . . . . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Application information. . . . . . . . . . . . . . . . . . . 8 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 21 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Contact information. . . . . . . . . . . . . . . . . . . . . 24 Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 8 August 2012 Document identifier: BGX7220