Freescale Semiconductor Technical Data Document Number: A2I20D040N Rev. 0, 4/2016 RF LDMOS Wideband Integrated Power Amplifiers The A2I20D040N wideband integrated circuit is designed with on--chip matching that makes it usable from 1400 to 2200 MHz. This multi--stage structure is rated for 20 to 32 V operation and covers all typical cellular base station modulation formats. 1800–2200 MHz Typical Single--Carrier W--CDMA Characterization Performance: VDD = 28 Vdc, IDQ1(A+B) = 56 mA, IDQ2(A+B) = 220 mA, Pout = 5 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. (1) Frequency Gps (dB) PAE (%) ACPR (dBc) 1800 MHz 32.7 21.8 –43.6 1900 MHz 32.6 20.7 –44.5 2000 MHz 32.8 20.1 –44.8 2100 MHz 32.9 19.9 –44.9 2200 MHz 33.3 19.7 –44.5 1. All data measured in fixture with device soldered to heatsink. Features A2I20D040NR1 A2I20D040GNR1 1400–2200 MHz, 5 W AVG., 28 V AIRFAST RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIERS TO--270WB--17 PLASTIC A2I20D040NR1 TO--270WBG--17 PLASTIC A2I20D040GNR1 Extremely Wide RF Bandwidth RF Decoupled Drain Pins Reduce Overall Board Space On--Chip Matching (50 Ohm Input, DC Blocked) Integrated Quiescent Current Temperature Compensation with Enable/Disable Function (2) 2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987. Freescale Semiconductor, Inc., 2016. All rights reserved. RF Device Data Freescale Semiconductor, Inc. A2I20D040NR1 A2I20D040GNR1 1 VDS1A VBWA RFinA VDS1A VGS2A VGS1A RFinA N.C. GND GND N.C. RFinB VGS1B VGS2B VDS1B RFout1/VDS2A VGS1A Quiescent Current Temperature Compensation (1) VGS2A VGS1B Quiescent Current Temperature Compensation (1) VGS2B RFinB RFout2/VDS2B VDS1B VBWB 17 1 2 3 4 5 6 7 8 9 10 11 12 16 15 14 13 VBWA(2) RFout1/VDS2A GND RFout2/VDS2B VBWB(2) (Top View) Note: Exposed backside of the package is the source terminal for the transistors. Figure 1. Functional Block Diagram Figure 2. Pin Connections 2. Device can operate with VDD current supplied through pin 13 and pin 17. 1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987. Table 1. Maximum Ratings Symbol Value Unit Drain--Source Voltage Rating VDSS –0.5, +65 Vdc Gate--Source Voltage VGS –0.5, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg –65 to +150 C TC –40 to +150 C Case Operating Temperature Range Operating Junction Temperature Range (3,4) Input Power TJ –40 to +225 C Pin 18 dBm Symbol Value (4,5) Unit Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 78C, 5 W, 1900 MHz Stage 1, 28 Vdc, IDQ1(A+B) = 56 mA Stage 2, 28 Vdc, IDQ2(A+B) = 220 mA RJC C/W 4.8 1.3 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22--A114) 1B Machine Model (per EIA/JESD22--A115) A Charge Device Model (per JESD22--C101) II Table 4. Moisture Sensitivity Level Test Methodology Per JESD22--A113, IPC/JEDEC J--STD--020 Rating Package Peak Temperature Unit 3 260 C 3. Continuous use at maximum temperature will affect MTTF. 4. MTTF calculator available at http://www.nxp.com/RF/calculators. 5. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955. A2I20D040NR1 A2I20D040GNR1 2 RF Device Data Freescale Semiconductor, Inc. Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 3.5 Adc) VGS(th) 0.8 1.2 1.6 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ1(A+B) = 56 mAdc) VGS(Q) — 1.9 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ1(A+B) = 56 mAdc, Measured in Functional Test) VGG(Q) 6.7 7.4 8.2 Vdc Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 22 Adc) VGS(th) 0.8 1.2 1.6 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ2(A+B) = 220 mAdc) VGS(Q) — 1.8 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ2(A+B) = 220 mAdc, Measured in Functional Test) VGG(Q) 4.1 4.8 5.6 Vdc Drain--Source On--Voltage (1) (VGS = 10 Vdc, ID = 220 mAdc) VDS(on) 0.1 0.3 1.5 Vdc Characteristic Stage 1 -- Off Characteristics (1) Stage 1 -- On Characteristics Stage 2 -- Off Characteristics (1) Stage 2 -- On Characteristics 1. Each side of device measured separately. (continued) A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 3 Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit (1,2) Functional Tests (In Freescale Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 56 mA, IDQ2(A+B) = 220 mA, Pout = 5 W Avg., f = 1900 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset. Power Gain Gps 31.5 32.1 35.0 dB Power Added Efficiency PAE 19.0 19.9 — % Adjacent Channel Power Ratio ACPR — –44.7 –43.5 dBc Pout @ 3 dB Compression Point, CW P3dB 39.8 44.1 — W Load Mismatch (In Freescale Production Test Fixture, 50 ohm system) IDQ1(A+B) = 56 mA, IDQ2(A+B) = 220 mA, f = 2200 MHz VSWR 10:1 at 32 Vdc, 46.8 W CW Output Power (3 dB Input Overdrive from 40.7 W CW Rated Power) No Device Degradation Typical Performance (3) (In Freescale Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 56 mA, IDQ2(A+B) = 220 mA, 1800–2200 MHz Bandwidth Pout @ 1 dB Compression Point, CW P1dB — 36.3 — W (4) P3dB — 44.6 — W AM/PM (Maximum value measured at the P3dB compression point across the 1800–2200 MHz frequency range.) — –11.8 — VBWres — 185 — MHz — — 2.17 1.70 — — Pout @ 3 dB Compression Point VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) Quiescent Current Accuracy over Temperature (5) with 2 k Gate Feed Resistors (--30 to 85C) Stage 1 with 2 k Gate Feed Resistors (--30 to 85C) Stage 2 IQT Gain Flatness in 400 MHz Bandwidth @ Pout = 5 W Avg. GF — 0.9 — dB Gain Variation over Temperature (–30C to +85C) G — 0.038 — dB/C P1dB — 0.007 — dB/C Output Power Variation over Temperature (–30C to +85C) % Table 6. Ordering Information Device A2I20D040NR1 A2I20D040GNR1 Tape and Reel Information R1 Suffix = 500 Units, 44 mm Tape Width, 13--Reel Package TO--270WB--17 TO--270WBG--17 1. Part internally input and output matched. 2. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull wing (GN) parts. 3. All data measured in fixture with device soldered to heatsink. 4. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF. 5. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987. A2I20D040NR1 A2I20D040GNR1 4 RF Device Data Freescale Semiconductor, Inc. VDD1A VGG2A VDD2A VGG1A C15 R1 R5 C5 C7 A2I20D040N Rev. 4 C13 C11 C9 C1 C17 C3 Z1 R2 Q1 Z2 C4 R4 C18 C16 R3 C8 C6 C2 C10 C12 C14 VGG1B VDD2B VGG2B D77506 R6 VDD1B Note: All data measured in fixture with device soldered to heatsink. Production fixture does not include device soldered to heatsink. Figure 3. A2I20D040NR1 Test Circuit Component Layout Table 7. A2I20D040NR1 Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2 8.2 pF Chip Capacitors ATC600F8R2BT250XT ATC C3, C4 0.3 pF Chip Capacitors ATC600F0R3BT250XT ATC C5, C6, C7, C8, C9, C10, C11, C12, C13, C14 10 F Chip Capacitors GRM31CR61H106KA12L Murata C15, C16, C17, C18 4.7 F Chip Capacitors GRM31CR71H475KA12L Murata Q1 RF LDMOS Power Amplifier A2I20D040NR1 NXP R1, R2, R3, R4 4.7 k, 1/4 W Chip Resistors CRCW12064K70FKEA Vishay R5, R6 50 , 10 W Chip Resistors 060120A25Z50--2 Anaren Z1, Z2 1700–2300 MHz, 90, 3 dB Hybrid Couplers X3C19P1-03S Anaren PCB Rogers RO4350B, 0.020, r = 3.66 D77506 MTL A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 5 TYPICAL CHARACTERISTICS — 1800–2200 MHz 24 22 33 20 D 32.8 18 Gps 32.6 PARC 32.4 32.2 –41 –0.6 –42 –0.8 –43 32 –44 ACPR 31.8 Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 31.6 1775 1875 1925 1975 2025 2075 f, FREQUENCY (MHz) 1825 –45 –46 2175 2225 2125 –1 –1.2 –1.4 PARC (dB) 33.2 D, DRAIN EFFICIENCY (%) 33.4 Gps, POWER GAIN (dB) 26 VDD = 28 Vdc, IDQ1(A+B) = 56 mA, IDQ2 (A+B) = 220 mA Pout = 5 W (Avg.), Single--Carrier W--CDMA 3.84 MHz Channel Bandwidth ACPR (dBc) 33.6 –1.6 IMD, INTERMODULATION DISTORTION (dBc) Figure 4. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 5 Watts Avg. –10 VDD = 28 Vdc, IDQ1(A+B) = 56 mA, IDQ2(A+B) = 220 mA Pout = 5 W (Avg.), Pout = 24 W PEP, Two--Tone Measurements –20 (f1 + f2)/2 = Center Frequency of 2000 MHz IM3--L –30 IM3--U IM7--L –40 IM5--L –50 –60 IM7--U IM5--U 5 10 300 100 TWO--TONE SPACING (MHz) Figure 5. Intermodulation Distortion Products versus Two--Tone Spacing 33 32.5 32 31.5 VDD = 28 Vdc, IDQ1(A+B) = 56 mA IDQ2(A+B) = 220 mA, f = 2000 MHz –1 D –3 dB = 10.06 W –2 –1 dB = 4.99 W –2 dB = 7.26 W –3 6 –25 25 PARC Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 4 35 30 Gps –6 –20 ACPR –4 –5 40 8 10 12 Pout, OUTPUT POWER (WATTS) 14 20 –30 –35 ACPR (dBc) 33.5 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) 34 0 D DRAIN EFFICIENCY (%) 34.5 –40 15 –45 10 16 –50 Figure 6. Output Peak--to--Average Ratio Compression (PARC) versus Output Power A2I20D040NR1 A2I20D040GNR1 6 RF Device Data Freescale Semiconductor, Inc. TYPICAL CHARACTERISTICS — 1800–2200 MHz Gps, POWER GAIN (dB) 34 2200 MHz Gps 33 2200 MHz 2000 MHz 32 1800 MHz 31 1800 MHz 2000 MHz 1 50 –10 40 20 10 2200 MHz 1800 MHz 0 30 2000 MHz ACPR 30 29 D 60 30 10 Pout, OUTPUT POWER (WATTS) AVG. 0 –20 –30 –40 ACPR (dBc) VDD = 28 Vdc, IDQ1(A+B) = 56 mA, IDQ2(A+B) = 220 mA Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability D, DRAIN EFFICIENCY (%) 35 –50 –60 Figure 7. Single--Carrier W--CDMA Power Gain, Drain Efficiency and ACPR versus Output Power 36 34 Gain GAIN (dB) 32 30 28 VDD = 28 Vdc Pin = 0 dBm IDQ1(A+B) = 56 mA IDQ2(A+B) = 220 mA 26 24 22 1200 1400 1600 1800 2000 2200 f, FREQUENCY (MHz) 2400 2600 2800 Figure 8. Broadband Frequency Response A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 7 Table 8. Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, IDQ = 111 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB Zload () f (MHz) Zsource () Zin () 1805 91.7 + j30.8 84.3 – j41.0 1840 88.8 + j41.4 80.2 – j51.7 1880 74.4 + j58.5 66.7 – j57.5 (1) Gain (dB) (dBm) (W) D (%) AM/PM () 9.16 – j6.03 33.3 43.7 23 54.1 –1 8.74 – j5.80 33.6 43.7 23 55.5 –1 8.39 – j5.72 33.7 43.8 24 55.9 –1 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 1805 91.7 + j30.8 82.8 – j44.5 9.20 – j6.95 31.2 44.5 28 54.9 –4 1840 88.8 + j41.4 77.1 – j54.3 8.41 – j7.17 31.3 44.5 28 54.4 –4 1880 74.4 + j58.5 63.5 – j58.4 8.39 – j7.13 31.4 44.5 28 54.5 –3 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Table 9. Load Pull Performance — Maximum Drain Efficiency Tuning VDD = 28 Vdc, IDQ = 111 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () 1805 91.7 + j30.8 91.9 – j41.3 17.6 + j1.68 34.5 41.9 16 64.1 –4 1840 88.8 + j41.4 87.0 – j54.3 15.5 + j2.09 34.7 41.8 15 64.5 –5 1880 74.4 + j58.5 71.3 – j60.7 12.0 + j1.09 34.7 42.3 17 63.8 –4 Gain (dB) (dBm) (W) D (%) AM/PM () Max Drain Efficiency P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 1805 91.7 + j30.8 89.4 – j43.8 16.5 – j0.05 32.4 43.1 20 64.4 –8 1840 88.8 + j41.4 84.7 – j55.7 14.7 + j1.27 32.6 42.8 19 64.2 –9 1880 74.4 + j58.5 70.5 – j62.2 12.0 + j2.85 32.8 42.5 18 63.2 –10 (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I20D040NR1 A2I20D040GNR1 8 RF Device Data Freescale Semiconductor, Inc. P1dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz 10 10 60 39.5 40 E 0 41 –5 P 42 –10 42 40.5 41.5 43.5 –15 52 56 54 5 IMAGINARY () IMAGINARY () 5 58 43 42.5 5 10 20 15 62 –5 P 60 58 –10 42.5 25 –15 30 E 64 0 56 5 54 20 15 10 50 52 48 25 30 REAL () REAL () Figure 9. P1dB Load Pull Output Power Contours (dBm) Figure 10. P1dB Load Pull Efficiency Contours (%) 10 10 35 5 E IMAGINARY () IMAGINARY () 5 0 34.5 –5 P 34 –10 –15 5 32 33.5 33 10 20 15 –12 –10 –4 –8 –6 –4 0 –5 E P –2 –10 32.5 31 –14 25 30 –15 5 10 20 15 25 REAL () REAL () Figure 11. P1dB Load Pull Gain Contours (dB) Figure 12. P1dB Load Pull AM/PM Contours () NOTE: P = Maximum Output Power E = Maximum Drain Efficiency 30 Gain Drain Efficiency Linearity Output Power A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 9 P3dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz 10 10 40.5 E 0 5 41 41.5 IMAGINARY () IMAGINARY () 5 42 –5 42.5 44.5 P 62 60 –5 58 P 43 56 –10 –10 –15 E 64 0 44 48 43.5 10 5 15 20 25 30 –15 50 10 5 54 52 15 20 25 30 REAL () REAL () Figure 13. P3dB Load Pull Output Power Contours (dBm) Figure 14. P3dB Load Pull Efficiency Contours (%) 10 10 33 E 0 32.5 –5 32 –10 –15 29 5 –12 –10 0 E –8 –6 –5 –4 P P 30 –16 –14 5 IMAGINARY () IMAGINARY () 5 30.5 31 –10 31.5 10 15 20 30 25 –15 –2 5 10 15 20 25 REAL () REAL () Figure 15. P3dB Load Pull Gain Contours (dB) Figure 16. P3dB Load Pull AM/PM Contours () NOTE: P = Maximum Output Power E = Maximum Drain Efficiency 30 Gain Drain Efficiency Linearity Output Power A2I20D040NR1 A2I20D040GNR1 10 RF Device Data Freescale Semiconductor, Inc. Table 10. Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, IDQ = 111 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB f (MHz) Zsource () Zin () Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 2110 33.8 + j58.4 31.3 – j52.8 8.14 – j5.05 35.1 43.9 24 53.3 –4 2140 36.0 + j56.4 32.9 – j52.4 8.52 – j4.88 35.8 43.9 24 55.6 –6 2170 38.5 + j56.7 38.3 – j50.8 9.19 – j5.96 35.9 43.8 24 56.5 –5 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 2110 33.8 + j58.4 29.1 – j50.2 8.66 – j5.52 33.0 44.6 29 53.8 –11 2140 36.0 + j56.4 31.4 – j49.2 9.28 – j5.61 33.7 44.6 29 54.8 –14 2170 38.5 + j56.7 37.6 – j46.7 9.78 – j6.87 33.8 44.5 28 54.9 –15 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Table 11. Load Pull Performance — Maximum Drain Efficiency Tuning VDD = 28 Vdc, IDQ = 111 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () 2110 33.8 + j58.4 31.4 – j56.8 9.04 + j1.83 36.4 42.4 17 63.4 –6 2140 36.0 + j56.4 32.3 – j56.1 9.22 + j1.33 37.0 42.5 18 64.9 –7 2170 38.5 + j56.7 36.6 – j56.0 8.87 + j1.29 37.2 42.2 16 65.5 –9 Gain (dB) (dBm) (W) D (%) AM/PM () Max Drain Efficiency P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 2110 33.8 + j58.4 29.2 – j55.5 8.71 + j1.50 34.3 43.2 21 62.3 –11 2140 36.0 + j56.4 30.2 – j55.0 8.75 + j1.82 35.1 43.0 20 63.0 –14 2170 38.5 + j56.7 34.9 – j53.0 8.38 + j0.32 35.1 43.1 20 63.6 –17 (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 11 P1dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz 10 10 40.5 40 41 41.5 E 0 5 42 42.5 –5 P 43 43.5 –10 –15 64 IMAGINARY () IMAGINARY () 5 58 56 P 54 52 50 48 –10 41 42 42.5 10 5 15 REAL () 25 20 –15 5 10 37.5 36.5 –5 36 P 35.5 –10 34 5 –12 15 REAL () E 0 –8 –6 –4 P –5 –4 –4 –10 35 34.5 10 25 20 –10 37 IMAGINARY () 0 15 REAL () –14 5 5 E 10 Figure 18. P1dB Load Pull Efficiency Contours (%) 10 IMAGINARY () 62 60 –5 Figure 17. P1dB Load Pull Output Power Contours (dBm) –15 E 0 20 25 Figure 19. P1dB Load Pull Gain Contours (dB) NOTE: –15 –6 10 5 15 REAL () 20 25 Figure 20. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I20D040NR1 A2I20D040GNR1 12 RF Device Data Freescale Semiconductor, Inc. P3dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz 41 40.5 10 41.5 IMAGINARY () 5 42 E 0 43.5 –5 P 44 –10 42 –15 5 42.5 43 IMAGINARY () 10 –5 60 56 43.5 42.5 43 10 5 15 REAL () 20 25 –15 54 58 P 52 50 –10 48 46 10 5 15 REAL () 20 25 Figure 22. P3dB Load Pull Efficiency Contours (%) 10 10 –6 35.5 5 5 E 35 0 IMAGINARY () IMAGINARY () 62 44.5 Figure 21. P3dB Load Pull Output Power Contours (dBm) 34.5 34 –5 P 33.5 –10 32 –15 E 0 5 32.5 10 15 REAL () –18 –8 –16 –5 P –12 –10 33 25 20 Figure 23. P3dB Load Pull Gain Contours (dB) NOTE: E 0 –15 –14 –16 10 5 –10 15 REAL () 20 25 Figure 24. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 13 PACKAGE DIMENSIONS A2I20D040NR1 A2I20D040GNR1 14 RF Device Data Freescale Semiconductor, Inc. A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 15 A2I20D040NR1 A2I20D040GNR1 16 RF Device Data Freescale Semiconductor, Inc. A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 17 A2I20D040NR1 A2I20D040GNR1 18 RF Device Data Freescale Semiconductor, Inc. A2I20D040NR1 A2I20D040GNR1 RF Device Data Freescale Semiconductor, Inc. 19 PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages AN1955: Thermal Measurement Methodology of RF Power Amplifiers AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices Software Electromigration MTTF Calculator RF High Power Model .s2p File Development Tools Printed Circuit Boards To Download Resources Specific to a Given Part Number: 1. Go to http://www.nxp.com/RF 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 Apr. 2016 Description Initial Release of Data Sheet A2I20D040NR1 A2I20D040GNR1 20 RF Device Data Freescale Semiconductor, Inc. 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All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. E 2016 Freescale Semiconductor, Inc. A2I20D040NR1 A2I20D040GNR1 Document Number: RF Device Data A2I20D040N Rev. 0, 4/2016Semiconductor, Inc. Freescale 21