Freescale Semiconductor Technical Data Document Number: A2I25D012N Rev. 1, 3/2015 RF LDMOS Wideband Integrated Power Amplifiers The A2I25D012N wideband integrated power amplifier is optimized to function with a single multi--band circuit usable from 2300 to 2690 MHz. This multi--stage structure is rated from 26 to 32 V operation and covers all typical cellular base station modulation formats. Typical Single--Carrier W--CDMA Characterization Performance: VDD = 28 Vdc, IDQ1(A+B) = 45 mA, IDQ2(A+B) = 110 mA, Pout = 2.2 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.(1) Frequency Gps (dB) PAE (%) ACPR (dBc) 2300 MHz 31.8 18.5 –47.8 2350 MHz 31.8 18.4 –48.7 2400 MHz 31.9 18.3 –49.3 2496 MHz 32.2 18.3 –49.8 2590 MHz 32.5 18.6 –48.3 2690 MHz 33.2 19.8 –46.8 Features A2I25D012NR1 A2I25D012GNR1 2300–2690 MHz, 2.2 W AVG., 28 V AIRFAST RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIERS TO--270WB--15 PLASTIC A2I25D012NR1 TO--270WBG--15 PLASTIC A2I25D012GNR1 On--Chip Matching (50 Ohm Input, DC Blocked) Integrated Quiescent Current Temperature Compensation with Enable/Disable Function (2) Designed for Digital Predistortion Error Correction Systems Optimized for Doherty Applications VDS1A RFinA VGS1A VGS2A VGS1B VGS2B RFout1/VDS2A Quiescent Current Temperature Compensation (2) Quiescent Current Temperature Compensation (2) RFinB RFout2/VDS2B VDS1A VGS2A VGS1A RFinA N.C. GND GND N.C. RFinB VGS1B VGS2B VDS1B 1 2 3 4 5 6 7 8 9 10 11 12 15 RFout1/VDS2A 14 13 GND RFout2/VDS2B (Top View) Note: Exposed backside of the package is the source terminal for the transistors. VDS1B Figure 1. Functional Block Diagram Figure 2. Pin Connections 1. All data measured in fixture with device soldered to heatsink. 2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 or AN1987. Freescale Semiconductor, Inc., 2014–2015. All rights reserved. RF Device Data Freescale Semiconductor, Inc. A2I25D012NR1 A2I25D012GNR1 1 Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage VDSS –0.5, +65 Vdc Gate--Source Voltage VGS –0.5, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg –65 to +150 C TC –40 to +150 C Case Operating Temperature Range Operating Junction Temperature Range (1,2) Input Power TJ –40 to +225 C Pin 20 dBm Symbol Value (2,3) Unit Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 74C, 2 W CW, 2500 MHz Stage 1, 28 Vdc, IDQ1(A+B) = 45 mA Stage 2, 28 Vdc, IDQ2(A+B) = 110 mA RJC C/W 9.3 3.3 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22--A114) 1A Machine Model (per EIA/JESD22--A115) A Charge Device Model (per JESD22--C101) II Table 4. Moisture Sensitivity Level Test Methodology Per JESD22--A113, IPC/JEDEC J--STD--020 Rating Package Peak Temperature Unit 3 260 C Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (VDS = 10 Vdc, ID = 3 Adc) VGS(th) 0.8 1.2 1.6 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ1(A+B) = 45 mA) VGS(Q) — 2.0 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ1(A+B) = 45 mA, Measured in Functional Test) VGG(Q) 5.3 6.7 8.0 Vdc Characteristic Stage 1 -- Off Characteristics Stage 1 -- On Characteristics 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1955. (continued) A2I25D012NR1 A2I25D012GNR1 2 RF Device Data Freescale Semiconductor, Inc. Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 1 Adc Gate--Source Leakage Current (VGS = 1.0 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 10 Adc) VGS(th) 0.8 1.2 1.6 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ2(A+B) = 110 mA) VGS(Q) — 1.9 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ2(A+B) = 110 mA, Measured in Functional Test) VGG(Q) 4.0 5.0 6.0 Vdc Drain--Source On--Voltage (1) (VGS = 10 Vdc, ID = 100 mAdc) VDS(on) 0.1 0.32 1.5 Vdc Stage 2 -- Off Characteristics (1) Stage 2 -- On Characteristics Functional Tests (2,3) (In Freescale Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 45 mA, IDQ2(A+B) = 110 mA, Pout = 2.2 W Avg., f = 2690 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. Power Gain Gps 31.0 32.4 35.0 dB Power Added Efficiency PAE 18.0 19.7 — % Pout @ 1 dB Compression Point, CW P1dB 13.5 15.5 — W Load Mismatch (4) (In Freescale Characterization Test Fixture, 50 ohm system) IDQ1(A+B) = 45 mA, IDQ2(A+B) = 110 mA, f = 2690 MHz VSWR 10:1 at 32 Vdc, 24 W CW Output Power (3 dB Input Overdrive from 13 W CW Rated Power) No Device Degradation Typical Performance (4) (In Freescale Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 45 mA, IDQ2(A+B) = 110 mA, 2300–2690 MHz Bandwidth Pout @ 3 dB Compression Point, CW (5) P3dB — 24 — W — –11.1 — VBWres — 160 — MHz — — 2.77 1.83 — — AM/PM (Maximum value measured at the P3dB compression point across the 2300–2690 MHz frequency range.) VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) Quiescent Current Accuracy over Temperature (6) with 4.7 k Gate Feed Resistors (–30 to 85C) with 4.7 k Gate Feed Resistors (–30 to 85C) IQT Stage 1 Stage 2 % Gain Flatness in 390 MHz Bandwidth @ Pout = 2.2 W Avg. GF — 1.4 — dB Gain Variation over Temperature (–30C to +85C) G — 0.033 — dB/C P1dB — 0.006 — dB/C Output Power Variation over Temperature (–30C to +85C) Table 6. Ordering Information Device A2I25D012NR1 A2I25D012GNR1 Tape and Reel Information R1 Suffix = 500 Units, 44 mm Tape Width, 13--Reel Package TO--270WB--15 TO--270WBG--15 1. Each side of device measured separately. 2. Part internally input matched. 3. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull wing (GN) parts. 4. All data measured in fixture with device soldered to heatsink. 5. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF. 6. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 or AN1987. A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 3 D60632 VDD1A C13 C15 VGG2A VGG1A C3 R1 C17 C19 C11 A2I25D012N Rev. 3 VDD2A R6 C9 R2 C1 Z1 R5 Q1 Z2 C6 C10 C12 R4 VGG1B C7 C8 C2 R3 C5 C4 VGG2B C14 VDD1B C16 VDD2B C18 C20 Note: All data measured in fixture with device soldered to heatsink. Production fixture does not include device soldered to heatsink. Figure 3. A2I25D012NR1 Characterization Test Circuit Component Layout — 2300–2690 MHz Table 7. A2I25D012NR1 Test Circuit Component Designations and Values — 2300–2690 MHz Part Description Part Number Manufacturer C1, C2 1.1 pF Chip Capacitors ATC600F1R1AW250XT ATC C3, C4 6.8 pF Chip Capacitors ATC600F6R8BW250XT ATC C5, C6 1.8 pF Chip Capacitors ATC600F1R8AWT250XT ATC C7, C8 10 pF Chip Capacitors ATC600F100JT250XT ATC C9, C10, C11, C12, C17, C18 4.7 F Chip Capacitors GRM31CR71H475KA12L Murata C13, C14, C19, C20 10 F Chip Capacitors GRM31CR61H106KA12L Murata C15, C16 1.0 F Chip Capacitors GRM31MR71H105KA88L Murata Q1 RF LDMOS Power Amplifier A2I25D012NR1 Freescale R1, R4 4.7 K, 1/4 W Chip Resistors CRCW12064K70FKEA Vishay R2*, R3* 2.4 K, 1/4 W Chip Resistors CRCW12062K40FKEA Vishay R5, R6 50 , 4 W Chip Resistors CW12010T0050GBK ATC Z1, Z2 2300–2900 MHz Band, 90, 3 dB Hybrid Couplers X3C26P1-03S Anaren PCB Rogers RO4350B, 0.020, r = 3.66 D60632 MTL *In production fixture only. A2I25D012NR1 A2I25D012GNR1 4 RF Device Data Freescale Semiconductor, Inc. TYPICAL CHARACTERISTICS 32.8 PAE 32.6 21 20 19 18 Gps PARC 32.4 --45 --0.5 --46 --0.6 32.2 --47 32 --48 31.8 31.6 2300 --49 ACPR 2350 2400 2450 2500 2550 2600 2650 --50 2700 --0.7 --0.8 --0.9 PARC (dB) 33 PAE, POWER ADDED EFFICIENCY (%) 33.2 Gps, POWER GAIN (dB) 22 VDD = 28 Vdc, Pout = 2.2 W (Avg.), IDQ1(A+B) = 45 mA IDQ2(A+B) = 110 mA, Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF ACPR (dBc) 33.6 33.4 --1 f, FREQUENCY (MHz) IMD, INTERMODULATION DISTORTION (dBc) Figure 4. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 2.2 Watts Avg. --15 VDD = 28 Vdc, Pout = 9 W (PEP), IDQ1(A+B) = 45 mA IDQ2(A+B) = 110 mA, Two--Tone Measurements (f1 + f2)/2 = Center Frequency of 2590 MHz --25 IM3--U IM3--L --35 IM5--L --45 IM5--U --55 --65 IM7--U 1 IM7--L 10 100 200 TWO--TONE SPACING (MHz) 32.6 0 32.4 32.2 32 31.8 31.6 40 ACPR --1 16 PARC --3 dB = 4.8 W --4 --5 24 Gps --2 dB = 3.5 W --3 32 PAE --1 dB = 2.28 W --2 8 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 1 2 3 4 5 --30 48 VDD = 28 Vdc, IDQ1(A+B) = 45 mA, IDQ2(A+B) = 110 mA f = 2590 MHz, Single--Carrier W--CDMA 0 6 --35 --40 --45 ACPR (dBc) 1 PAE, POWER ADDED EFFICIENCY (%) 32.8 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) Figure 5. Intermodulation Distortion Products versus Two--Tone Spacing --50 --55 --60 7 Pout, OUTPUT POWER (WATTS) Figure 6. Output Peak--to--Average Ratio Compression (PARC) versus Output Power A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 5 TYPICAL CHARACTERISTICS 50 33 32 40 2496 MHz 2690 MHz 2590 MHz 31 30 2690 MHz 2590 MHz 2496 MHz 2496 MHz 2590 MHz 2690 MHz 30 ACPR PAE 29 0.1 Gps 20 10 0 0 1 10 --10 --20 --30 --40 ACPR (dBc) 34 Gps, POWER GAIN (dB) 60 VDD = 28 Vdc, IDQ1(A+B) = 45 mA, IDQ2(A+B) = 110 mA Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF PAE, POWER ADDED EFFICIENCY (%) 35 --50 --60 20 Pout, OUTPUT POWER (WATTS) AVG. Figure 7. Single--Carrier W--CDMA Power Gain, Power Added Efficiency and ACPR versus Output Power — 2496–2690 MHz 50 32 40 2300 MHz 31 30 2350 MHz 2400 MHz 2350 MHz 2300 MHz 30 20 2400 MHz ACPR 29 2400 MHz 2300 MHz 2350 MHz PAE 28 0.1 1 Gps 10 0 0 10 20 --10 --20 --30 --40 ACPR (dBc) 33 Gps, POWER GAIN (dB) 60 VDD = 28 Vdc, IDQ1(A+B) = 45 mA, IDQ2(A+B) = 110 mA Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF PAE, POWER ADDED EFFICIENCY (%) 34 --50 --60 Pout, OUTPUT POWER (WATTS) AVG. Figure 8. Single--Carrier W--CDMA Power Gain, Power Added Efficiency and ACPR versus Output Power — 2300–2400 MHz 35 34 Gain GAIN (dB) 33 32 VDD = 28 Vdc Pin = 0 dBm IDQ1(A+B) = 45 mA IDQ2(A+B) = 110 mA 31 30 29 2150 2300 2450 2600 2750 2900 3050 f, FREQUENCY (MHz) Figure 9. Broadband Frequency Response A2I25D012NR1 A2I25D012GNR1 6 RF Device Data Freescale Semiconductor, Inc. Table 8. Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, IDQ1(A) = 22.5 mA, IDQ2(A) = 55 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB Zload () (1) (W) PAE (%) AM/PM () 40.3 11 54.9 –3 40.2 10 53.9 –3 32.1 40.1 10 54.1 –4 8.92 – j1.11 32.5 40.1 10 53.3 –3 55.9 – j21.5 8.86 – j1.91 33.1 40.2 11 55.0 –2 42.9 – j35.7 10.1 – j2.57 33.2 40.3 11 55.1 –3 f (MHz) Zsource () Zin () 2300 20.5 + j19.7 19.8 – j20.5 2350 24.5 + j16.0 23.6 – j16.1 2400 30.8 + j8.79 2496 Gain (dB) (dBm) 9.60 – j0.52 31.3 8.79 – j0.88 31.7 29.5 – j11.3 7.87 – j1.08 45.1 + j5.61 43.9 – j9.82 2590 52.3 + j22.1 2690 46.0 + j43.0 Max Output Power P3dB Zload () (2) Gain (dB) (dBm) (W) PAE (%) AM/PM () 10.4 – j1.17 29.0 41.2 13 55.9 –6 24.6 – j17.1 9.88 – j1.42 29.3 41.1 13 55.1 –6 30.6 – j13.3 9.77 – j1.59 29.6 41.1 13 55.1 –7 45.1 + j5.61 43.4 – j12.7 10.1 – j1.50 30.2 41.1 13 55.2 –6 2590 52.3 + j22.1 52.8 – j23.3 10.4 – j2.22 30.7 41.2 13 55.6 –5 2690 46.0 + j43.0 41.0 – j35.0 11.5 – j2.97 30.9 41.2 13 56.0 –5 f (MHz) Zsource () Zin () 2300 20.5 + j19.7 20.6 – j21.0 2350 24.5 + j16.0 2400 30.8 + j8.79 2496 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 7 Table 9. Load Pull Performance — Maximum Power Added Efficiency Tuning VDD = 28 Vdc, IDQ1(A) = 22.5 mA, IDQ2(A) = 55 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Power Added Efficiency P1dB Zload () (1) Gain (dB) (dBm) (W) PAE (%) AM/PM () 5.29 + j2.95 33.3 38.7 7 62.6 –8 5.06 + j2.20 33.7 38.8 8 61.9 –8 32.4 – j8.18 4.95 + j2.11 34.2 38.6 7 60.8 –8 45.1 + j5.61 50.5 – j8.00 5.25 + j1.60 34.5 38.9 8 60.6 –7 2590 52.3 + j22.1 61.3 – j27.8 5.42 + j1.07 34.9 39.0 8 61.9 –7 2690 46.0 + j43.0 42.1 – j41.4 5.33 – j0.09 35.2 38.8 8 62.2 –8 f (MHz) Zsource () Zin () 2300 20.5 + j19.7 20.8 – j18.5 2350 24.5 + j16.0 24.8 – j13.5 2400 30.8 + j8.79 2496 Max Power Added Efficiency P3dB Zload () (2) Gain (dB) (dBm) (W) PAE (%) AM/PM () 5.18 + j2.83 31.3 39.4 9 63.6 –13 25.5 – j14.7 5.15 + j2.29 31.7 39.6 9 63.3 –12 32.7 – j10.3 5.16 + j2.22 32.2 39.5 9 63.0 –12 45.1 + j5.61 50.1 – j10.8 4.96 + j1.89 32.8 39.4 9 62.9 –12 2590 52.3 + j22.1 57.9 – j27.9 5.33 + j1.26 33.0 39.7 9 63.5 –9 2690 46.0 + j43.0 40.9 – j39.8 5.33 + j0.11 33.2 39.5 9 63.7 –10 f (MHz) Zsource () Zin () 2300 20.5 + j19.7 21.2 – j19.2 2350 24.5 + j16.0 2400 30.8 + j8.79 2496 (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Note: Measurement made on a per side basis. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2I25D012NR1 A2I25D012GNR1 8 RF Device Data Freescale Semiconductor, Inc. P1dB -- TYPICAL LOAD PULL CONTOURS — 2590 MHz 6 IMAGINARY () 4 37 38 38.5 39 2 39.5 E IMAGINARY () 36 4 6 36.5 37.5 40 0 --2 P --4 --6 6 8 10 REAL () 12 6 4 4 34.5 34 33.5 33 32.5 IMAGINARY () 35.5 35 E 32 0 --2 P 56 4 54 P 6 4 8 52 50 48 10 REAL () 46 6 8 10 REAL () 12 16 14 Figure 12. P1dB Load Pull Gain Contours (dB) NOTE: 12 14 16 --2 2 E 0 --8 --2 --6 --4 P --2 --4 --4 --6 58 Figure 11. P1dB Load Pull Efficiency Contours (%) 6 2 60 --2 --6 16 14 Figure 10. P1dB Load Pull Output Power Contours (dBm) IMAGINARY () E 0 --4 39 38.5 4 2 --6 4 6 8 10 REAL () 12 14 16 Figure 13. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Power Added Efficiency Gain Power Added Efficiency Linearity Output Power A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 9 P3dB -- TYPICAL LOAD PULL CONTOURS — 2590 MHz 6 6 4 4 2 2 E IMAGINARY () IMAGINARY () 56 0 --2 41 38.5 39 6 4 8 10 12 REAL () 16 14 --8 18 4 4 33.5 33 32.5 32 E 31.5 31 IMAGINARY () IMAGINARY () 52 P 48 30 30.5 0 --2 P 0 --6 --6 10 12 REAL () 14 16 18 Figure 16. P3dB Load Pull Gain Contours (dB) NOTE: 10 12 REAL () 16 14 18 E --4 --12 --2 --4 8 8 --2 2 --4 6 6 4 Figure 15. P3dB Load Pull Efficiency Contours (%) 6 4 54 50 --2 6 --8 58 --6 Figure 14. P3dB Load Pull Output Power Contours (dBm) 2 60 62 --4 39.5 --6 --8 40.5 40 --4 P E 0 --8 4 P --6 --10 --8 6 8 10 12 REAL () 14 16 18 Figure 17. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Power Added Efficiency Gain Power Added Efficiency Linearity Output Power A2I25D012NR1 A2I25D012GNR1 10 RF Device Data Freescale Semiconductor, Inc. PACKAGE DIMENSIONS A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 11 A2I25D012NR1 A2I25D012GNR1 12 RF Device Data Freescale Semiconductor, Inc. A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 13 A2I25D012NR1 A2I25D012GNR1 14 RF Device Data Freescale Semiconductor, Inc. A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 15 A2I25D012NR1 A2I25D012GNR1 16 RF Device Data Freescale Semiconductor, Inc. PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices Software Electromigration MTTF Calculator RF High Power Model .s2p File Development Tools Printed Circuit Boards For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to Software & Tools on the part’s Product Summary page to download the respective tool. REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 Sept. 2014 1 Mar. 2015 Description Initial release of data sheet Figs. 4, 6--8: changed drain efficiency to power added efficiency for plots and axes labels, pp. 5, 6 Tables 7 and 8: changed drain efficiency to power added efficiency and added measurement made on a per side basis note, pp. 7, 8 A2I25D012NR1 A2I25D012GNR1 RF Device Data Freescale Semiconductor, Inc. 17 How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. E 2014–2015 Freescale Semiconductor, Inc. A2I25D012NR1 A2I25D012GNR1 Document Number: A2I25D012N Rev. 1, 3/2015 18 RF Device Data Freescale Semiconductor, Inc.