Data Sheet

Freescale Semiconductor
Technical Data
Document Number: MMRF1020--04N
Rev. 0, 2/2014
RF Power LDMOS Transistors
N--Channel Enhancement--Mode Lateral MOSFETs
These 100 W symmetrical Doherty RF power LDMOS transistors are
designed for cellular base station applications covering the frequency range
of 720 to 960 MHz. The transistors are also suitable for wideband power
amplifier applications from 600 to 1000 MHz and saturated power levels up to
500 watts.
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 48 Vdc,
IDQA = 860 mA, VGSB = 0.9 Vdc, Pout = 100 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
920 MHz
19.5
48.5
7.2
–29.2
940 MHz
19.5
49.5
7.1
–32.0
960 MHz
19.2
48.0
7.0
–35.7
MMRF1020--04NR3
MMRF1020--04GNR3
720–960 MHz, 100 W AVG., 48 V
RF POWER LDMOS
TRANSISTORS
OM--780--4L
PLASTIC
MMRF1020--04NR3
Features
 Production Tested in a Symmetrical Doherty Configuration
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
 In Tape and Reel. R3 Suffix = 250 Units, 32 mm Tape Width, 13--inch Reel.
OM--780G--4L
PLASTIC
MMRF1020--04GNR3
Carrier
RFinA/VGSA 3
1 RFoutA/VDSA
RFinB/VGSB 4
2 RFoutB/VDSB
Peaking
(Top View)
Note: Exposed backside of the package is
the source terminal for the transistors.
Figure 1. Pin Connections
 Freescale Semiconductor, Inc., 2014. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
MMRF1020--04NR3 MMRF1020--04GNR3
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +105
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
55, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
TJ
–40 to +225
C
Symbol
Value (2,3)
Unit
RJC
0.45
C/W
Operating Junction Temperature
Range (1,2)
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 86C, 102 W W--CDMA, 48 Vdc, IDQA = 860 mA, VGSB = 0.9 Vdc, 940 MHz
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
1C
Machine Model (per EIA/JESD22--A115)
A
Charge Device Model (per JESD22--C101)
IV
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD22--A113, IPC/JEDEC J--STD--020
Rating
Package Peak Temperature
Unit
3
260
C
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 105 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 48 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 460 Adc)
VGS(th)
1.3
1.8
2.3
Vdc
Gate Quiescent Voltage
(VDD = 48 Vdc, IDA = 860 mAdc, Measured in Functional Test)
VGS(Q)
2.0
2.5
3.0
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.3 Adc)
VDS(on)
0.1
0.21
0.3
Vdc
Characteristic
Off Characteristics (4)
On Characteristics (4)
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/
Application Notes -- AN1955.
4. Each side of device measured separately.
(continued)
MMRF1020--04NR3 MMRF1020--04GNR3
2
RF Device Data
Freescale Semiconductor, Inc.
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Functional Tests (1,2,3) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQA = 860 mA, VGSB = 0.9 Vdc,
Pout = 100 W Avg., f = 920 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
18.5
19.5
21.5
dB
Drain Efficiency
D
45.0
48.5
—
%
PAR
6.6
7.2
—
dB
ACPR
—
–29.2
–27.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch (In Freescale Test Fixture, 50 ohm system) IDQA = 860 mA, VGSB = 0.9 Vdc, f = 940 MHz
No Device Degradation
VSWR 10:1 at 52 Vdc, 500 W Pulsed Output Power
(3 dB Input Overdrive from 200 W Pulsed Rated Power)
Typical Performances (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQA = 860 mA, VGSB = 0.9 Vdc, 920--960 MHz
Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
200
—
W
Pout @ 3 dB Compression Point (4)
P3dB
—
500
—
W

—
–21
—

VBWres
—
43
—
MHz
Gain Flatness in 40 MHz Bandwidth @ Pout = 100 W Avg.
GF
—
0.3
—
dB
Gain Variation over Temperature
(--30C to +85C)
G
—
0.01
—
dB/C
P1dB
—
0.0075
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 920--960 MHz frequency range)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(--30C to +85C)
1.
2.
3.
4.
Part internally input matched.
Measurement made with device in a symmetrical Doherty configuration.
Measurement made with device in straight lead configuration before any lead forming operation is applied.
P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
MMRF1020--04NR3 MMRF1020--04GNR3
RF Device Data
Freescale Semiconductor, Inc.
3
VGGA
VDDA
--
C14
C16
C5
C4
C15
R1
C
C26
C1
C6
C2
C12
C13
C7
C19
C20
C8
C25
R3
P
R2
CUT OUT AREA
Z1
C17
C11
C3
C18
C21
C27
C23
C9
C10
--
C22
C24
VGGB
VDDB
Figure 2. MMRF1020--04NR3 Test Circuit Component Layout
Table 6. MMRF1020--04NR3 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
33 pF Chip Capacitors
ATC100B330JT500XT
ATC
4.3 pF Chip Capacitors
ATC100B4R3CT500XT
ATC
C3, C8
6.8 pF Chip Capacitors
ATC100B6R8CT500XT
ATC
C4, C9. C14, C22
47 pF Chip Capacitors
ATC100B470JT500XT
ATC
C5, C10
2.2 F Chip Capacitors
C3225X7R1H225K250AB
TDK
C11, C18
12 pF Chip Capacitors
ATC100B120JT500XT
ATC
C12, C19
8.2 pF Chip Capacitors
ATC100B8R2CT500XT
ATC
C15, C23
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C16, C24
220 F, 100 V Electrolytic Capacitors
MCGPR100V227M16X26-RH
Multicomp
C25
0.5 pF Chip Capacitor
ATC100B0R5BT500XT
ATC
C26
0.3 pF Chip Capacitor
ATC100B0R3BT500XT
ATC
C27
0.8 pF Chip Capacitor
ATC100B0R8BT500XT
ATC
R1, R2
1.5 , 1/4 W Chip Resistors
RC1206FR-071R5L
Yageo
R3
50  , 30 W Termination
RFP-375375N6Z50-2
Anaren
Z1
800--1000 MHz Band, 90, 3 dB Hybrid Coupler
X3C09P1-03S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
—
MTL
C1, C6, C13, C20
C2, C7, C17, C21
MMRF1020--04NR3 MMRF1020--04GNR3
4
RF Device Data
Freescale Semiconductor, Inc.
60
19
50
40
D
17
16
VDD = 48 Vdc, Pout = 100 W (Avg.)
IDQA = 860 mA, VGSB = 0.9 Vdc
Single--Carrier W--CDMA
3.84 MHz Channel Bandwidth
Gps
15
14
30
20
PARC
13
--21
--2
--24
--3
--27
--30
12
11
10
820
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
ACPR
840
940
860
880
900
920
--33
ACPR (dBc)
Gps, POWER GAIN (dB)
18
--4
--5
--6
--36
960
PARC (dB)
20
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS
--7
980
f, FREQUENCY (MHz)
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 100 Watts Avg.
--15
VDD = 48 Vdc, Pout = 136 W (PEP), IDQA = 860 mA
VGSB = 0.9 Vdc, Two--Tone Measurements
--25 (f1 + f2)/2 = Center Frequency of 940 MHz
IM3--L
IM3--U
--35
IM5--U
IM5--L
--45
IM7--U
--55
--65
IM7--L
1
10
100
TWO--TONE SPACING (MHz)
20
0
18
16
14
12
10
VDD = 48 Vdc, IDQA = 860 mA, VGSB = 0.9 Vdc
f = 940 MHz, Single--Carrier W--CDMA
D
–1 dB = 41.4 W
Gps
--1
60
--15
50
--20
40
–2 dB = 78 W
--2
30
ACPR
--3
20
–3 dB = 108.7 W
--4
--5
PARC
3.84 MHz Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF
30
50
70
90
110
--25
--30
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
22
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
--35
10
--40
0
--45
130
Pout, OUTPUT POWER (WATTS)
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
MMRF1020--04NR3 MMRF1020--04GNR3
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS
VDD = 48 Vdc, IDQA = 860 mA
VGSB = 0.9 Vdc, Single--Carrier
W--CDMA, 3.84 MHz Channel
Bandwidth
920 MHz
960 MHz
20
18
--10
50
--20
40
960 MHz
920 MHz
940 MHz
Gps
30
16 960 MHz
20
14 ACPR
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
D
12
1
10
10
0
300
100
--30
--40
--50
ACPR (dBc)
Gps, POWER GAIN (dB)
22
60
940 MHz
D, DRAIN EFFICIENCY (%)
24
--60
--70
Pout, OUTPUT POWER (WATTS) AVG.
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
20
VDD = 48 Vdc
Pin = 0 dBm
IDQA = 860 mA,
VGSB = 0.9 Vdc
18
GAIN (dB)
16
Gain
14
12
10
8
650
700
750
800
850
900
950
1000
1050
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
MMRF1020--04NR3 MMRF1020--04GNR3
6
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 48 Vdc, IDQ = 862 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
920
2.39 – j3.65
2.32 + j3.41
940
2.54 – j4.03
2.49 + j3.84
960
2.90 – j4.64
2.76 + j4.31
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.84 + j0.12
21.3
54.1
260
59.9
–14
1.85 + j0.11
21.3
54.1
258
59.9
–14
1.77 + j0.13
21.2
54.1
259
59.8
–15
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
920
2.39 – j3.65
2.29 + j3.66
2.11 – j0.03
19.1
54.8
301
61.1
–19
940
2.54 – j4.03
2.45 + j4.12
2.04 – j0.03
19.2
54.8
299
60.8
–18
960
2.90 – j4.64
2.74 + j4.63
1.97 – j0.01
19.1
54.8
300
60.6
–19
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 48 Vdc, IDQ = 862 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.51 + j1.85
24.3
51.5
140
71.8
–20
2.27 + j4.24
1.43 + j1.84
24.3
51.4
138
71.9
–21
2.60 + j4.68
1.46 + j1.61
23.8
52.2
164
71.6
–20
f
(MHz)
Zsource
()
Zin
()
920
2.39 – j3.65
2.11 + j3.81
940
2.54 – j4.03
960
2.90 – j4.64
Zload
()
(1)
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.92 + j1.53
21.5
53.2
207
71.6
–25
2.38 + j4.45
1.74 + j1.57
21.7
52.9
197
71.8
–27
2.66 + j4.94
1.59 + j1.48
21.5
53.1
206
72.0
–27
f
(MHz)
Zsource
()
Zin
()
920
2.39 – j3.65
2.22 + j3.95
940
2.54 – j4.03
960
2.90 – j4.64
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
MMRF1020--04NR3 MMRF1020--04GNR3
RF Device Data
Freescale Semiconductor, Inc.
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 48 Vdc, VGSB = 0.9 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
920
2.39 – j3.65
2.33 + j3.43
940
2.54 – j4.03
2.44 + j3.87
960
2.90 – j4.64
2.64 + j4.34
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.52 + j0.07
16.8
54.7
294
66.5
–25
1.44 + j0.21
16.9
54.6
291
66.9
–25
1.58 + j0.24
17.0
54.5
283
66.5
–25
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
920
2.39 – j3.65
2.28 + j3.69
1.68 – j0.06
14.7
55.3
335
66.8
–29
940
2.54 – j4.03
2.40 + j4.15
1.60 + j0.13
14.9
55.2
332
68.0
–30
960
2.90 – j4.64
2.61 + j4.66
1.71 + j0.14
14.9
55.1
325
66.8
–30
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 48 Vdc, VGSB = 0.9 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.81 + j1.79
17.5
52.4
174
78.9
–29
2.27 + j3.80
1.35 + j2.23
17.6
51.2
131
81.4
–35
2.43 + j4.27
1.24 + j2.22
17.6
51.2
131
81.6
–36
f
(MHz)
Zsource
()
Zin
()
920
2.39 – j3.65
2.22 + j3.39
940
2.54 – j4.03
960
2.90 – j4.64
Zload
()
(1)
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.07 + j1.45
15.5
53.6
231
77.1
–33
2.31 + j4.12
1.86 + j1.49
15.7
53.6
231
78.9
–36
2.50 + j4.62
1.70 + j1.64
15.8
53.4
218
78.7
–37
f
(MHz)
Zsource
()
Zin
()
920
2.39 – j3.65
2.20 + j3.66
940
2.54 – j4.03
960
2.90 – j4.64
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
MMRF1020--04NR3 MMRF1020--04GNR3
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 940 MHz
3
3
50.5
50
51
2.5
51.5
52
E
1.5
52.5
53
1
0.5
P
0
--1
52.5
53
2
2.5
3
70
64
68
1
62
0.5
--1
3.5
P
58
56
1.5
1
2
2.5
3
3.5
REAL ()
REAL ()
Figure 8. P1dB Load Pull Output Power Contours (dBm)
Figure 9. P1dB Load Pull Efficiency Contours (%)
3
3
25
2.5
24.5
23.5
24
2
23
1.5
22.5
22
0.5
21.5
P
0
--24
1.5
E
21
--16
--18
--22
1
--14
--20
0.5
P
0
--0.5
--1
--12
2
E
1
--10
2.5
IMAGINARY ()
IMAGINARY ()
60
66
--0.5
53.5
1.5
1
E
1.5
0
54
--0.5
58
2
IMAGINARY ()
IMAGINARY ()
2
56
2.5
--0.5
1
1.5
2
2.5
3
3.5
--1
1
1.5
2
2.5
3
3.5
REAL ()
REAL ()
Figure 10. P1dB Load Pull Gain Contours (dB)
Figure 11. P1dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
MMRF1020--04NR3 MMRF1020--04GNR3
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB -- TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 940 MHz
3
3
2.5
2.5
53.5
1
0.5
54
0
--1
1.5
1
68
70
1
66
0.5
64
P
56
--0.5
53.5
2
2.5
3
--1
3.5
58
E
1.5
0
P
54.5
--0.5
60
2
53
E
1.5
52.5
IMAGINARY ()
IMAGINARY ()
52
51.5
51
2
56
1.5
1
58
2
62
60
2.5
3
3.5
REAL ()
REAL ()
Figure 12. P3dB Load Pull Output Power Contours (dBm)
Figure 13. P3dB Load Pull Efficiency Contours (%)
3
3
22
IMAGINARY ()
2
22.5
1.5
21.5
2.5
21
2
E
20.5
1
20
0.5
0
18.5
--0.5
--1
IMAGINARY ()
2.5
1
1.5
P
19.5
--30
1
--26
0.5
--20
--28
--24
0
19
--22
E
1.5
--18
P
--16
--0.5
2
2.5
3
3.5
--1
1
1.5
2
2.5
3
3.5
REAL ()
REAL ()
Figure 14. P3dB Load Pull Gain Contours (dB)
Figure 15. P3dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
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P1dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 940 MHz
3
50.5
2.5
51
2.5
52
E
2
1.5
1
0.5
0
53
P
--1
0.5
54.5
80
76
68
72
1
74
70
0.5
66
P
--0.5
53.5
1.5
1
78
1.5
0
54
--0.5
E
2
52.5
IMAGINARY ()
IMAGINARY ()
3
51.5
2
2.5
3
--1
0.5
3.5
1.5
1
2
2.5
3
3.5
REAL ()
REAL ()
Figure 16. P1dB Load Pull Output Power Contours (dBm)
Figure 17. P1dB Load Pull Efficiency Contours (%)
3
3
16.5
2.5
E
18
1.5
17.5
18.5
1
0.5
17
P
0
--1
0.5
1
1.5
2
--24
1
--24
--26
--22
--28
0.5
P
--0.5
16
15.5
14.5 15
--30
1.5
0
16.5
--0.5
--32
--36 E
2
IMAGINARY ()
IMAGINARY ()
2
--20
--34
2.5
2.5
3
3.5
--1
0.5
1.5
1
2
2.5
3
3.5
REAL ()
REAL ()
Figure 18. P1dB Load Pull Gain Contours (dB)
Figure 19. P1dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
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Freescale Semiconductor, Inc.
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P3dB -- TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 940 MHz
3
2.5
52
2.5
52.5
53
1.5
2
53.5
E
IMAGINARY ()
2
IMAGINARY ()
3
51 51.5
54
1
54.5
0.5
55
P
0
1.5
E
1
78
76
74
0.5
72
66
P
0
64
--0.5
--0.5
--1
0.5
1.5
1
2
2.5
3
--1
0.5
3.5
68
70
1.5
1
2
2.5
62
3
3.5
REAL ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
Figure 21. P3dB Load Pull Efficiency Contours (%)
3
3
2.5
2.5
2
2
16
1.5
E
IMAGINARY ()
IMAGINARY ()
REAL ()
15.5
1
0.5
--0.5
--1
0.5
15
P
0
1
1.5
2
--34
--36
--40
1.5
--28
E
--26
--32
1
--30
0.5
P
--0.5
14
13.5
12.5 13
--38
0
14.5
12
--42
2.5
3
3.5
--1
0.5
1
1.5
2
2.5
3
3.5
REAL ()
REAL ()
Figure 22. P3dB Load Pull Gain Contours (dB)
Figure 23. P3dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
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PACKAGE DIMENSIONS
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PRODUCT DOCUMENTATION AND SOFTWARE
Refer to the following documents, software and tools to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the
Software & Tools tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Feb. 2014
Description
 Initial Release of Data Sheet
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Rev. 0, 2/2014
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