Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T23H300--24S
Rev. 0, 6/2015
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 66 W asymmetrical Doherty RF power LDMOS transistor is designed for
cellular base station applications covering the frequency range of 2300 to
2400 MHz.
2300 MHz
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQA = 750 mA, VGSB = 0.7 Vdc, Pout = 66 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
2300 MHz
14.9
46.7
7.8
–34.0
2350 MHz
15.1
46.5
7.8
–35.6
2400 MHz
15.1
46.4
7.5
–34.6
A2T23H300--24SR6
2300–2400 MHz, 66 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
ACPR
(dBc)
Features
 Advanced High Performance In--Package Doherty
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
NI--1230S--4L2L
6 VBWA(1)
Carrier
RFinA/VGSA 1
5 RFoutA/VDSA
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB(1)
(Top View)
Figure 1. Pin Connections
1. Device cannot operate with the VDD current
supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2015. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T23H300--24SR6
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
--0.5, +65
Vdc
Gate--Source Voltage
VGS
--6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
--65 to +150
C
Case Operating Temperature Range
TC
--40 to +150
C
TJ
--40 to +225
C
CW
248
1.2
W
W/C
Symbol
Value (2,3)
Unit
RJC
0.25
C/W
Operating Junction Temperature Range
(1,2)
CW Operation @ TC = 25C
Derate above 25C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 72C, 66 W Avg., W--CDMA, 28 Vdc, IDQA = 750 mA,
VGSB = 0.7 Vdc, 2350 MHz
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 160 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, IDA = 750 mAdc, Measured in Functional Test)
VGS(Q)
1.4
1.8
2.2
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.6 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 240 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 2.4 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Characteristic
Off Characteristics (4)
On Characteristics -- Side A (Carrier)
On Characteristics -- Side B (Peaking)
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.freescale.com/rf/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
Each side of device measured separately.
(continued)
A2T23H300--24SR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Functional Tests (1,2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 750 mA, VGSB = 0.7 Vdc, Pout = 66 W Avg.,
f = 2300 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in
3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
14.0
14.9
17.0
dB
Drain Efficiency
D
43.0
46.7
—
%
PAR
7.2
7.8
—
dB
ACPR
—
--34.0
--31.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch (2) (In Freescale Doherty Test Fixture, 50 ohm system) IDQA = 750 mA, VGSB = 0.7 Vdc, f = 2350 MHz, 100 sec(on),
10% Duty Cycle
VSWR 5:1 at 32 Vdc, 417 W Pulsed CW Output Power
(3 dB Input Overdrive from 324 W Pulsed CW Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 750 mA, VGSB = 0.7 Vdc,
2300–2400 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
275
—
W
(3)
P3dB
—
410
—
W
AM/PM
(Maximum value measured at the P3dB compression point across
the 2300–2400 MHz frequency range)

—
–12.3
—

VBWres
—
90
—
MHz
Gain Flatness in 100 MHz Bandwidth @ Pout = 66 W Avg.
GF
—
0.3
—
dB
Gain Variation over Temperature
(--30C to +85C)
G
—
0.0075
—
dB/C
P1dB
—
0.0075
—
dB/C
Pout @ 3 dB Compression Point
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(--30C to +85C)
Table 5. Ordering Information
Device
A2T23H300--24SR6
Tape and Reel Information
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel
Package
NI--1230S--4L2L
1. Part internally matched both on input and output.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T23H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
3
VDDA
C9
VGGA
C12
C10
C1
C2
C11
R2
A2T23H300
Rev. 1
D66099
C13
C
Z1
C5* C6*
P
C14*
CUT OUT AREA
C4* C3*
R1
C15*
R3
C8
C7
C18
C16
C17
VDDB
C19
VGGB
*C3, C4, C5, C6, C14 and C15 are mounted vertically.
Figure 2. A2T23H300--24SR6 Test Circuit Component Layout
Table 6. A2T23H300--24SR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C8, C10, C12, C16, C18
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C2, C4, C5, C7, C11, C17
8.2 pF Chip Capacitors
ATC100B8R2CT500XT
ATC
C3
0.7 pF Chip Capacitor
ATC100B0R7CT500XT
ATC
C6
0.8 pF Chip Capacitor
ATC100B0R8CT500XT
ATC
C9, C19
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26
Multicomp
C13
0.6 pF Chip Capacitor
ATC00F0R6BT250XT
ATC
C14
5.6 pF Chip Capacitor
ATC100B5R6CT500XT
ATC
C15
6.8 pF Chip Capacitor
ATC100B6R8CT500XT
ATC
R1
50 , 10 W Termination
CW12010T0050GBK
ATC
R2, R3
3.0 , 1/4 W Chip Resistors
CRCW12063R0FKEA
Vishay
Z1
2300–2700 MHz Band, 90, 2 dB Hybrid Coupler
X3C25P1-02S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D66099
MTL
A2T23H300--24SR6
4
RF Device Data
Freescale Semiconductor, Inc.
15.5
Gps, POWER GAIN (dB)
15.4
15.3
48
47.5
47
D
15.2
48.5
46.5
Gps
15.1
15
PARC
14.9
–32
–1.6
–33
–1.8
–34
14.8
–35
ACPR
14.7
14.6
2290
2305
2320
–36
2335 2350 2365
f, FREQUENCY (MHz)
2380
2395
–2
–2.2
–2.4
PARC (dB)
VDD = 28 Vdc, Pout = 66 W (Avg.), IDQA = 750 mA, VGSB = 0.7 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
ACPR (dBc)
15.6
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS — 2300–2400 MHz
–2.6
–37
2410
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 66 Watts Avg.
0
VDD = 28 Vdc, Pout = 24 W (PEP), IDQA = 750 mA
VGSB = 0.7 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 2350 MHz
–15
–30
IM3--U
–45
IM3--L
IM5--L
IM7--L
–60
IM7--U IM5--U
–75
–90
1
10
300
100
TWO--TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
15
14.8
14.6
14.4
0
VDD = 28 Vdc, IDQA = 750 mA, VGSB = 0.7 Vdc
f = 2350 MHz, Single--Carrier W--CDMA
–1 dB = 48.25 W
ACPR
–1
–2
Gps
–3
–4
–5
15
D
35
–3 dB = 84.8 W
55
75
Pout, OUTPUT POWER (WATTS)
–30
50
–32
45
40
35
–2 dB = 65.3 W
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB
@ 0.01% Probability on CCDF
55
–34
–36
ACPR (dBc)
15.2
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
15.4
1
D DRAIN EFFICIENCY (%)
15.6
–38
30
–40
25
115
–42
PARC
95
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T23H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 2300–2400 MHz
15
2400 MHz
14
2350 MHz
2300 MHz
Gps
2300 MHz 50
2350 MHz
2400 MHz
40
ACPR
2400 MHz
13
11
30
20
2300 MHz 2350 MHz
12
1
0
D
10
0
400
100
10
Pout, OUTPUT POWER (WATTS) AVG.
–10
–20
–30
–40
ACPR (dBc)
16
Gps, POWER GAIN (dB)
60
VDD = 28 Vdc, IDQA = 750 mA, VGSB = 0.7 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel
Bandwidth, Input Signal PAR = 9.9 dB @
0.01% Probability on CCDF
D, DRAIN EFFICIENCY (%)
17
–50
–60
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
21
18
GAIN (dB)
15
Gain
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 750 mA
VGSB = 0.7 Vdc
12
9
6
3
2000
2100
2200
2300 2400 2500
f, FREQUENCY (MHz)
2600
2700
2800
Figure 7. Broadband Frequency Response
A2T23H300--24SR6
6
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 792 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
Zsource
()
Zin
()
2300
4.89 – j11.2
5.24 + j10.5
2350
8.32 – j12.4
7.67 + j11.4
2400
12.6 – j12.7
11.7 + j11.9
f
(MHz)
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.78 – j4.54
17.8
52.5
179
56.8
–14
1.75 – j4.50
17.9
52.5
179
56.8
–14
1.68 – j4.54
18.0
52.4
175
55.9
–14
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2300
4.89 – j11.2
5.24 + j11.4
1.72 – j4.83
15.6
53.3
213
57.0
–19
2350
8.32 – j12.4
8.12 + j12.7
1.68 – j4.82
15.6
53.2
211
56.3
–19
2400
12.6 – j12.7
13.2 + j13.5
1.65 – j4.81
15.8
53.2
208
55.8
–20
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Carrier Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQA = 792 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2300
4.89 – j11.2
4.97 + j11.1
4.10 – j2.52
20.6
50.1
103
67.1
–22
2350
8.32 – j12.4
7.36 + j12.4
3.57 – j2.19
20.7
50.0
99
66.9
–24
2400
12.6 – j12.7
11.6 + j13.0
3.31 – j2.28
20.9
49.9
97
66.2
–22
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.40 – j3.40
17.9
51.7
149
66.7
–28
7.51 + j13.2
3.07 – j3.11
18.1
51.6
145
66.3
–29
12.6 + j14.5
2.64 – j3.24
18.1
51.8
152
65.7
–28
f
(MHz)
Zsource
()
Zin
()
2300
4.89 – j11.2
4.88 + j11.6
2350
8.32 – j12.4
2400
12.6 – j12.7
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T23H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, VGSB = 1.7 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
2300
5.90 – j10.4
5.66 + j9.30
2350
10.2 – j11.1
8.59 + j9.73
2400
14.7 – j8.30
12.6 + j7.98
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1.81 – j5.44
17.1
54.7
293
53.9
–19
1.90 – j5.61
17.3
54.6
287
53.0
–20
1.98 – j5.78
17.4
54.4
277
51.8
–20
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2300
5.90 – j10.4
5.71 + j9.97
1.70 – j5.69
14.8
55.3
342
54.6
–24
2350
10.2 – j11.1
9.18 + j10.6
1.84 – j5.84
15.0
55.3
335
53.7
–25
2400
14.7 – j8.30
14.2 + j8.34
1.98 – j6.02
15.3
55.1
326
52.8
–25
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, VGSB = 1.7 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2300
5.90 – j10.4
5.97 + j9.73
4.06 – j5.24
19.2
53.2
209
63.8
–25
2350
10.2 – j11.1
9.06 + j10.3
4.47 – j4.20
19.7
52.6
181
62.8
–27
2400
14.7 – j8.30
13.0 + j8.08
3.78 – j4.57
19.4
53.1
202
61.4
–24
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.98 – j5.24
17.1
53.9
246
64.5
–32
9.64 + j10.8
4.23 – j4.68
17.4
53.7
233
64.0
–34
14.7 + j8.19
3.93 – j4.31
17.6
53.7
233
63.4
–34
f
(MHz)
Zsource
()
Zin
()
2300
5.90 – j10.4
5.91 + j10.3
2350
10.2 – j11.1
2400
14.7 – j8.30
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T23H300--24SR6
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2350 MHz
–1
49
E
–2
–3
50
50.5
–4
P
52.5
–5
–6
1
1.5
51
51.5
52
E
49.5
IMAGINARY ()
–2
IMAGINARY ()
–1
48.5
48.5
–3
64
3
2.5
3.5
4
REAL ()
P
4.5
5
5.5
–6
6
Figure 8. P1dB Load Pull Output Power Contours (dBm)
62
–4
–5
2
66
60
54
50
1
1.5
58
2
54
56
52
2.5
3
3.5
4
REAL ()
4.5
5
5.5
6
Figure 9. P1dB Load Pull Efficiency Contours (%)
–1
–1
21
–2
E
IMAGINARY ()
IMAGINARY ()
–2
20.5
–3
20
–4
P
18.5
–5
17.5
–6
1
1.5
19.5
19
–28
EE
–26
–3
–24
–22
–20
–18
–4
–16
PP
–5
18
2
–14
2.5
3
3.5
4
REAL ()
4.5
5
5.5
6
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
–6
1
1.5
2
2.5
3
3.5
4
REAL ()
4.5
5
5.5
6
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T23H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2350 MHz
0
0
49
–1
49.5
50
–2
IMAGINARY ()
IMAGINARY ()
–1
50.5
–3
EE
52.5
–4
51
51.5
52
–2
–3
–6
1
1.5
50
–5
2
2.5
3
3.5
REAL ()
4
–6
5
4.5
Figure 12. P3dB Load Pull Output Power Contours (dBm)
66
–4
53
PP
–5
E
E
54
64
PP
52
1
1.5
58
56
2
2.5
62
60
3
3.5
REAL ()
4
0
–1
–1
IMAGINARY ()
IMAGINARY ()
19
–3
18.5
EE
18
–4
–32
–2
–30
–3
EE
–6
15.5
15
1
1.5
16
2
16.5
2.5
3
3.5
REAL ()
–26
–24
–22
–20
PP
–5
17
–28
–4
17.5
PP
–5
5
Figure 13. P3dB Load Pull Efficiency Contours (%)
0
–2
4.5
–18
4
4.5
5
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–6
1
1.5
2
2.5
3
3.5
REAL ()
4
4.5
5
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T23H300--24SR6
10
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2350 MHz
–2
–2
48
50.5
–3
52.5
51
–4
IMAGINARY ()
IMAGINARY ()
–3
EE
54
52
53.5
–5
PP 54.5
51.5
EE
–5
–6
2
1
5
4
REAL ()
3
6
7
–7
8
50
56
58
3
6
5
4
REAL ()
7
8
Figure 17. P1dB Load Pull Efficiency Contours (%)
–2
–2
–3
–34
–32
–30
–3
IMAGINARY ()
20
–4
EE
–5
19.5
–28
–4
EE
–6
16.5
1
PP
2
–6
18.5
17.5
17
3
5
4
REAL ()
6
7
8
Figure 18. P1dB Load Pull Gain Contours (dB)
NOTE:
–7
1
–24
–20
–18
19
18
–26
–5
PP
–7
56
52 54
2
1
62
60
PP
Figure 16. P1dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
–4
53
–6
–7
46
2
–22
3
5
4
REAL ()
6
7
8
Figure 19. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T23H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2350 MHz
–2
–2
48
–3
53.5
–4
54
54.5
–5
53
54
56 58
58
60
62
51.5
52
52.5
IMAGINARY ()
IMAGINARY ()
–3
50
52
EE
–4
E
E
–5
55
PP
–6
58
PP
–6
56
–7
2
1
5
4
REAL ()
3
6
7
–7
8
–2
–2
–3
–3
18
–4
EE
–5
17.5
–7
1
15
2
3
5
4
REAL ()
6
8
–36
EE
–5
–34
PP
17
16
7
–38
–4
–6
16.5
15.5
14.5
6
5
4
REAL ()
–32
PP
–6
3
Figure 21. P3dB Load Pull Efficiency Contours (%)
IMAGINARY ()
IMAGINARY ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
2
1
7
8
Figure 22. P3dB Load Pull Gain Contours (dB)
NOTE:
–7
1
–26
–24
–22
2
3
–28
5
4
REAL ()
–30
6
7
8
Figure 23. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T23H300--24SR6
12
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T23H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
13
A2T23H300--24SR6
14
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 .s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
June 2015
Description
 Initial Release of Data Sheet
A2T23H300--24SR6
RF Device Data
Freescale Semiconductor, Inc.
15
How to Reach Us:
Home Page:
freescale.com
Web Support:
freescale.com/support
Information in this document is provided solely to enable system and software
implementers to use Freescale products. There are no express or implied copyright
licenses granted hereunder to design or fabricate any integrated circuits based on the
information in this document.
Freescale reserves the right to make changes without further notice to any products
herein. Freescale makes no warranty, representation, or guarantee regarding the
suitability of its products for any particular purpose, nor does Freescale assume any
liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation consequential or incidental
damages. “Typical” parameters that may be provided in Freescale data sheets and/or
specifications can and do vary in different applications, and actual performance may
vary over time. All operating parameters, including “typicals,” must be validated for
each customer application by customer’s technical experts. Freescale does not convey
any license under its patent rights nor the rights of others. Freescale sells products
pursuant to standard terms and conditions of sale, which can be found at the following
address: freescale.com/SalesTermsandConditions.
Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. Airfast is a trademark of Freescale Semiconductor, Inc. All
other product or service names are the property of their respective owners.
E 2015 Freescale Semiconductor, Inc.
A2T23H300--24SR6
Document Number: A2T23H300--24S
Rev. 0, 6/2015
16
RF Device Data
Freescale Semiconductor, Inc.