PIC18F4520 → PIC18F45K20 Migration DEVICE MIGRATIONS The PIC18F45K20 is a new device based on the PIC18F4520 family which offers many new features, including higher speed operation, lower power consumption, higher speed internal oscillator, output slew rate control and individual control of analog functionality on pins. This document is intended to describe the functional differences, configuration differences and the electrical specification differences that are present when migrating from one device to the next. Table 1 summarizes the features that may have migration impact on the software code developed for the PIC18F4520. Table 2 lists the new and modified features of the PIC18F45K20 that should not have any migration impact. The descriptions in the tables explain the differences in brief. The user should refer to the “PIC18F2XK20/4XK20 Data Sheet” (DS41303) for detailed explanation. TABLE 1: Note 1: The PIC18F45K20 is built with different electrical specifications to the PIC18F4520. You must verify your application can meet the new specifications. 2: The user should verify that the device crystal oscillator or resonator starts and performs as expected. Adjusting the loading capacitor values and/or the Oscillator mode may be required. 3: Throughout this document, the PIC18F45K20 refers to the family of controllers, PIC24K20/25K20/44K20/45K20/ 46K20/26K20 and the PIC18F4520 refers to the family of controllers, PIC18F2420/ 2520/4420/4520/4620 PIC18F4520 → PIC18F45K20 MIGRATION DIFFERENCES Functional Differences No. Difference H/W S/W Data Sheet Text ✔ Data Sheet Section 1 Max supply voltage of the PIC18F45K20 is 3.6 volts. 2 The access RAM bank has changed, previously it was split with the first 128 locations being from bank 0 and the last 128 bytes of bank 15, in the PIC18F45K20 the access RAM is now split with the first 96 bytes of bank 0 and the last 160 bytes of bank 15. 3 The “Auto-wake on start” feature of the EUSART is referred to as “Auto-wake on break” in the PIC18F45K20. 4 BAUDCON register is now referred to as BAUDCTL. 5 The PIC18F45K20 can operate up to 64 MHz at 3.6 volts where as the PIC18F4520 operated up to 40 MHz at 5 volts and 30.176 MHz at 3.6 volts. ✔ 26.1 6 The PIC18F45K20 operates down to 1.8 volts at 20 MHz compared to the PIC18F4520 which operated down to 2.0 volts at 4 MHz. ✔ 26.1 7 The internal oscillator now supports frequencies up to 16 MHz; this has caused changes to the frequencies selected by the IRCF bits in the OSCCON register where the 125 kHz internal oscillator frequency option is no longer available. © 2007 Microchip Technology Inc. 26.1 ✔ ✔ ✔ 5.3.2 ✔ 18.3.2 ✔ 18.2 2.0 DS41310A-page 1 TABLE 1: PIC18F4520 → PIC18F45K20 MIGRATION DIFFERENCES (CONTINUED) Functional Differences No. Difference H/W S/W Data Sheet Text Data Sheet Section 8 The PIC18F45K20 has an additional tuning bit in the OSCTUNE register. ✔ 2.5.2.1 9 The write block size of the PIC18F45K20 differs from the PIC18F4520. Program memory erase block size is consistent between the PIC18F4520 and the PIC18F45K20. See Table 3. ✔ 6.0 10 In the PIC18F45K20 analog channels can be individually enabled by an associated bit in the ANSEL and ANSELH registers. Previously with the PIC18F4520, analog channels could only be enabled in sequential groups. The bits SSPM<3:0> in ADCON1 are unimplemented in the PIC18F45K20. ✔ 10.7 11 The comparator is no longer controlled by the CMCON register and each comparator now has it’s own control register, CM1CON and CM2CON. The functionality of the bits has also changed. ✔ 20.2 12 In the PIC18F45K20, the selection between digital I/O and analog comparator or ADC input is now determined by the bit settings in the ANSEL and ANSELH registers. Whether a pin was a digital I/O or assigned to the comparator was previously determined by the CMCON register. ✔ 10.7 13 The PIC18F45K20 has separate interrupt flags, interrupt enables and priority bits for each comparator. The bits CMIP, CMIE and CMIF in the PIC18F4520 are now known as C1IP, C1IE and C1IF and relate to the comparator 1 interrupt. Comparator 2 has interrupt bits C2IP, C2IE and C2IF in the following registers: IPR2, PIR2 and PIE2. ✔ 20.4 Legend: H/W – Issues may exist with regard to the application circuit. S/W – Issues may exist with regard to the user program. Data Sheet Text – Issues may exist with regard to the data sheet. Data Sheet Section – Section of the PIC18F45K20 data sheet detailing the feature. DS41310A-page 2 © 2007 Microchip Technology Inc. TABLE 2: No. PIC18F4520 → PIC18F45K20 NEW FEATURES Feature Section 1 The RBPU bit is still the global weak pull-up enable and the WPUB register powers-up with all pull-ups enabled to preserve the functionality of the WPUA bit for legacy code. Where as the internal weak pull-up resistors on inputs were globally enabled or disabled on the PIC18F4520, the PIC18F45K20 has independent control of the weak pull-ups, where each pull-up has a control bit in the WPUB register. 10.3.1 2 Software selectable output slew rate. The slew rate for each port can be selected, in software, between standard slew rate and one tenth the standard rate for reduced electromagnetic emissions, through its associated bit in the SLRCON register. 10.8 3 The ADC in the PIC18F45K20 has an internal voltage reference on an ADC input channel. Examining the results of a conversion of this channel, the level of the device VDD can be calculated. 19.0 4 The comparator max input common mode voltage is VDD in the PIC18F45K20, making the comparator rail-to-rail input. 26.0 5 Software selectable EUSART transmit and receive polarity. In Asynchronous mode the polarity of the transmit data from the EUSART can be controlled in software by the CKTXP bit, where setting the bit high inverts the line. In Synchronous mode the CKTXP bit can be used to invert the clock polarity. Similarly, the DTRXP bit determines the polarity of the data receive line for asynchronous and synchronous reception. 18.1.1.3 18.1.2.3 18.4.1.2 18.4.1.4 6 The PIC18F45K20 has I2C™ slave address masking, which allows it to respond to multiple I2C slave addresses. 18.1.1.3 18.1.2.3 For legacy support, the SSPMSK register has the power-up value of 0xFF where the slave requires a complete match. When a bit is cleared in the SSPMSK register, that particular bit becomes a “don't care” in the address comparison. With 10-bit I2C addressing, the Least Significant 8 bits of the address are masked by the SSPMSK register. 7 Independent input multiplexing for comparator, where the Comparator inverting input can be assigned to one of a selection of input pins rather than fixed to a single pin. 20.1 8 The comparator positive input can be connected internally to a fixed 1.2 volt reference. 20.2 TABLE 3: WRITE BLOCK SIZES Device Write Block Size (bytes) Device Write Block Size (bytes) PIC18F24K20 32 PIC18F2420 64 PIC18F25K20 32 PIC18F2520 64 PIC18F26K20 64 PIC18F2620 64 PIC18F44K20 32 PIC18F4420 64 PIC18F45K20 32 PIC18F4520 64 PIC18F46K20 64 PIC18F4620 64 © 2007 Microchip Technology Inc. DS41310A-page 3 NOTES: DS41310A-page 4 © 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2007 Microchip Technology Inc. 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