NTD6416AN, NVD6416AN N-Channel Power MOSFET 100 V, 17 A, 81 mW Features • • • • • Low RDS(on) High Current Capability 100% Avalanche Tested NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(on) MAX ID MAX (Note 1) 100 V 81 mW @ 10 V 17 A D MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Drain−to−Source Voltage Gate−to−Source Voltage − Continuous Continuous Drain Current Steady State Power Dissipation Steady State Pulsed Drain Current TC = 25°C Symbol Value Unit VDSS 100 V VGS ±20 V ID 17 A TC = 100°C TC = 25°C tp = 10 ms Operating and Storage Temperature Range Source Current (Body Diode) N−Channel G S 11 4 PD 71 W IDM 62 A TJ, Tstg −55 to +175 °C 4 IS 17 A Single Pulse Drain−to−Source Avalanche Energy (VDD = 50 Vdc, VGS = 10 Vdc, IL(pk) = 17 A, L = 0.3 mH, RG = 25 W) EAS 43 mJ Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds TL 3 DPAK CASE 369AA STYLE 2 IPAK CASE 369D STYLE 2 MARKING DIAGRAM & PIN ASSIGNMENTS 4 Drain THERMAL RESISTANCE RATINGS Symbol Max Unit Junction−to−Case (Drain) Steady State RqJC 2.1 °C/W Junction−to−Ambient (Note 1) RqJA 40 1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [2 oz] including traces). 4 Drain AYWW 64 16ANG Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Parameter 2 3 °C 260 1 1 2 1 Gate 2 Drain AYWW 64 16ANG Parameter 3 Source 1 Gate 3 Source 2 Drain A Y WW 6416AN G = Assembly Location* = Year = Work Week = Device Code = Pb−Free Package * The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. ORDERING INFORMATION See detailed ordering and shipping information on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2014 September, 2014 − Rev. 3 1 Publication Order Number: NTD6416AN/D NTD6416AN, NVD6416AN ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 100 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current 112 IDSS VGS = 0 V, VDS = 100 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = "20 V VGS(TH) VGS = VDS, ID = 250 mA Gate−to−Source Leakage Current V mA ±100 nA 4.0 V ON CHARACTERISTICS (Note 3) Gate Threshold Voltage 2.0 Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On−Resistance RDS(on) VGS = 10 V, ID = 17 A 73 gFS VDS = 5 V, ID = 10 A 12 S 620 pF Forward Transconductance 7.7 mV/°C 81 mW CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 50 Total Gate Charge QG(TOT) 20 Threshold Gate Charge QG(TH) 1.0 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 10 Plateau Voltage VGP 5.8 V Gate Resistance RG 2.4 W td(on) 9.2 ns VGS = 0 V, f = 1.0 MHz, VDS = 25 V VGS = 10 V, VDS = 80 V, ID = 17 A 110 nC 3.6 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(off) VGS = 10 V, VDD = 80 V, ID = 17 A, RG = 6.1 W tf 22 24 20 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time trr Charge Time ta Discharge Time Reverse Recovery Charge tb VGS = 0 V, IS = 17 A TJ = 25°C 0.85 TJ = 125°C 0.7 56 VGS = 0 V, dIS/dt = 100 A/ms, IS = 17 A QRR 1.2 V ns 41 15 135 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTD6416AN, NVD6416AN TYPICAL CHARACTERISTICS 40 VDS w 10 V 7.5 V 35 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 40 10 V TJ = 25°C 6.5 V 30 6.0 V 20 5.5 V 10 5.0 V 30 25 20 15 10 TJ = 25°C TJ = 125°C 5 4.5 V 2 4 6 8 2 4 5 6 7 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = 17 A TJ = 25°C 0.10 0.09 0.08 0.07 0.06 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 8 0.25 VGS = 10 V TJ = 175°C 0.20 TJ = 125°C 0.15 0.10 TJ = 25°C 0.05 TJ = −55°C 0.00 8 10 12 14 16 20 18 ID, DRAIN CURRENT (A) Figure 3. On−Region versus Gate Voltage Figure 4. On−Resistance versus Drain Current and Gate Voltage 3 10000 VGS = 0 V ID = 17 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 3 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.11 2.5 TJ = −55°C 0 10 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 0 2 1.5 TJ = 150°C 1000 100 TJ = 125°C 1 0.5 −50 10 −25 0 25 50 75 100 125 150 175 10 20 30 40 50 60 70 80 90 100 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 NTD6416AN, NVD6416AN 10 TJ = 25°C VGS = 0 V 1000 C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) 1200 800 Ciss 600 400 200 Coss Crss 0 0 20 40 60 80 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 8 VDS 80 VGS Qgd Qgs 6 60 4 40 2 20 ID = 17 A TJ = 25°C 0 0 Figure 7. Capacitance Variation 5 10 15 Qg, TOTAL GATE CHARGE (nC) 0 20 Figure 8. Gate−to−Source Voltage and Drain−to−Source Voltage versus Total Charge 1000 20 IS, SOURCE CURRENT (A) VDS = 80 V ID = 17 A VGS = 10 V t, TIME (ns) 100 QT VDS, DRAIN−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS td(off) 100 tr tf 10 td(on) 1 1 10 RG, GATE RESISTANCE (W) TJ = 25°C VGS = 0 V 15 10 5 0 0.5 100 0.6 0.7 0.8 0.9 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation versus Gate Resistance 1.0 Figure 10. Diode Forward Voltage versus Current 1000 50 AVALANCHE ENERGY (mJ) ID, DRAIN CURRENT (A) ID = 17 A 100 10 ms 100 ms 10 VGS = 10 V SINGLE PULSE TC = 25°C 1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 1 ms 10 ms dc 10 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 40 30 20 10 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE 175 Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 4 NTD6416AN, NVD6416AN TYPICAL CHARACTERISTICS 10 R(t) (°C/W) 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 0.000001 0.00001 0.0001 0.001 0.01 t, PULSE TIME (s) 0.1 1 10 Figure 13. Thermal Response ORDERING INFORMATION Device Package Shipping† NTD6416ANT4G DPAK (Pb−Free) 2500 / Tape & Reel NTD6416AN−1G IPAK (Pb−Free) 75 Units / Rail NVD6416ANT4G* DPAK (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. *NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable. http://onsemi.com 5 NTD6416AN, NVD6416AN PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA ISSUE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C A A E b3 c2 B 4 L3 Z D 1 2 H DETAIL A 3 L4 b2 e c b 0.005 (0.13) M C H L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW 2.58 0.102 5.80 0.228 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z 3.00 0.118 1.60 0.063 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− NTD6416AN, NVD6416AN PACKAGE DIMENSIONS IPAK CASE 369D ISSUE C C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 −T− SEATING PLANE K J F H D G 3 PL 0.13 (0.005) M DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN T ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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