PDF User Guides

Evaluation Board User Guide
UG-074
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD9265/AD9255 Analog-to-Digital Converters
FEATURES
DOCUMENTS NEEDED
Full featured evaluation board for the AD9265/AD9255
SPI interface for setup and control
External, on-board oscillator or AD9517 clocking options
Balun/transformer or amplifier input drive options
LDO regulator or switching power supply options
VisualAnalog® and SPI controller software interfaces
AD9265 or AD9255 data sheet
HSC-ADC-EVALCZ data sheet
AN-905 Application Note, VisualAnalog Converter Evaluation
Tool Version 1.0 User Manual
AN-878 Application Note, High Speed ADC SPI Control Software
AN-877 Application Note, Interfacing to High Speed ADCs via SPI
AN-835 Application Note, Understanding High Speed ADC
Testing and Evaluation
EQUIPMENT NEEDED
Analog signal source and antialiasing filter
Sample clock source (if not using the on-board oscillator)
2 switching power supplies (6.0 V, 2.5 A) provided, CUI, Inc.,
EPS060250UH-PHP-SZ
PC running Windows® XP or Windows Vista
USB 2.0 port recommended (USB 1.1 compatible)
AD9265 or AD9255 evaluation board
HSC-ADC-EVALCZ FPGA-based data capture kit
SOFTWARE NEEDED
VisualAnalog
SPI controller
GENERAL DESCRIPTION
This user guide describes the AD9265 and AD9255 evaluation
board, which provides all of the support circuitry required to
operate the AD9265 or AD9255 in its various modes and
configurations. The application software used to interface with
the devices is also described.
The AD9265 and AD9255 data sheets provide additional
information and should be consulted when using the evaluation
board. All documents and software tools are available at
www.analog.com/fifo. For additional information or questions,
send an email to [email protected].
08699-001
EVALUATION BOARDS
Figure 1. AD9265 and AD9255 Evaluation Board and HSC-ADC-EVALCZ Data Capture Board
Please see the last page for an important warning and disclaimers.
Rev. 0 | Page 1 of 28
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Evaluation Board User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1 Input Signals...................................................................................3 Equipment Needed ........................................................................... 1 Output Signals ...............................................................................3 Software Needed ............................................................................... 1 Default Operation and Jumper Selection Settings ....................5 Documents Needed .......................................................................... 1 Evaluation Board Software Quick Start Procedures .....................7 General Description ......................................................................... 1 Configuring the Board .................................................................7 Evaluation Boards ............................................................................. 1 Using the Software for Testing.....................................................7 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ................................ 11 Evaluation Board Hardware ............................................................ 3 Ordering Information .................................................................... 24 Power Supplies .............................................................................. 3 Bill of Materials ........................................................................... 24 REVISION HISTORY
1/11—Revision 0: Initial Version
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Evaluation Board User Guide
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EVALUATION BOARD HARDWARE
The AD9265 and AD9255 evaluation board provides all of the
support circuitry required to operate these parts in their various
modes and configurations. Figure 2 shows the typical bench
characterization setup used to evaluate the ac performance of
the AD9265 or AD9255. It is critical that the signal sources used
for the analog input and clock have very low phase noise (<1 ps
rms jitter) to realize the optimum performance of the signal
chain. Proper filtering of the analog input signal to remove
harmonics and lower the integrated or broadband noise at the
input is necessary to achieve the specified noise performance.
See the Evaluation Board Software Quick Start Procedures section
to get started, and see Figure 15 to Figure 28 for the complete
schematics and layout diagrams. These diagrams demonstrate
the routing and grounding techniques that should be applied at
the system level when designing application boards using these
converters.
POWER SUPPLIES
This evaluation board comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. Connect
the supply to the rated 100 V ac to the 240 V ac wall outlet at
47 Hz to 63 Hz. The output from the supply is provided through
a 2.1 mm inner diameter jack that connects to the printed circuit
board (PCB) at P26. The 6 V supply is fused and conditioned
on the PCB before connecting to the low dropout linear regulators
(default configuration) that supply the proper bias to each of the
various sections on the board.
The evaluation board can be powered in a nondefault condition
using external bench power supplies. To do this, the P27, P28,
P31, P30, P32, and P29 jumpers can be removed to disconnect
the outputs from the on-board LDOs. This enables the user to
bias each section of the board individually. Use P8 and P9 to
connect a different supply for each section. A 1.8 V supply is
needed with a 1 A current capability for AVDD, SVDD, and
DRVDD; however, it is recommended that separate supplies be
used for both analog and digital domains. An additional supply
is also required to supply 1.8 V for digital support circuitry on
the board, 3V_DIG. This should also have a 1 A current capability
and can be combined with DRVDD with little or no degradation in
performance.
Two additional supplies, 5V_AVDD and 3V_AVDD, are used to
bias the optional input path amplifiers. If used, these supplies
should each have a 1 A current capability. P18 is also necessary if
an amp that requires a negative supply voltage is being used.
A second optional power supply configuration allows the
replacement of the LDOs that supply the AVDD and DRVDD
rails of the ADC with the ADP2108 step-down dc-to-dc converter.
Using this switching controller in place of the LDO regulators
to power the AVDD and DRVDD supplies of the ADC allows
customers to evaluate the performance of the ADC when
powered by a more efficient regulator.
INPUT SIGNALS
When connecting the clock and analog source, use clean signal
generators with low phase noise, such as the Rohde & Schwarz
SMA100A, HP 8644B signal generators, or an equivalent. Use a
1 m shielded, RG-58, 50 Ω coaxial cable for connecting to the
evaluation board. Enter the desired frequency and amplitude (see
the Specifications section in the data sheet of the respective part).
When connecting the analog input source, use of a multipole,
narrow-band, band-pass filter with 50 Ω terminations is
recommended. Analog Devices, Inc., uses TTE and K&L
Microwave, Inc., band-pass filters. The filters should be
connected directly to the evaluation board.
If an external clock source is used, it should also be supplied
with a clean signal generator as previously specified. Typically,
most Analog Devices evaluation boards can accept ~2.8 V p-p or
13 dBm sine wave input for the clock.
OUTPUT SIGNALS
The default setup uses the Analog Devices high speed converter
evaluation platform (HSC-ADC-EVALCZ) for data capture. The
CMOS output signals are buffered through U2 and are routed
through P2 to the FPGA on the data capture board.
Rev. 0 | Page 3 of 28
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Evaluation Board User Guide
WALL OUTLET
100V AC TO 240V AC
47Hz TO 63Hz
SWITCHING
POWER
SUPPLY
SWITCHING
POWER
SUPPLY
SIGNAL
SYNTHESIZER
6V DC
2A MAX
6V DC
2A MAX
ANALOG INPUT
OPTIONAL CLOCK SOURCE
Figure 2. Evaluation Board Connection
Rev. 0 | Page 4 of 28
08699-002
SIGNAL
SYNTHESIZER
PC
RUNNING ADC
ANALYZER
OR VISUAL ANALOG
USER SOFTWARE
Evaluation Board User Guide
UG-074
To use the programmable reference mode, a resistor divider can
be set up by installing R50 and R51. The jumper on P5 should
be removed for this mode of operation. See the data sheet of the
part for additional information on using the programmable
reference mode.
DEFAULT OPERATION AND JUMPER SELECTION
SETTINGS
This section explains the default and optional settings or modes
allowed on the AD9265/AD9255 Rev. A evaluation board.
Power Circuitry
RBIAS
Connect the switching power supply that is supplied in the
evaluation kit between P26 and a rated 100 V ac to 240 V ac
wall outlet at 47 Hz to 63 Hz.
RBIAS has a default setting of 10 kΩ (R68) to ground and is
used to set the ADC core bias current. Note that using a resistor
value other than a 10 kΩ, 1% resistor for RBIAS may degrade
the performance of the device.
Analog Input
The inputs on the evaluation board are set up for a double baluncoupled analog input with a 50 Ω impedance. For the AD9265/
AD9255, the default analog input configuration supports analog
input frequencies of up to ~250 MHz (see Figure 3). This input
network is optimized to support a wide frequency band. See the
AD9265 and AD9255 data sheets for additional information on
the recommended networks for different input frequency ranges.
Clock Circuitry
The AD9265/AD9255 board is set by default to use an external
clock generator. An external clock source capable of driving a
50 Ω terminated input should be connected to J6. This board is
shipped from Valpey Fisher with a low phase noise oscillator
installed. The oscillator frequency is set to match the rated speed of
the part: 125 MHz, 105 MHz, or 80 MHz for the AD9265/AD9255.
To enable the oscillator, install P6, and to connect it into the
clock path, add a 0 Ω resistor at C70. R25 should also be removed
to remove the 50 Ω termination from the output of the oscillator.
Optionally, the analog input on the board can be configured to
use the ADL5562, which is a 3.3 GHz ultralow distortion RF/IF
differential amplifier. The ADL5562 component is included on
the evaluation board at U1. However, the path into and out of the
ADL5562 can be configured in many different ways depending
on the application; therefore, the parts in the input and output
path are left unpopulated. Users should see the ADL5562 data
sheet for additional information on this part and for configuring
the inputs and outputs. The ADL5562 is normally held in powerdown mode and can be enabled by adding a jumper on P19.
The ADL5562 can also be substituted with the ADA4937-1 or
the ADA4938-1 to allow evaluation of these parts with the
ADC.
A differential LVPECL clock driver output can also be used to
clock the ADC input using the AD9517-4 (U601). To place the
AD9517-4 into the clock path, populate R28 and R29 with 0 Ω
resistors and remove R30 and R31 to disconnect the default clock
path inputs. In addition, populate R85A and R86A with 0 Ω
resistors and remove R85 and R86 to disconnect the default
clock path outputs and insert the AD9517-4 OUT0 LVPECL. The
AD9517-4 must be configured through the SPI controller software
to set up the PLL and other operation modes. Consult the
AD9517-4 data sheet for more information about these and
other options.
VREF
VREF is set by default to 1.0 V with SENSE connected to AGND
through a jumper connecting Pin 2 and Pin 3 on Header P5.
This causes the ADC to operate with the internal reference in
the 2.0 V p-p differential full-scale range. The reference voltage
can be changed to 0.5 V for a 1.0 V p-p full-scale range by
moving the SENSE pin jumper connection on P5 from Pin 2
and Pin 3 to Pin 1 and Pin 2 (this connects the SENSE pin to
the VREF pin).
PDWN
To enable the power-down feature, add a shorting jumper across
P7 at Pin 1 and Pin 2 to connect the PDWN pin to DRVDD.
OEB
To disable the outputs using the OEB pin, add a shorting jumper
across P3 at Pin 1 and Pin 2 to connect the OEB pin to DRVDD.
10pF
0.1µF
0.1µF
10Ω
10Ω
2V p-p
VIN+
33Ω
S
S
P
10pF
0.1µF
33Ω
ADC
0.1µF
10Ω
10Ω
VIN–
10pF
Figure 3. Default Analog Input Configuration of the AD9265/AD9255
Rev. 0 | Page 5 of 28
VCM
08699-003
PA
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Evaluation Board User Guide
Non-SPI Mode
Switching Power Supply
For users who want to operate the device under test (DUT) without
using SPI, remove the shorting jumpers on P4. This disconnects
the CSB, SCLK/DFS, and SDIO/DCS pins from the SPI control
bus and connects CSB to SVDD, allowing the DUT to operate in
non-SPI mode. In this mode, the SCLK/DFS and SDIO/DCS pins
take on their alternate functions to select the data format and
enable/disable the DCS. With the SDIO/DCS jumper removed,
DCS is disabled; to enable DCS, add a shorting jumper on P4
between Pin 2 and Pin 3. With the SCLK/DFS jumper removed,
the data format is set to offset binary. To set the data format to twos
complement, a jumper should be added on P4 between Pin 5
and Pin 6.
Optionally, the ADC on the board can be configured to use the
ADP2108 dual switching power supply to provide power to the
DRVDD and AVDD rails of the ADC. To configure the board
to operate from the ADP2108, the following changes must be
incorporated (see the Evaluation Board Schematics and Artwork
and Bill of Materials sections for specific recommendations for
part values):
1.
2.
3.
4.
Install L2 and L3.
Install C77, C79, C80, and C81.
Install E2, E3, and E11.
Remove P31 and E5.
Making these changes enables the switching converter to power
the ADC. Using the switching converter as the ADC power source
is more efficient than using the default LDOs.
Rev. 0 | Page 6 of 28
Evaluation Board User Guide
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EVALUATION BOARD SOFTWARE QUICK START PROCEDURES
This section provides quick start procedures for using the AD9265
and AD9255 evaluation board. Both the default and optional
settings are described.
CONFIGURING THE BOARD
2.
3.
4.
5.
6.
7.
Connect the evaluation board to the data capture board,
as shown in Figure 1 and Figure 2.
Connect one 6 V, 2.5 A switching power supply (such as
the CUI, Inc., EPS060250UH-PHP-SZ supplied) to the
AD9265 or AD9255 board.
Connect one 6 V, 2.5 A switching power supply (such
as the CUI EPS060250UH-PHP-SZ supplied) to the
HSC-ADC-EVALCZ board.
Connect the HSC-ADC-EVALCZ board (at J6) to the PC
with a USB cable.
On the ADC evaluation board, confirm that three jumpers
are installed on P4, one between Pin 1 and Pin 2, one between
Pin 4 and Pin 5, and one between Pin 8 and Pin 9, to connect
the SPI bus to the DUT.
Make sure a low jitter sample clock is applied at J6.
On the ADC evaluation board, use a clean signal generator
with low phase noise to provide an input signal. Use a 1 m,
shielded, RG-58, 50 Ω coaxial cable to connect the signal
generator. For best results, use a narrow-band, band-pass
filter with 50 Ω terminations and an appropriate center
frequency. (Analog Devices uses TTE, Allen Avionics, and
K&L Microwave band-pass filters.)
Figure 4. VisualAnalog – New Canvas Window
2.
Figure 5. VisualAnalog Default Configuration Message
3.
USING THE SOFTWARE FOR TESTING
Setting Up the ADC Data Capture
After configuring the board, set up the ADC data capture using
the following steps:
Open VisualAnalog on the connected PC. The appropriate
part type should be listed in the status bar of the
VisualAnalog – New Canvas window. Select the template
that corresponds to the type of testing to be performed
(see Figure 4 where the AD9265 is shown as an example).
To change features to settings other than the default settings,
click the Expand Display button, located on the bottom
right corner of the window, to see what is shown in Figure 7.
Detailed instructions for changing the features and capture
settings can be found in the AN-905 Application Note,
VisualAnalog Converter Evaluation Tool Version 1.0 User
Manual. After the changes are made to the capture settings,
click Collapse Display (see Figure 7).
08699-006
1.
After the template is selected, a message appears asking if
the default configuration can be used to program the FPGA
(see Figure 5). Click Yes and the window closes.
08699-005
1.
08699-004
Before using the software for testing, configure the evaluation
board as follows:
Figure 6. VisualAnalog Window Toolbar, Collapsed Display
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Evaluation Board User Guide
08699-007
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Figure 7. VisualAnalog, Main Window
Setting Up the SPI Controller Software
Open the SPIController software by going to the Start menu
or by double-clicking the SPIController software desktop
icon. If prompted for a configuration file, select the appropriate
one. If not, check the title bar of the window to determine
which configuration is loaded. If necessary, choose Cfg
Open from the File menu and select the appropriate file
based on your part type. Note that the CHIP ID(1) field
should be filled to indicate whether the correct
SPIController configuration file is loaded (see Figure 8).
Figure 9. SPIController, New DUT Button
3.
In the ADCBase 0 tab of the SPIController window, find the
CLOCK DIVIDE(B) box (see Figure 10). If using the clock
divider, use the drop-down box to select the correct clock
divide ratio, if necessary. See the appropriate part data sheet;
the AN-878 Application Note, High Speed ADC SPI Control
Software; and the AN-877 Application Note, Interfacing to
High Speed ADCs via SPI, for additional information.
08699-008
1.
08699-009
After the ADC data capture board setup is complete, set up the
SPIController software using the following procedure:
Figure 8. SPIController, CHIP ID(1) Box
Click the New DUT button in the SPIController window
(see Figure 9).
08699-010
2.
Figure 10. SPIController, CLOCK DIVIDE(B) Box
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Evaluation Board User Guide
Note that other settings can be changed on the ADCBase 0
tab (see Figure 10). See the appropriate part data sheet; the
AN-878 Application Note, High Speed ADC SPI Control
Software; and the AN-877 Application Note, Interfacing to
High Speed ADCs via SPI, for additional information on the
available settings.
Adjusting the Amplitude of the Input Signal
The next step is to adjust the amplitude of the input signal
as follows:
1.
Adjust the amplitude of the input signal so that the
fundamental is at the desired level. (Examine the Fund Power
reading in the left panel of the Graph - AD9265 Average FFT
window, see Figure 13.)
08699-011
4.
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Figure 11. SPIController, Example ADCBase 0 Page
Click the Run button in the VisualAnalog toolbar
(see Figure 12).
08699-013
5.
Figure 13. Graph Window of VisualAnalog
08699-012
2.
Click the disk icon within the Graph window to save the
performance plot data as a .csv formatted file. See Figure 14
for an example.
0
Figure 12. Run Button (Encircled in Red) in VisualAnalog Toolbar, Collapsed
Display
125MSPS
70.1MHz @ –1dBFS
SNR = 76.5dB (77.5dBFS)
SFDR = 88.0dBc
–20
AMPLITUDE (dBFS)
–40
–60
THIRD HARMONIC
SECOND HARMONIC
–80
–100
–140
0
10
20
30
40
FREQUENCY (MHz)
50
Figure 14. Typical FFT, AD9265/AD9255
Rev. 0 | Page 9 of 28
60
08699-014
–120
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Evaluation Board User Guide
Troubleshooting Tips
If the FFT plot appears abnormal, do the following:
•
•
If you see a normal noise floor when you disconnect the
signal generator from the analog input, be sure you are not
overdriving the ADC. Reduce the input level, if necessary.
In VisualAnalog (see Figure 7), click the Settings button
in the Input Formatter block. Check that Number Format
is set to the correct encoding (offset binary by default).
Repeat for the other channel.
If the FFT appears normal but the performance is poor, check
the following:
•
•
•
•
Make sure an appropriate filter is used on the analog input.
Make sure the signal generators for the clock and the
analog input are clean (low phase noise).
Change the analog input frequency slightly if noncoherent
sampling is being used.
Make sure the SPI config file matches the product being
evaluated.
If the FFT window remains blank after clicking Run, do the
following:
•
•
•
Make sure the evaluation board is securely connected to
the HSC-ADC-EVALCZ board.
Make sure the FPGA has been programmed by verifying
that the DONE LED is illuminated on the HSC-ADCEVALCZ board. If this LED is not illuminated, make sure
the U4 switch on the board is in the correct position for
USB CONFIG.
Make sure the correct FPGA program was installed by
selecting the Settings button in the ADC Data Capture
block in VisualAnalog (see Figure 7). Then select the
FPGA tab and verify that the proper FPGA bin file is
selected for the part.
If VisualAnalog indicates that the FIFO Capture timed out
(via a pop-up window), do the following:
1.
2.
Rev. 0 | Page 10 of 28
Make sure all power and USB connections are secure.
Probe the DCO signal at P25 (Pin 2) on the evaluation
board and confirm that a clock signal is present at the
ADC sampling rate.
Evaluation Board User Guide
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EVALUATION BOARD SCHEMATICS AND ARTWORK
08699-015
Figure 15. Board Power Input and Supply Circuits
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Evaluation Board User Guide
08699-016
Figure 16. DUT and Related Circuits
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SPI CIRCUITRY
08699-017
Figure 17. SPI Interface Circuit
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Evaluation Board User Guide
08699-018
Figure 18. Analog Input Circuits
Rev. 0 | Page 14 of 28
1
Rev. 0 | Page 15 of 28
1
2 3 4 5
J7
DNI
2 3 4 5
J6
GND
1
GND
Figure 19. Default Clock Path Input Circuits
GND
DNI
49.9
GND
C30
0.1UF
C18
2
GND
DNI
0.1UF
XTAL_IN
49.9
R12
VCC
4
TRISTATE CTRL
R25
1.00K
R7
CLOC K INPU T
TSW-102-08-G-S
1
2
OUT
3
125MHZ
Y1
C70
GND
DNI
0.1UF
BALU N CLOC K CIRCUITR Y
4
1
4
2
3 T1 6
ADT1-1WT+
3
PRI
DNI
1
SEC
5
T9
MABA-007159-000000
XTAL_IN
0.1UF
P6
GND
MABA-007159-000000
3V_CLK
R48
0
DNI
T5
C16
DNI
100
R72
0.1UF
GND
TP5
DNI
GND
GND
DNI
R29
0
CLKIN-
GND
R31
0
R30
0
CLKIN+
R28
0
WHT
TP6
1 BLK
1
C27
SEC
PRI
0.1UF
C6
GND
DNI
24.9
R17
DNI
24.9
R93
1
3
CR1
2
HSMS-2812BLK
R86
0
R85
0
DNI
R86A
0
DNI
R85A
0
C22
0.1UF
C23
CLKOUT-
CLKOUT+
0.1UF
CLK-
CLK+
Evaluation Board User Guide
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08699-019
R73
100
DNI
DNI
R60 5
1.00 K
R623
BYPASS_LD
O
CP
1800PF
C605
0
200
R62 5
GND
GND
2 3 4 5
1
0
R60 8
C62 2
.22U F
GND
DNI
DNI
R63 3
57. 6
DNI
0.1U F
C62 0
FIFO_SD I
R60 9 FIFO_SCLK
1.00 K
0.1U F
13
16
14
17
7
18
12
11
9517_CLK
C621
8
LF
GND
9
BYPASS_LD
O
3V_CLK
J60 2
AD9517_PWDNBU
F
R60 7
1.00 K
AD9517_CS
B
R60 6
1.00 K
3V_CLK
0.1U F
C60 2
0.1UF
C606
CHARGE PUMP FILTER
CLKIN+
R60 4
1.00 K
6
100
40
21
10
9517_CLK
CS_ N
SDI O
SCL K
RESET_ N
SYNC_ N
PD_ N
CL K
CLK_ N
LF
BYPAS S
REFIN_N_REF
2
REFIN_REF 1
REF_SE L
VS_LVPECL
24
25
30
LF
GN D
PAD
PAD
VS
31
3V_CLK
RSE T
VCP
3
GND
1
C611
0.1U F
C61 2
0.1U F
GND
0.1U F
0.1U F
C61 8
0.1U F
C61 7
0.1U F
C61 6
C61 5
0.1U F
C61 0
C61 4
R611
0.1U F
3V_CLK
100
TP60 5
WHT
WHT
GND
GND
TP60 4
GND
R64 0
5.11K
0.1U F
0.1U F
C60 9
C60 8
TP60 3
PECL_OUT1
PECL_OUT1_
N
WHT
FIFO_SDO
CP
1
TP60 2
TP60 1
WHT
AD9517-4BCPZ
15
20
22
23
35
34
33
32
26
27
28
29
19
39
38
41
42
5
4
2
46
1
44
U601
1
WHT
0.1U F
C61 3
SDO
OUT4_OUT4
A
OUT4_N_OUT4
B
OUT5_OUT5
A
OUT5_N_OUT5
B
OUT6_OUT6
A
OUT6_N_OUT6
B
OUT7_OUT7
A
OUT7_N_OUT7
B
OUT3_ N
OUT 3
OUT2_ N
OUT 2
OUT 1
OUT1_ N
OUT0_ N
OUT 0
STATU S
CP
LD
CPRSE T
REFMO N
36
37
43
45
3V_CL K
48
47
R627
R610
4.12K
1
1
C601
C607
0
R62 9
GND
C61 9
C62 3
GND
DNI
DNI
GND
DNI
C60 3
0.1U F
DNI
C60 4
0.1U F
0.1U F
0.1U F
200
R61 6
200
4
NC7WZ16P6X
Y2
Y1 6
U60 3
3V_CLK
C62 4
PECL_OUT1_
N
GND
2
GND
VCC
5
R61 4
A2
A1
PECL_OUT1
3
1
0.1U F
5
PRI
4
DNI
T601
1
SEC
3
CLKOUT-
CLKOUT+
A
C
CR60 1
SML-LXT0805IW-T
R
MABA-007159-00000
0
200
R63 0
GND
DNI
0.1U F
C66 0
GND
GND
GND
5 4 3 2
1
DNI J60 3
57.6
CLKIN-
1500PF
200
200
DNI
PECL/CML/LVD S CLK CIRCUITR Y
0
R638
R639
Rev. 0 | Page 16 of 28
R626
Figure 20. Optional AD9517 Clock Input Circuit
.033UF
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Evaluation Board User Guide
08699-020
R651
P25
P15
DNI
Rev. 0 | Page 17 of 28
Figure 21. Output Buffer Circuits
DNI
2
1
OR
D1 5
D1 4
D1 3
D1 2
D11
D1 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DC O
GN D
22
1 RN108
3 RN106
22
1 RN5 8
22
OR_O
22
1 RN9 8
22
4 RN9 5
22
3 RN9 6
2 RN9 7 22
22
22
4 RN5 5
22
3 RN5 6
22
2 RN5 7
2 RN10
7
22
22
3 RN4 6
22
2 RN4 7
22
1 RN4 8
22
4 RN105
RN4
4
5
22
R49
0
TP7
BLK
GN D
GN D
GN D
GN D
3
1
A2
A1
0.1UF
C32
2
GN D
4
249
R55
GN D
NC7WZ16P6X
Y2
Y1 6
U7
3V_AVDD
VC C
5
GN D
O9
I11
I12
I13
I14
I15
I16
I17
I18
I19
O1 0
A
56 OE2_N
29 OE3_N
28 OE4_N
CR2
C
O1 9
O1 8
O1 7
O1 6
O1 5
O1 4
O1 3
O1 2
O11
O8
O6
O7
O5
O4
O3
O2
O1
O0
I10
GN D
VC C
I3
I4
I5
I6
I7
I8
I9
1 OE1_N
30
31
40
38
37
36
34
33
41
49
48
47
45
44
43
42
51
55 I0
54 I1
52 I2
V_DIG
SML-LXT0805IW-TR
OTR LED CIRCUIT
R40
10K
R53
22
R71
10K
4
10K
R27
11
R26
50
35
22
18
2
7
GN D
GN D
25
32
39
46
53
OUTPUT BUFFERS
DCO_O
D0_O
D1_O
D2_O
D3_O
D4_O
D5_O
D6_O
D7_O
D8_O
D9_O
D10_O
D11_O
D12_O
D13_O
D14_O
D15_O
OR_O
74VCX162827MTDX
23
24
26
27
21
20
10
12
13
14
15
16
17
19
U2
2
3
5
6
8
9
C11
0.1UF
C10
0.1UF
C29
0.1UF
C31
0.1UF
GN D
08699-021
1
Evaluation Board User Guide
UG-074
Figure 22. Capture Board Connector
DCO_ O
D15_ O
D13_ O
D11_ O
D9_ O
D7_ O
D5_ O
D1_ O
D3_ O
FIFO_FPGA_SD
O
FIFO_FPGA_CS
B
AD9517_CSB
FIFO_CSB
P2
6469169-1
A10
A2
A3
A4
A5
A6
A7
A8
A9
A1
6469169-1
A10
A2
A3
A4
A5
A6
A7
A8
A9
P1
PLUG HEADER
PLUG HEADER
OR_ O
D14_ O
D12_ O
D10_ O
D8_ O
D6_ O
D2_ O
D4_ O
D0_ O
P1
P2
6469169-1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C1
6469169-1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C1
PLUG HEADER
PLUG HEADER
FIFO_SDO
FIFO_FPGA_SD
I
FIFO_FPGA_SCL
K
FIFO_SCLK
FIFO_SD I
P1
P2
6469169-1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B1
6469169-1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B1
PLUG HEADER
PLUG HEADER
P1
P2
6469169-1
D10
D2
D3
D4
D5
D6
D7
D8
D9
D1
6469169-1
D10
D2
D3
D4
D5
D6
D7
D8
D9
D1
PLUG HEADER
PLUG HEADER
P1
P2
GN D 6469169-1
BG1 0
BG1
BG2
BG3
BG4
BG5
BG6
BG7
BG8
BG9
GN D 6469169-1
BG1 0
BG1
BG2
BG3
BG4
BG5
BG6
BG7
BG8
BG9
PLUG HEADER
PLUG HEADER
Rev. 0 | Page 18 of 28
P2
6469169-1
DG1 0
GN D
P1
6469169-1
DG1
DG2
DG3
DG4
DG5
DG6
DG7
DG8
DG9
GN D
DG1 0
DG1
DG2
DG3
DG4
DG5
DG6
DG7
DG8
DG9
PLUG HEADER
PLUG HEADER
A1
UG-074
Evaluation Board User Guide
08699-022
UG-074
08699-023
Evaluation Board User Guide
Figure 23. Top Side
Rev. 0 | Page 19 of 28
Evaluation Board User Guide
08699-024
UG-074
Figure 24. Ground Plane (Layer 2)
Rev. 0 | Page 20 of 28
UG-074
08699-025
Evaluation Board User Guide
Figure 25. Power Plane (Layer 3)
Rev. 0 | Page 21 of 28
Evaluation Board User Guide
08699-026
UG-074
08699-027
Figure 26. Power Plane (Layer 4)
Figure 27. Ground Plane (Layer 5)
Rev. 0 | Page 22 of 28
UG-074
08699-028
Evaluation Board User Guide
Figure 28. Bottom Side
Rev. 0 | Page 23 of 28
UG-074
Evaluation Board User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 1. AD9265/AD9255 BOM
Item No.
1
2
Qty
1
3
Reference Designator
Not applicable
C2, C4, C15
3
46
4
3
C3, C5, C8, C10, C11, C12,
C14, C16, C18, C22, C23,
C27, C29, C31, C32, C33,
C34, C38, C40, C42, C43,
C45, C46, C47, C48, C60,
C61, C66, C71, C78, C96,
C601, C602, C608, C609,
C610, C611, C612, C613,
C614, C615, C616, C617,
C618, C619, C621
C39, C41, C74
5
8
C53, C54, C62, C64, C65,
C67, C68, C69
6
1
C605
7
1
C606
8
1
C607
9
1
C622
10
9
11
12
2
3
C7, C9, C55, C56, C57,
C58, C59, C63, C84
C72, C73
C75, C82, C83
13
1
CR1
14
15
2
4
CR2, CR601
CR3, CR4, CR5, CR6
16
1
CR7
17
1
DUT
18
9
19
1
E1, E4, E5, E6, E7, E8, E9,
E10, E12
F1
20
1
FL1
21
4
J1, J3, J6, J9
22
23
2
2
JP5, JP8
P1, P2
Description
Printed circuit board
Ceramic capacitor, multilayer,
NP0, 0402, 10 pF
Ceramic capacitor, 0402, 0.1 μF
Manufacturer/Part No.
Ceramic capacitor, mono,
0402, 1 μF
Capacitor, 0603, X5R, 4.7 μF
Murata/GRM155R60J105KE19D
Ceramic capacitor, multilayer,
X7R, 0402, 1800 pF
Ceramic capacitor, 0.033 μF,
C0402
Ceramic capacitor, 0402,
1500 pF
Ceramic capacitor, 0.22 μF,
C0402
Ceramic capacitor,
monolithic, 10 μF, C0805
Capacitor, 0603, X5R, 10 μF
Ceramic capacitor, multilayer,
X7R, 0402, 0.01 μF
Diode Schottky, dual series,
SOT23
LED, red, surface mount
Diode, recovery rectifier,
DO214AA3
LED, green, surface mount,
LED0603
Analog-to-digital converter
Panasonic/ECJ-0EB1E182K
Inductor ferrite bead,
100 MHz, L0805
Fuse polyswitch, PTC device
1812, 1.1 A,
FTYCOMINISMDC110F
Filter noise suppression, LC
combined type
Conn-PCB, SMA ST, edge
mount, CNSAMTECSMA-JPXST-EM1-MKT
3-pin solder jumper, JPRSLD03
Conn PCB,60-pin RA connector,
CNTYCO1469169-1
Rev. 0 | Page 24 of 28
Phycomp (Yageo)/CC0402JRNP09BN100
Panasonic/ECJ-0EX1C104K
Panasonic/ECJ-1VB0J475M
Panasonic/0402YD333KAT2A
Panasonic/ECJ-0EB1H152K
Panasonic/ECJ-0EB0J224K
Murata/GRM21BR61C106KE15L
Panasonic/ECJ-1VB0J106M
Panasonic/ECJ-0EB1E103K
Avago/HSMS-2812BLK
Lumex/SML-LXT0805IW-TR
Micro Commercial Components Corp/S2A-TP
Panasonic/LNJ308G8TRA
Analog Devices/AD9265BCPZ-80, AD9265BCPZ-105,
AD9265BCPZ-125, AD9255BCPZ-80, AD9255BCPZ-105, or
AD9255BCPZ-125 per build instructions
Panasonic/EXC-ML20A390U
Tyco Electronics/MINISMDC110F-2
Murata/BNX016-01
Samtec/SMA-J-P-X-ST-EM1
Not applicable
Tyco/6469169-1
Evaluation Board User Guide
Item No.
24
Qty
1
Reference Designator
P26
25
13
26
1
P3, P6, P7, P11, P12, P14, P18,
P19, P27, P28, P29, P31, P32
P4
27
3
P5, P10, P30
28
2
P8, P9
29
22
30
31
4
15
32
4
R1, R6, R10, R11, R30, R31,
R46, R47, R48, R52, R53, R77,
R79, R81, R83, R85, R86,
R608, R623, R627, R629, JP4
R13, R14, R15, R16
R26, R27, R35, R36, R37, R38,
R39, R40, R43, R57, R58, R59,
R68, R69, R70
R3, R8, R22, R23
33
2
R25, R33
34
2
R49, R71
35
2
R55, R67
36
1
R610
37
1
R611
38
4
R614, R616, R625, R630
39
40
2
3
R626, R640
R64, R65, R66
41
9
42
1
R7, R61, R62, R63, R604,
R605, R606, R607, R609
R74
43
1
R75
44
4
RN4, RN5, RN9, RN10
45
46
3
1
T2, T3, T9
U1
47
1
U2
48
1
U3
49
1
U4
50
3
U5, U7, U603
UG-074
Description
Conn-PCB power jack surface
mount, CN-2MM-PWR-JACK
Conn-PCB header, 2-position,
CNSAMTEC1X2H330LD36
Conn-PCB header,
ST male, 9-position,
CNSAMTEC3X3H338LD36
Conn-PCB Berg header,
ST male, 3-position,
CNBERG1X3H205LD36
Conn-PCB header, 6-position,
CNWIELAND5313625
Resistor film, SMD, 0402, 0 Ω
Manufacturer/Part No.
CUI/PJ-002AH-SMT
Resistor film, SMD, 0402, 33 Ω
Resistor, precision, thick film
chip, R0402, 10 kΩ
Panasonic/ERJ-2GEJ330X
Panasonic/ERJ-2RKF1002X
Resistor, precision, thick film
chip, R0402, 10 Ω
Resistor, precision, thick film
chip, R0603, 49.9 Ω
Resistor, precision, thick film
chip, R0402, 22 Ω
Resistor, precision, thick film
chip, R0603, 249 Ω
Resistor, precision, thick film
chip, R0402, 4.12 kΩ
Resistor, precision, thick film
chip, R0402, 5.11 kΩ
Resistor, precision, thick film
chip, R0402, 200 Ω
Resistor, film, SMD 0402, 100 Ω
Resistor, precision, thick film
chip, R0402, 100 kΩ
Resistor, precision, thick film
chip, R0402, 1.00 kΩ
Resistor, precision, thick film
chip, R0402, 147 kΩ
Resistor, precision, thick film
chip, R0402, 28 kΩ
Resistor network, 8-pin/4
resistor surface mount,
RESNET742-4, 22 Ω
XFMR RF 1:1, ETC1
IC, 2.6 GHz, ultralow distortion,
differential IF/RF amplifier,
QFN16_3X3_PAD1_5X1_5
IC-TTL low volt 20-bit buffer,
TSSOP56
IC TinyLogic UHS dual buffer,
SC70
IC, low dropout CMOS, lin reg,
SO8NB-PAD3_1X2_41
IC TinyLogic UHS dual buffer,
SC70
Panasonic/ERJ-2RKF10R0X
Rev. 0 | Page 25 of 28
Samtec/TSW-102-08-G-S
Samtec/TSW-103-08-G-T
Samtec/TSW-103-08-G-S
Wieland/Z5.531.3625.0
Panasonic/ERJ-2GE0R00X
Panasonic/ERJ-3EKF49R9V
Panasonic/ERJ-2RKF22R0X
Panasonic/ERJ-3EKF2490V
Panasonic/ERJ-2RKF4121X
Panasonic/ERJ-2RKF5111X
Panasonic/ERJ-2RKF2000X
Venkel/CR0402-16W-1000FPT
Panasonic/ERJ-2RKF1003X
Panasonic/ERJ-2RKF1001X
Panasonic/ERJ-2RKF1473X
Panasonic/ERJ-2RKF2802X
CTS/742C083220JCT
M/A-COM/MABA-007159-000000
Analog Devices/ADL5562_PRELIM
Fairchild/74VCX162827MTDX
Fairchild/NC7WZ07P6X
Analog Devices/ADP1706ARDZ-3.3-R7
Fairchild/NC7WZ16P6X
UG-074
Evaluation Board User Guide
Item No.
51
Qty
1
Reference Designator
U6
52
1
U601
53
1
U8
54
2
U9, U10
551
C1
561
C13
571
581
591
601
C49, C50
C6, C25, C30, C51, C52, C70,
C97, C603, C604, C620,
C623, C624, C660
C77, C79, C80, C81
E2, E3, E11
611
J2, J7, J602, J603
621
631
L1, L5, L6
L2, L3
641
651
L8, L9
P15, P16, P17, P25
661
R4, R12, R94, R95
671
R17, R18, R19, R93
681
R20, R21
691
701
R28, R29, R32, R34, R41, R42,
R78, R80, R82, R84, R85A,
R86A, R96, JP1, JP25
R44, R45, R638, R639
711
721
731
741
R5, R72, R73
R50, R51
R54, R56
R633, R651
751
R76
Description
IC compact, 600 mA, 3 MHz,
step-down dc-to-dc
converter, 5-lead TSOT
IC, 12-output clock gen
with int 1.6 GHz VCO,
QFN48_7X7_PAD5_1X5_1
IC, low dropout CMOS, lin reg,
SO8NB-PAD3_1X2_41
IC, low dropout CMOS, lin reg,
SO8NB-PAD3_1X2_41
Capacitor, chip, mono,
ceramic, C0G, 0402, 2.2 pF
Capacitor, chip, mono,
ceramic, C0G, 0402, 100 pF
Ceramic capacitor, 1000 pF
Ceramic capacitor, 0402, 0.1 μF
Manufacturer/Part No.
Analog Devices/ADP2108AUJZ-1.8-R7
Capacitor, 0603, X5R, 10 μF
Inductor ferrite bead,
100 MHz, L0805
Conn-PCB, SMA ST edge
mount, CNSAMTECSMA-JPXST-EM1-MKT
Chip inductor, 15 nH, L7144
Inductor, SMT power, 2.2 μH,
LSMSQ79H57
Chip inductor, 36 nH, L7144
Conn-PCB header, 2-position,
CNSAMTEC1X2H330LD36
Resistor, precision, thick film
chip, R0603, 49.9 Ω
Resistor, precision, thick film
chip, R0402, 24.9 Ω
Resistor, precision, thick film
chip, R0402, 1.00 kΩ
Resistor, film, SMD, 0402, 0 Ω
Panasonic/ECJ-1VB0J106M
Panasonic/EXC-ML20A390U
Resistor, precision, thick film
chip, R0402, 200 Ω
Resistor, film, SMD, 0402, 100 Ω
Do not install (TBD_R0402)
Resistor, film, SMD, 0603, 0 Ω
Resistor, precision, thick film
chip, R0402, 57.6 Ω
Resistor, precision, thick film
chip, R0402, 100 kΩ
Panasonic/ERJ-2RKF2000X
Rev. 0 | Page 26 of 28
Analog Devices/AD9517-4BCPZ
Analog Devices/ADP1708ARDZ-R7
Analog Devices/ADP1706ARDZ-1.8-R7
Murata/GJM1555C1H2R2WB01
Murata/GRM1555C1H101JD01D
Panasonic/ECU-E1E102KBQ
Panasonic/ECJ-0EX1C104K
Samtec/SMA-J-P-X-ST-EM1
Coilcraft/0603CS-15NXGLU
Coilcraft/EPL2014-222MLB
Coilcraft/0603CS-36NXGLU
Samtec/TSW-102-08-G-S
Panasonic/ERJ-3EKF49R9V
Panasonic/ERJ-2RKF24R9X
Panasonic/ERJ-2RKF1001X
Panasonic/ERJ-2GE0R00X
Venkel/CR0402-16W-1000FT
Multicomp/MC0603WG00000T5E-TC
Panasonic/ERJ-2RKF57R6X
Panasonic/ERJ-2RKF1003X
Evaluation Board User Guide
Item No.
761
771
781
791
Qty
801
811
1
UG-074
Reference Designator
T1
T4, T5, T601
T6
TP1, TP2, TP3, TP6, TP7,
TP10, TP11
TP4, TP5, TP9, TP19, TP601,
TP602, TP603, TP604, TP605
Description
XFMR RF, MINICD542
XFMR RF 1:1, ETC1
XFMR RF, MINICD542
Conn-PCB, test point black,
CNLOOPTP
Conn-PCB, test point white,
CNLOOPTP
Manufacturer/Part No.
Mini-Circuits/ADT1-1WT+
M/A-COM/MABA-007159-000000
Mini-Circuits/ADT1-1WT+
Components Corp/TP-104-01-00
Y1
IC clock OSC ACMOS/LSTTL
compatible, 125 MHz,
XTALCB3LV_H90
Valpey Fisher/VFAC3HL-125MHZ
Do not insert.
Rev. 0 | Page 27 of 28
Components Corp/TP-104-01-09
UG-074
Evaluation Board User Guide
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG08699-0-1/11(0)
Rev. 0 | Page 28 of 28