ADRF6720-27-EVALZ User Guide UG-742 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADRF6720-27 Wideband Quadrature Modulator with Integrated Fractional-N PLL and VCOs phase-locked loop (PLL), and four low phase noise multicore voltage controlled oscillators (VCOs). FEATURES Full featured evaluation board for the ADRF6720-27 On-board USB for SPI control 3.3 V operation C# software interface for serial port control The ADRF6720-27 local oscillator (LO) signal can be generated internally via the on-chip integer-N and fractional-N synthesizers, or externally via a high frequency, low phase noise LO signal. The internal integrated synthesizer enables LO coverage from 356.25 MHz to 2855 MHz using the multicore VCOs. In the case of internal LO generation or external LO input, quadrature signals are generated with a divide by 2 phase splitter. When the ADRF6720-27 is operated with an external 1 × LO input, a polyphase filter generates the quadrature inputs to the mixer. EVALUATION KIT CONTENTS ADRF6720-27-EVALZ evaluation board USB cable ADDITIONAL EQUIPMENT NEEDED Analog signal sources and signal analyzer Power supplies (5 V/1 A) PC running Windows 98 , Windows 2000, Windows ME, Windows XP, Windows Vista, or Windows 7 USB 2.0 port, recommended (USB 1.1 compatible) The ADRF6720-27 offers digital programmability for carrier feedthrough optimization, sideband suppression, HD3/IP3 optimization, and high-side or low-side LO injection. The ADRF6720-27 is fabricated using an advanced silicongermanium BiCMOS process. It is available in a 40-lead, RoHScompliant, 6 mm × 6 mm LFCSP package with an exposed pad. The ADRF6720-27-EVALZ evaluation board provides all of the support circuitry required to operate the ADRF6720-27 in its various configurations, as well as the application software used to interface with the device. SOFTWARE NEEDED ADRF6720-27 evaluation software (available for download from the ADRF6720-27-EVALZ product page) GENERAL DESCRIPTION The ADRF6720-27 is a wideband quadrature modulator with an integrated synthesizer ideally suited for 3G and 4G communication systems. The ADRF6720-27 consists of a high linearity broadband modulator, an integrated fractional-N Full specifications on the ADRF6720-27 are available in the product data sheet, which should be consulted in conjunction with this user guide when using the evaluation board. EVALUATION BOARD PHOTOGRAPH AND FUNCTIONAL BLOCK DIAGRAM VPOS 40 3 I– 4 30 26 LO NULLING DAC Q– 8 9 MUXOUT 17 ADRF6720-27 24 RFOUT 18 LOOUT+ 19 LOOUT– 15 CS SCLK SDIO ÷2 LOCK_DET VPTAT 1 0° 90° ÷1,÷2,÷4 PFD ÷2 39 POLYPHASE FILTER N = INT+ FRAC MOD SERIAL PORT INTERFACE ÷2 ×1 ×2 LDO 2.5V CHARGE PUMP 21 7 10 16 20 23 25 29 37 38 36 32 33 34 CP LOIN– LOIN+ LDO VCO 5 VTUNE 2 GND Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. ENBL PHASE CORRECTION ÷8 NIC 27 V2I ÷4 REFIN 6 11 PHASE CORRECTION LO NULLING DAC Q+ 22 V2I Rev. 0 | Page 1 of 12 14 13 31 DECL3 28 DECL2 12 DECL1 12530-001 I+ 35 UG-742 ADRF6720-27-EVALZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Baseband Inputs ............................................................................3 Evaluation Kit Contents ................................................................... 1 LO Input/Output ...........................................................................3 Additional Equipment Needed ....................................................... 1 RF (Modulator) Output ................................................................3 Software Needed ............................................................................... 1 Evaluation Board Control Software ................................................4 General Description ......................................................................... 1 Installing Evaluation Software and Driver ....................................4 Evaluation Board Photograph and Functional Block Diagram....... 1 Using ADRF6720-27 Evaluation Software .................................4 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ...................................8 Evaluation Board Hardware ............................................................ 3 Ordering Information .................................................................... 11 Introduction .................................................................................. 3 Bill of Materials ........................................................................... 11 Power Supply ................................................................................. 3 REVISION HISTORY 10/14—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADRF6720-27-EVALZ User Guide UG-742 EVALUATION BOARD HARDWARE synthesizer. In either case, the differential LO signal can be routed off chip to the LO_OUT+ and LO_OUT− SMA connectors. INTRODUCTION The ADRF6720-27-EVALZ evaluation board provides all of the support circuitry required to operate the ADRF6720-27 in its various modes and configurations. Figure 2 shows the typical measurement setup used to evaluate the performance of the ADRF6720-27. For internal LO configuration using the on-chip fractional-N synthesizer, apply a low phase noise reference signal to the REF_IN connector. The PLL reference input supports a wide frequency range because the divide or multiplication blocks can be used to increase or decrease the reference frequency to the desired value before it is passed to the phase frequency detector (PFD). The integrated synthesizer enables continuous LO coverage from 356.25 MHz to 2855 MHz. POWER SUPPLY The ADRF6720-27-EVALZ evaluation board requires a 3.3 V power supply. Connect the 3.3 V power terminals as shown in Figure 2. For optimum performance using an external LO source, drive the LO inputs LO_IN− and LO_IN+ differentially. The ADRF6720-27-EVALZ evaluation board integrates footprints for both the Mini-Circuits TC1-1-43A+ balun and the Johanson 2500BL14M050T to satisfy the wide input frequency range of the external LO inputs. The inputs must be ac-coupled, unless an ac-coupled balun or transformer is used to generate the differential LO. The input impedance of the differential LO signals is 50 Ω. BASEBAND INPUTS Drive the baseband inputs (I+, I−, Q+, and Q−) from a differential source. Place a shunt 100 Ω external resistor across the I and Q inputs to match the differential 100 Ω impedance interface. The nominal drive level used in the evaluation of the ADRF6720-27 is 1 V p-p differential (or 500 mV p-p on each pin). All the baseband inputs must be externally dc biased at 2.68 V. LO INPUT/OUTPUT RF (MODULATOR) OUTPUT The ADRF6720-27 offers two alternatives for generating the differential LO input signal: externally via a high frequency low phase noise LO signal or internally via the on-chip fractional-N The RF output is available at the RF_OUT SMA connector, which can drive a 50 Ω load. DIFFERENTIAL LO INPUT FOR EXTERNAL LO PLL REF INPUT FOR INTERNAL LO AMP OUTPUT I+ I– PLL REF INPUT RF OUTPUT Q– DAC OR BB GENERATOR Q+ 3.3V PWR GND USB PC CONTROL DIFFERENTIAL LO OUTPUT Figure 2. ADRF6720-27 Typical Measurement Setup Rev. 0 | Page 3 of 12 12530-002 BASEBAND INPUTS UG-742 ADRF6720-27-EVALZ User Guide EVALUATION BOARD CONTROL SOFTWARE The ADRF6720-27-EVALZ evaluation board is configured with a USB friendly interface to allow programmability of the ADRF6720-27 registers. INSTALLING EVALUATION SOFTWARE AND DRIVER The following instructions describe how to install the ADRF6720-27 control software, as well as the Cypress generic USB driver, onto a Windows® PC running either a 32-bit or 64-bit operating system. Install the necessary software before plugging the USB cable to the PC. (The following instructions are specific for Windows XP, Windows Vista, and Windows 7. However, the software is also compatible with Windows 98, Windows 2000, and Windows ME.) 1. 2. 3. 4. 5. Double-click the ADRF6720-27_Control_SW_Rev0_0_3.zip file to extract the file. Run the ADRF6720-27_Rev0_0_3_install.exe file from the extracted .zip file. An icon should appear on your desktop with the Analog Devices, Inc., logo titled ADRF6720-27_Rev0_0_3. When the installer is finished, install the USB driver. Plug the RFG USB adapter into the PC using a USB cable. In Windows XP, right click My Computer and go to Properties > Device Manager. Then click the Hardware tab and Device Manager. In Windows Vista, right-click My Computer and click Device Manager. In Windows 7, click Device Manager. In Device Manager, click the last category, Universal Serial Bus Controllers, and look for an entry that either has a yellow flag on it (for unknown device) or is labeled ADF4xxx USB Driver (if you have installed the previous ADRF6x0x or Analog Devices Limerick PLL software). Right-click this device and click update driver. Browse to select where to extract the ADRF6720-27_Control_SW_Rev0_0_3.zip file. Click Next to complete the driver installation. In Windows 7, install the USB signed driver. Run ADI_RFG_Drivers_Win7.exe in the attached .zip file. Windows 7 then recognizes the Cypress USB driver as a signed driver. USING ADRF6720-27 EVALUATION SOFTWARE The ADRF6720-27 evaluation software offers a block diagram view of how the registers affect the major functional blocks of the ADRF6720-27. Figure 3 shows the main window of the evaluation software. Table 1 shows the functionality of the software main window. Before reading or writing to the registers, validate the USB connection by reading the USB indicators at the lower left corner of the software. The DUT to GUI button reads the register values from the device and updates the user interface. An automatic write to the chip is initiated every time a register value is changed from the user interface. The PLL synthesizer blocks provide behind the scenes calculations; the user only needs to specify the PLL reference and desired LO frequency, and the software calculates and sets the INT, FRAC, and MOD values accordingly. The green boxes require user input while the yellow boxes are read only. The Engineering tab, shown in Figure 4, allows specific reads and writes to the individual registers. The address and data fields must be input in decimal format. Rev. 0 | Page 4 of 12 ADRF6720-27-EVALZ User Guide UG-742 A I1 LO LEAKAGE NULLING G SIDEBAND SUPPRESSION NULLING I2 I3 J H OPTIMIZE THE LINEARITY(HD3,OIP3,..) INPUT PLL REFERENCE F3 F4 E PFD FREQ : AUTOMATICALLY CALCULATED F7 K F6 INPUT DESIRED LO FREQUENCY F2 F1 F5 SYNTH VALUES: AUTOMATICALLY CALCULATED L VCO FREQ : AUTOMATICALLY CALCULATED D 12530-003 C B Figure 3. Main Window of the ADRF6720-27 Evaluation Software Table 1. Evaluation Software Main Window Functionality Label A B C D E F1 to F7 G H Function Shows the software version. Shows FX2 USB device found, connected when the USB driver is installed and the USB block works correctly. DUT to GUI button. Set automatically according to Label E selection. External LO: check MOD_EN and uncheck VCO_LDO_EN, CP_EN, REF_BUF_EN, and VCO_EN. The user can choose to enable all. Internal LO: click Enable All to enable all blocks related to the internal LO. Sets LO path. External LO: select 1XLO Path_EXT_1X_LO for Polyphase Filter Path in quadrature LO generation; select 2XLO Path_EXT_2X_LO with 2× External LO for Div 2 Phase Splitter Path in quadrature LO generation. Internal LO: select 2XLO Path_INT_2X_VCO for Div 2 Phase Splitter Path in quadrature LO generation; select 1XLO Path_INT_1X_VCO for Polyphase Filter Path in quadrature LO generation. Internal LO related. F1: sets frequency and step size; press the Enter key to update. F2: VCO_SEL and VCO frequency (VCO Freq (MHz)) are set automatically by setting F1. The VCO frequency is 2× the LO frequency. F3: sets the PLL reference input and divider; ensures PFD frequency at the 11.4 MHz to 40 MHz (can be locked above 40 MHz). F4: used to optimize internal LO but not usually necessary to tune. F5: used to optimize spur performance. F6: select POLARITY as NEG. F7: fine tune control of the VTUNE temperature profile. Set VTUNE_DAC_SLOPE to 10 and VTUNE_DAC_OFFSET to 180. Set tunable balun over a frequency band (see Table 2). Set POLi and POLq to control setting for desired signal at upper side or lower side to LO. POLi = POLq: low-side LO injection when Q leads I. POLi ≠ POLq: high-side LO injection when Q leads I. Rev. 0 | Page 5 of 12 UG-742 Label I1 to I3 J K L ADRF6720-27-EVALZ User Guide Function LO leakage, sideband suppression, linearity optimization. I1: DCOFFI, DCOFFQ: control setting for LO leakage nulling. I2: I_LO, Q_LO: control setting for sideband suppression nulling. I3: MOD_RDAC, MOD_CDAC: optimize the linearity (harmonics, IMD) performance. Selects LO output path. LO_DRV1X_EN: enables the 1 × LO output path (after the quadrature divider) and enables LO output driver. LO_DRV2X_EN: enables the 2 × LO output path (before the quadrature divider) and enables LO output driver. DRVDIV2_EN: selects either 2× or 1× the frequency of the LO on the 2 × LO output path. ENOP Pin Ctrl: enable/disable individual blocks. Programmable resistors for VCO LDO; set VCO_LDO_R4SEL(3) to 3 and VCO_LDO_R2SEL(10) to 10. Table 2. Balun Settings BAL_CIN 0 1 2 3 4 8 9 10 11 12 13 14 15 15 15 15 15 BAL_COUT 0 0 0 0 0 0 0 0 0 0 0 0 0 3 8 11 15 Frequency Range (MHz) fRF > 1730 1550 < fRF < 1730 1380 < fRF < 1550 1250 < fRF < 1380 1170 < fRF < 1250 1100 < fRF < 1170 1020 < fRF < 1100 970 < fRF < 1020 930 < fRF < 970 890 < fRF < 930 840 < fRF < 890 820 < fRF < 840 780 < fRF < 820 730 < fRF < 780 680 < fRF < 730 630 < fRF < 680 fRF < 630 Rev. 0 | Page 6 of 12 UG-742 12530-004 ADRF6720-27-EVALZ User Guide Figure 4. Engineering Tab of the ADRF6720-27 Evaluation Software Rev. 0 | Page 7 of 12 UG-742 ADRF6720-27-EVALZ User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK VCC _TCXO RED DNI R37 3P3V_F 0 0402 Y2 6 VC C C 36 0. 1UF C6 0. 1UF 4 OUTPUT NC GN D 1 3 38. 4MEGHZ AGND C9 100PF AGN D DNI AGND REF_IN 0 TYCO1- 1478979- 0 R11 AGND C77 3. 3PF DNI C 83 20PF DNI C89 3. 3PF DNI R3 R 33 0 0 1 AGND C 78 2PF DNI C 84 2PF DNI C90 6PF DNI CP 0 C91 3. 3PF DNI AGN D AGND C A SML- 210MTT86 1 2 3 4 5 6 7 8 9 10 R 24 0 AGND 3 P3V_F C1 0. 1UF C2 100PF U1 AGND C 57 2700PF AGND AGND MUXOU T GND I+ IGND VPOS1 GND QQ+ GND ADRF6720- 27ACPZ AGND QJ OHNSON142- 0701- 851 1 AGN D C41 3. 3PF DNI 0 30 29 28 27 26 25 24 23 22 21 AGND AGN D AGN D 0 C26 100PF C56 10UF VCC_RF C 50 10UF AGND AGN D C75 2PF DNI C 81 2PF DNI AGND C76 3. 3PF DNI AGND C 82 20PF DNI AGN D R 17 0 C88 3. 3PF DNI AGN D C43 10UF C1206 R61 10K R62 49. 9 SLI DER AREA FOR 0. 5PF CAP @2GHZ C3 10UF AGN D C8 0. 1UF C0402 AGND C 11 100PF C0402 AGN D C 73 AGND 1 1 CS C 74 R 18 0 R0402 6 SEC PRI 3 SDI O SCLK LO_OU TJ OHNSON142- 0701- 851 1 DNI T3 100PF C0402 100PF C0402 DNI R 38 0 R0402 R82 0 R0402 DNI T4 3 4 2500BL14M050T 5 4 3 2 1 VCC_RF AGN D UN BAL_IN AMP_OUT J OHNSON142- 0701- 851 C 47 1 22PF C0402 5 4 3 2 AGN D R 39 3P3V_F 1 5 4 3 2 AGN D 3P3V_F RED 3P3V_F C54 10UF C 55 10UF C49 10UF C 34 10UF AGND AGN D AGND AGN D 1 BAL_OUT2 GND _DC _FEED_R FGN D GND NC _6 2 5 6 DNI AGN D Figure 5. ADRF6720-27-EVALZ Evaluation Board Schematic Rev. 0 | Page 8 of 12 15NH L7144 0 0402 AGN D BAL_OUT1 L8 DNI LO_OU T+ J OHNSON142- 0701- 851 1 TC1- 1- 43A+ AT224- 1 C45 22PF C0603 VC C_RF RED AGN D 4 C 44 10000PF C0603 RFIN C 42 0. 5PF 0 R0402 AGND SLI DER AREA FOR 1. 5PF CAP U2 @2GHZ 3 RFOU T GND 2 4 ADL5320ARKZ C46 SOT- 89 1. 5PF AGN D AGN D 3P3V_F 0 RF_OUT J OHNSON142- 0701- 851 AGND 09- 03- 201- 02 AGN D DNI R2 0 2 3 4 5 C22 0. 1UF AGND 1 5 4 3 2 VPOS_AMP RED 1 3 2 VC C_LO RED R 35 R7 100 1 R 81 Q+ J OHNSON142- 0701- 851 1 AGN D C87 6PF DNI R 40 R0402 0 R 25 0 R0402 DNI 3P3V_F R55 0 C 19 100PF AGND AGN D AGN D C30 0. 1UF AGN D C 29 0. 1UF AGND AGN D C 27 100PF AGND C10 100PF AGND 2 100PF DNI C7 0. 1UF VT C60 1500PF C59 2700PF C 31 3P3V_F 0 1 DNI VCC_RF VPOS6 GND D ECL2 ENBL VPOS5 GND R FOUT GND VPOS4 NIC AGND 2 3 4 5 820 AGND C3 3 0. 1UF ENBL C86 3. 3PF DNI R6 R26 5. 6 VTU NE_T RED DNI C 58 0. 1UF AGND C 80 20PF DNI R1 1 3P3V_F S1 AGN D R23 R 12 300 10UF C28 0. 1UF C 32 100PF 11 12 13 14 15 16 17 18 19 20 AGN D CP C 24 VCC _VCO RED C 25 100PF AGN D R 22 0 C23 0. 1UF C0402 AGND R 20 PAD VPOS8 R EFIN GN D GN D CP VPOS7 L OIN + L OIN VTUNE D ECL3 C 85 20PF DNI AGN D AGND CUSTOMER BRD 20KHZ LOOP FILTER CONFIGURATION VT PAD 40 39 38 37 36 35 34 33 32 31 0 C79 3. 3PF DNI AGND 2 3 4 5 AGND CR 1 5 4 3 2 1 DNI 0 R 36 R 15 R0402 DNI AGND LO_IN J OHNSON142- 0701- 851 1 DNI R 77 0 1 VPOS2 DECL1 SD IO SC LK CS GND VPOS3 LOOUT+ LOOUTGND R4 R 32 R0402 DNI 5 4 3 2 C 18 C0402 DNI AGND AGND R27 2K IJ OHNSON142- 0701- 851 1 C 17 C0402 DNI BAL_OUT2 GND _DC _FEED_R FGND GN D N C_6 2 5 6 DNI C5 100PF MU XOU T_TP YEL R21 R5 100 C16 C0402 DNI LO_IN + J OHNSON142- 0701- 851 1 0 C 21 100PF C0402 AGND 2 3 4 5 0 R0402 AGND UN BAL_IN AGND AGN D C 40 0 R0402 R0402 4 C4 0. 1UF R13 2500BL14M050T BAL_OUT1 3 3P3V_F DNI 0 R0402 T2 AGN D I+ J OHNSON142- 0701- 851 1 4 R 34 TC1- 1- 43A+ AT224- 1 100PF C0402 1000PF R 30 49. 9 PRI 3 C 15 C12 R 19 1 2 3 4 5 AGND T1 6 SEC 100PF C0402 AGND AGND 0 R0402 1 C14 R 16 0 DNI 0 0402 AGND R43 1 GN D1 BLK AGN D 1 GND 2 BLK AGN D 1 GN D3 BLK AGND 1 GN D4 BLK AGN D 12530-005 1 R14 3P3V_F ADRF6720-27-EVALZ User Guide UG-742 3V3_USB 5V_USB U3 ADP3334ACPZ 7 8 IN1 OUT1 IN2 OUT2 6 SD_N FB PAD GND PAD 5 R56 C51 2K 1UF C52 1 1000PF R58 C63 140K 1UF 2 FB 3 XTALI N R57 Y1 78. 7K XTALOUT DGND DGND 10PF C67 1 C66 10PF C69 6 7 DGND R63 DGND SCL SDA 5 55 DPLUS DMINUS IFCLK CLKOUT CTL0_FLAGA CTL1_FLAGB IN SCL 15 IN SDA 16 CTL2_FLAGC SCL PA0_INT0_N SDA PA1_INT1_N PA2_SLOE R64 R66 100K IN PA3_WU2 100K 5 42 RESETN PA4_FIFOADR0 XTALIN PA5_FIFOADR1 RESET_N PA6_PKTEND PA7_FLAGD_SLCS_N PB0_FD0 IN 44 WAKEUP 14 C38 0. 1UF PB2_FD2 RESERVED PB3_FD3 PB4_FD4 0. 1UF PB5_FD5 1 2 DGND 3V3_USB PB1_FD1 WAKEUP C39 DECOUPLING FOR U1 PB6_FD6 RDY0_SLRD PB7_FD7 RDY1_SLWR PD0_FD8 DGND PD1_FD9 PD2_FD10 PD3_FD11 PD4_FD12 C64 PD5_FD13 0. 1UF PD6_FD14 6 R60 DGND AGND 0 PAD GND AGND DGND PD7_FD15 PAD 56 C62 0. 1UF 53 C53 0. 1UF 41 C37 0. 1UF 28 C35 0. 1UF 26 C48 0. 1UF 12 C20 0. 1UF 1 P4 24LC64- I - SN DGND 5V_USB 4 XTALOUT DGND P3 U6 VCC AVCC WC_N GND 4 43 32 A2 27 2K A1 11 3 U5 17 8 VCC A0 7 2 22PF DGND 0. 1UF 3 1 C70 4 DGND DGND 2K 2 22PF C68 DGND 0. 1UF R59 3 CASE 10 A C SML- 210MTT86 24. 000000MEGHZ C65 D1 DGND 8 DM 9 13 54 29 30 31 I FCLK O UT CLKOUT O UT CTL0_FLAGA O UT O UT CTL1_FLAGB CTL2_FLAGC 35 38 39 19 O UT 20 21 22 PA5 O UT PA6 23 24 25 45 46 47 48 49 50 51 52 O UT O UT O UT O UT O UT O UT O UT O UT O UT O UT O UT PA1 G4 PA2 TSW- 105- 08- G- D PLACEHOLDER 897- 43- 005- 00- 100001 R9 CSB PA7 0 PB0 PB1 R28 SDI O PB2 0 PB3 PB4 R31 PB5 PB6 SCLK 0 PB7 PD0 R8 PD1 PD2 CR2 2K A C SML- 210MTT86 R67 DGND PD3 1K DNI C71 330PF DNI R78 1K DNI C13 330PF DNI R79 C72 1K 330PF DNI DNI PD4 O UT PD5 O UT PD6 O UT PD7 DGND CY7C68013A- 56LTXC J EDEC_TYPE=QFN56_8X8_PAD5_2X4_5 DGND Figure 6. USB Interface Circuitry on the ADRF6720-27-EVALZ Evaluation Board Rev. 0 | Page 9 of 12 9 DGND DNI E013815 DGND 8 10 DGND DGND OUT O UT PA0 G3 GN D PIN S PA4 O UT O UT 7 G2 PA3 40 18 6 G1 O UT O UT 5 5 O UT O UT 4 3 4 34 37 3 2 DP O UT 33 36 2 1 12530-006 IO ADRF6720-27-EVALZ User Guide 12530-007 UG-742 12530-008 Figure 7. ADRF6720-27-EVALZ Evaluation Board Top Figure 8. ADRF6720-27-EVALZ Evaluation Board Bottom Rev. 0 | Page 10 of 12 ADRF6720-27-EVALZ User Guide UG-742 ORDERING INFORMATION BILL OF MATERIALS Table 3. Qty 1 3 4 Reference Designator Not applicable 3P3V_F, VCC_TCXO, VPOS_AMP GND1 to GND4 Connector PCB test point black 1 MUXOUT_TP Connector PCB test point yellow 1 8 1 2 1 1 1 1 P4 I+, I−, Q+, Q−, LO_IN+, RF_OUT, AMP_OUT, LO_OUT+ REF_IN C1, C4, C6 to C8, C20, C22, C23, C28 to C30, C33, C35 to C39, C48, C53, C62, C64, C66, C68 C2, C5, C9 to C11, C14, C15, C19, C21, C25 to C27, C31, C32, C73, C74 C12 C3, C24, C50, C56 C34, C49, C54, C55 C42 C43 C44 C45, C69, C70 C46 C47 C51, C63 C52 C57, C59 C58 C60 C65, C67 L8 R1 to R4, R6, R9, C40, R13, R14, R17 to R21, R28, R31, R33 to R36, R39, R40, R55, R60 R12 R22, R24 R23 R26 R27 R30 2 4 1 1 1 1 2 1 R5, R7 R8, R56, R59, R63 R57 R58 R61 R62 R64, R66 S1 1 23 16 1 4 4 1 1 1 3 1 1 2 1 2 1 1 2 1 24 Description PCB (see Table 4) Connector PCB test point red Part Number 08-20_a03333c TP-104-01-02 Connector PCB RECEPT mini-USB Type B SMT Connector PCB COAX SMA end launch Manufacturer Analog Devices Supplied Components Corporation Components Corporation Components Corporation Mill-Max Johnson Connector PCB SMA ST Cap cer X7R C0402, 10%, 16 V, 0.1 μF Tyco Murata 1-1478979-0 GRM155R71C104KA88D Cap chip mono cer C0G C0402, 5%, 50 V, 100 pF Murata GRM1555C1H101JD01D Cap cer C0G C0402, 5%, 50 V, 1000 pF Cap cer X5R C0603, 20%, 6.3 V, 10 μF Cap cer monolithic X5R, C0805, 10%, 16 V, 10 μF Cap cer C0G, C0402, ±0.5 pF, 25 V, 0.5 pF Cap cer monolithic X5R, C1206, 10%, 25 V, 10 μF Cap monolithic cer X7R, C0603, 10%, 25 V, 10000 pF Cap cer NP0, C0603, 5%, 50 V, 22 pF Cap cer C0402, 0.25PF, 50 V, 1.5 pF Cap cer C0402, 5%, 50 V, 22 pF Cap mono cer X5R, C0603, 10%, 25 V, 1 μF Cap cer C0G, C0603, 5%, 100 V, 1000 pF Cap cer X7R, C0402, 5%, 50 V, 2700 pF Cap cer X7R, C0603, 5%, 50 V, 0.1 μF Cap cer X7R, C0402, 5%, 50 V, 1500 pF Cap cer multilayer NP0, C0402, 5%, 50 V, 10 pF Chip inductor L7144, 5%, 15 nH Res film SMD R0402, 5%, 1/16 W, 0 Ω Murata Murata Murata Kemet Murata Murata Phycomp (Yageo) Phycomp (Yageo) Phycomp (Yageo) Murata TDK Murata Murata Murata Phycomp (Yageo) Coilcraft Panasonic GRM1555C1H102JA01 GRM188R60J106ME47D GRM21BR61C106KE15L C0402C508D3GACTU GRM31CR61E106KA12L GRM188R71E103KA01D CC0603JRNP09BN220 0402CG159C9B200 0402CG220J9B200 GRM188R61E105KA12D C1608C0G2A102J GRM155R71H272JA01 GRM188R71H104JA93D GRM155R71H152JA01 CC0402JRNP09BN100 0603CS-15NXJLU ERJ-2GE0R00X Res film SMD R0402, 5%, 1/16 W, 300 Ω Res film SMD R0603, 1%, 1/16 W, 0 Ω Res thick film chip, R0402, 5%, 1/10 W, 5.6 Ω Res film SMD R0402, 5%, 1/16 W, 820 Ω Res chip SMD R0402, 5%, 1/16 W, 2 kΩ Res ultra-PREC ultra-reliability MF chip, R0402, 0.1%, 1/16 W, 49.9 Ω Res prec thick film chip R0402, 1%, 1/10 W, 100 Ω Res film SMD R0603, 1%, 1/10 W, 2 kΩ Res prec thick film chip R0603, 1%, 50 V, 1/10 W, 78.7 kΩ Res prec thick film chip R0603, 1%, 50 V, 1/10 W, 140 kΩ Res prec thick film chip R0402, 1%, 1/16 W, 10 kΩ Res prec thick film chip R0402, 1%, 1/16 W, 49.9 Ω Res PREC thick film chip R0603, 1%, 50 V, 1/10 W, 100 kΩ SW PCB mount slide, SWSECMA0903201 Panasonic Multicomp Panasonic Panasonic Yageo Susumu ERJ-2GEJ301X MC0603WG00000T5E-TC ERJ-2GEJ5R6X ERJ-2GEJ821X RC0402JR-072KL RG1005P-49R9-B-T5 Panasonic Yageo-Phycomp Panasonic Panasonic Panasonic Panasonic Panasonic SECMA ERJ-2RKF101X 9C06031A2001FKHFT ERJ-3EKF7872V ERJ-3EKF1403V ERJ-2RKF1002X ERJ-2RKF49R9X ERJ-3EKF1003V 09-03-201-02 Rev. 0 | Page 11 of 12 TP-104-01-00 TP-104-01-04 897-43-005-00-100001 142-0701-851 UG-742 Qty 3 2 1 Reference Designator D1, CR1, CR2 T1, T3 U1 1 1 U2 U3 1 1 1 1 U5 U6 Y1 Y2 ADRF6720-27-EVALZ User Guide Description LED 570 NM WTR clr LED0805 SMD (green) XFMR RF SMT AT224-1 IC wideband quadrature modulator, QFN40_6X6_PAD4_6X4_6 IC 400 MHz to 2700 MHz RF driver ampiflier, SOT-89, 5 V IC high accuracy, low IQ, adjustable LDO, QFN8_3X3_PAD1_75X1_45 IC 64 kbit EEPROM, SO8 IC HS USB peripheral, 3 V to 3.6 V, QFN56_8X8_PAD5_2X4_5 IC crystal SMD XTALNX3225 24.000000 MHz IC crystal OSC prelim, 3.3 V YSML98W79H35_B 38.4 MHz Manufacturer ROHM Mini-Circuits Analog Devices, Inc. Part Number SML-210MTT86 TC1-1-43A+ ADRF6720-27ACPZ Analog Devices, Inc. Analog Devices, Inc. ADL5320ARKZ ADP3334ACPZ Microchip Cypress Semiconductor NDK Rakon 24LC64-I-SN CY7C68013A-56LTXC NX3225SA-24.000000MHZ 509540 The components listed in Table 4 are part of the printed circuit board (PCB) or must not be installed. Table 4. ADRF6720-27-EVALZ Evaluation Board Bill of Materials—Do Not Install Qty 3 3 8 4 4 2 2 1 11 3 2 4 Reference Designator C13, C71, C72 C16 to C18 C41, C76, C77, C79, C86, C88, C89, C91 C75, C78, C81, C84 C80,C82,C83,C85 C87, C90 LO_IN−, LO_OUT− P3 R11, R15, R16, R25, R32, R37, R38, R43, R77, R81, R82 R67, R78, R79 T2, T4 VCC_LO, VCC_RF, VCC_VCO, VTUNE_TP Description Cap cer X7R C0402, 10%, 50 V, 330 pF Do not install (TBD_C0402) TBD0402 Cap cer C0G SMD C0402, ±0.25 pF, 50 V, 3.3 pF Manufacturer Murata Not applicable Murata Part No. GRM155R71H331KA01D TBD0402 GJM1555C1H3R3CB01D Cap cer C0G SMD C0402, ±0.25 pF, 50 V, 2 pF Cap mono cer C0G C0402, 5%, 50 V, 20 pF Cap chip mono cer C0G C0402, ±0.1 pF, 50 V, 6 pF Connector PCB coax SMA end launch Connector PCB HDR ST 10P Res film SMD R0402, 5%, 1/16 W, 0 Ω Murata Murata Murata Johnson Samtec Panasonic GJM1555C1H2R0CB01D GRM1555C1H200JZ01D GRM1555C1H6R0BZ01 142-0701-851 TSW-105-08-G-D ERJ-2GE0R00X Res prec thick film chip R0402, 1%, 1/10 W, 1 kΩ XFMR 2.5 GHz balun, T0603-6P Connector PCB test point red Panasonic Johanson Technology Components Corporation ERJ-2RKF1001X 2500BL14M050T TP-104-01-02 ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG12530-0-10/14(0) Rev. 0 | Page 12 of 12