Evaluation Board User Guide UG-290 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD9434 and AD9484 Analog-to-Digital Converters FEATURES Full featured evaluation board for the AD9434 and AD9484 SPI interface for setup and control External, on-board oscillator or AD9517 clocking options Balun/transformer or amplifier input drive options LDO regulator or switching power supply options VisualAnalog and SPI controller software interfaces EQUIPMENT NEEDED Analog signal source and antialiasing filter Sample clock source (if not using the on-board oscillator) 2 switching power supplies (6.0 V, 2.5 A), CUI EPS060250UH-PHP-SZ, provided PC running Windows® 98 (2nd ed.), Windows 2000, Windows ME, or Windows XP USB 2.0 port, recommended (USB 1.1 compatible) AD9434/AD9484 board HSC-ADC-EVALCZ FPGA-based data capture kit DOCUMENTS NEEDED AD9434 or AD9484 data sheet HSC-ADC-EVALCZ data sheet AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version 1.0 User Manual AN-878 Application Note, High Speed ADC SPI Control Software AN-877 Application Note, Interfacing to High Speed ADCs via SPI AN-835 Application, Understanding High Speed ADC Testing and Evaluation SOFTWARE NEEDED VisualAnalog SPI controller GENERAL DESCRIPTION This document describes the AD9434 and AD9484 evaluation board, which provides all of the support circuitry required to operate the AD9434 and AD9484 in their various modes and configurations. The application software used to interface with the devices is also described. The AD9434 and AD9484 data sheets provide additional information and should be consulted when using the evaluation board. All documents and software tools are available at www.analog.com/fifo. For additional information or questions, send an email to [email protected]. 09910-001 TYPICAL MEASUREMENT SETUP Figure 1. AD9434 and AD9484 Family Evaluation Board and HSC-ADC-EVALCZ Data Capture Board PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 28 UG-290 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Input Signals...................................................................................3 Equipment Needed........................................................................... 1 Output Signals ...............................................................................3 Documents Needed.......................................................................... 1 Default Operation and Jumper Selection Settings....................4 Software Needed ............................................................................... 1 Evaluation Board Software Quick Start Procedures .....................6 General Description ......................................................................... 1 Configuring the Board .................................................................6 Typical Measurement Setup ............................................................ 1 Using the Software for Testing.....................................................6 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork...................................9 Evaluation Board Hardware ............................................................ 3 Ordering Information.................................................................... 23 Power Supplies .............................................................................. 3 Bill of Materials........................................................................... 23 REVISION HISTORY 7/11—Revision 0: Initial Version Rev. 0 | Page 2 of 28 Evaluation Board User Guide UG-290 EVALUATION BOARD HARDWARE The evaluation board provides all of the support circuitry required to operate the AD9434 and AD9484 in their various modes and configurations. Figure 2 shows the typical bench characterization setup used to evaluate the ac performance. It is critical that the signal sources used for the analog input and clock have very low phase noise (<1 ps rms jitter) to realize the optimum performance of the signal chain. Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is necessary to achieve the specified noise performance. current capability for DUT_AVDD and DRVDD; however, it is recommended that separate supplies be used for both analog and digital domains. To operate the evaluation board using the SPI and alternate clock options, a separate 3.3 V analog supply is needed in addition to the other supplies. This 3.3 V supply should have a 1 A current capability. The evaluation board covers both the AD9484 and AD9484 ADCs. See the Evaluation Board Software Quick Start Procedures section to get started, and see Figure 15 to Figure 28 for the complete schematics and layout diagrams. These diagrams illustrate the routing and grounding techniques that should be applied at the system level when designing application boards using these converters. When connecting the clock and analog source, use clean signal generators with low phase noise, such as the Rohde & Schwarz SMA or HP 8644B signal generators or an equivalent. Use a 1 meter, shielded, RG-58, 50 Ω coaxial cable for connecting to the evaluation board. Enter the desired frequency and amplitude in the signal generators (see the Specifications section in the data sheet of the respective part). When connecting the analog input source, use of a multipole, narrow-band band-pass filter with 50 Ω terminations is recommended. Analog Devices, Inc., uses TTE, Allen Avionics, and K&L band-pass filters. The filters should be connected directly to the evaluation board. POWER SUPPLIES This evaluation board comes with a wall-mountable switching power supply that provides a 6 V, 2 A maximum output. Connect the supply to the rated 100 V to 240 V ac wall outlet at 47 Hz to 63 Hz. The output from the supply is provided through a 2.1 mm inner diameter jack that connects to the printed circuit board (PCB) at J300. The 6 V supply is fused and conditioned on the PCB before connecting to the low dropout linear regulators (default configuration) that supply the proper bias to each of the various sections on the board. The evaluation board can be powered in a nondefault condition using external bench power supplies. To do this, JP301 through JP303 can be removed to disconnect the outputs from the onboard LDOs. This enables the user to bias each section of the board individually. Use P300 and P301 to connect a different supply for each section. A 1.8 V supply is needed with a 1 A An additional 5V_AVDD supply is used to bias the optional input path amplifier. If used, this supply should have a 1 A current capability. INPUT SIGNALS If an external clock source is used, it should also be supplied with a clean signal generator as previously specified. Typically, most Analog Devices evaluation boards can accept ~2.8 V p-p or 13 dBm sine wave input for the clock. OUTPUT SIGNALS The default setup uses the Analog Devices high speed converter evaluation platform (HSC-ADC-EVALCZ) for data capture. The LVDS output signals are routed to the FPGA on the data capture board. Rev. 0 | Page 3 of 28 UG-290 Evaluation Board User Guide WALL OUTLET 100V TO 240V AC 47Hz TO 63Hz SWITCHING POWER SUPPLY SWITCHING POWER SUPPLY 6V DC 2A MAX SIGNAL SYNTHESIZER 6V DC 2A MAX ANALOG INPUT PC RUNNING VISUAL ANALOG USER SOFTWARE 09910-002 SIGNAL SYNTHESIZER ENCODE Figure 2. Evaluation Board Connection 1.5V p-p 0.1µF VCM 33Ω 0Ω 0.1µF 5pF 33Ω 33Ω 0.1µF VIN+ 33Ω AD9434/ AD9484 VIN– 09910-003 0.1µF Figure 3. Default Analog Input Configuration of the AD9434 and AD9484 DEFAULT OPERATION AND JUMPER SELECTION SETTINGS degrades significantly if the analog input is driven with a singleended signal. This section explains the default and optional settings or modes allowed on the AD9434 and AD9484 evaluation board. The analog inputs are self-biased by an on-chip reference to provide a common-mode voltage level of nominally 1.7 V. Power Circuitry An internal differential voltage reference creates positive and negative reference voltages that define the 1.5 V p-p fixed span of the ADC core. This internal voltage reference can be adjusted by means of an SPI control. Connect the switching power supply that is supplied in the evaluation kit between a rated 100 V to 240 V ac wall outlet (at 47 Hz to 63 Hz) and J300. Analog Input The input on the evaluation board is set up for a double baluncoupled analog input with a 50 Ω impedance (see Figure 3). The analog input to the AD9434 and AD9484 is a differential buffer. For best dynamic performance, source impedances driving VIN+ and VIN− are matched such that common-mode settling errors are symmetrical. The analog input is optimized to provide superior wideband performance and requires that the analog inputs be driven differentially. SNR and SINAD performance VREF The AD9434 VREF pin (Pin 31) allows the user to monitor the on-board voltage reference or provide an external reference (requires configuration through the SPI). The three optional settings are internal VREF (the pin is connected to 20 kΩ to ground), export VREF, and import VREF. See the settings for Register 0x18 in Table 1. Rev. 0 | Page 4 of 28 Evaluation Board User Guide AVDD UG-290 1:1 impedance ratio transformer (T201) that adds a low amount of jitter to the clock path. The clock input is 50 Ω terminated and accoupled to handle single-ended sine wave types of inputs. The transformer converts the single-ended input to a differential signal that is clipped by CR200 before entering the ADC clock inputs. 20kΩ (00) (01) VREF (10) The evaluation board is by default set up to be clocked with the transformer-coupled input network connected to the external clock source through the SMA connector, J200 (labeled CLK+). (11) NOT USED PDWN 09910-004 SPI CTRL VREF SELECT 00: INTERNAL VREF 01: IMPORT VREF 10: EXPORT VREF 11: NOT USED To enable the power-down feature, add a shorting jumper across P200 at Pin 1 and Pin 2 to connect the PDWN pin to AVDD. Figure 4. Equivalent VREF Input/Output Circuit Clock Circuitry for the AD9434/AD9484 The default clock input circuit on the evaluation board uses a simple transformer-coupled circuit using a high bandwidth Table 1. Register 0x18 Settings Address (Hexadecimal) 0x18 Parameter Name Input range Bits[7:6] VREF select 1 00 = internal VREF (20 kΩ pull-down internally) 01 = import VREF (apply 0.59 V to 0.8 V to Pin 31) 10 = export VREF (monitor) 11 = not used 1 VREF x 2 = input range. Rev. 0 | Page 5 of 28 Bit 5 0 Bits[4:0] Input voltage range setting (V) 11100 = 1.60 11101 = 1.58 11110 = 1.55 11111 = 1.52 00000 = 1.50 00001 = 1.47 00010 = 1.44 00011 = 1.42 00100 = 1.39 00101 = 1.36 00110 = 1.34 00111 = 1.31 01000 = 1.28 01001 = 1.26 01010 = 1.23 01011= 1.20 01100 = 1.18 UG-290 Evaluation Board User Guide EVALUATION BOARD SOFTWARE QUICK START PROCEDURES This section provides quick start procedures for using the AD9434 and AD9484 evaluation board. Both the default and optional settings are described. CONFIGURING THE BOARD 2. 3. 4. 5. 6. 7. Connect the AD9434 evaluation board to the HSC-ADCEVALCZ boards as shown in Figure 1. Connect one 6 V, 2 A switching power supply (such as the CUI EPS060250UH-PHP-SZ supplied) to the AD9434 board. Connect one 5 V, 3 A (6 V, 2 A can optionally be used) switching power supply (such as the CUI KSAFD0500300W1US supplied) to the HSC-ADCEVALCZ board. Connect the HSC-ADC-EVALCZ board to the PC with a USB cable. (Connect to J6.) On the ADC evaluation board, make sure that jumpers are on the J300 to J303 headers to connect the power supplies. Connect Pin 1 to Pin 2 of P200 and Pin 2 to Pin 3 of P400 to connect the SPI bus to the ADC. On the ADC evaluation board, provide a clean, low jitter clock source to connector J200 at the desired ADC conversion rate. On the ADC evaluation board, use a clean signal generator with low phase noise to provide an input signal at the J100 connector. Use a 1 meter, shielded, RG-58, 50 Ω coaxial cable to connect the signal generator. For best results, use a narrow-band, band-pass filter with 50 Ω terminations and an appropriate center frequency. (Analog Devices uses TTE, Allen Avionics, and K&L band-pass filters.) USING THE SOFTWARE FOR TESTING Setting Up the ADC Data Capture After configuring the board, set up the ADC data capture using the following steps: Open VisualAnalog® on the connected PC. The appropriate part type should be listed in the status bar of the VisualAnalog – New Canvas window. Select the template that corresponds to the type of testing to be performed (see Figure 5 where the AD9434 is shown as an example). 2. After the template is selected, a message appears asking if the default configuration can be used to program the FPGA (see Figure 6). Click Yes, and the window closes. Figure 6. VisualAnalog Default Configuration Message 3. To change features to settings other than the default settings, click the Expand Display button, located on the bottom right corner of the VisualAnalog window, to see what is shown in Figure 8. 4. Detailed instructions for changing the features and capture settings can be found in the AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version 1.0 User Manual. After the changes are made to the capture settings, click Collapse Display (see Figure 7). 09910-007 1. Figure 5. VisualAnalog, New Canvas Window 09910-006 1. 09910-005 Before using the software for testing, configure the evaluation board as follows: Figure 7. VisualAnalog Window Toolbar, Collapsed Display Rev. 0 | Page 6 of 28 UG-290 09910-008 Evaluation Board User Guide Figure 8. VisualAnalog, Main Window 2. Setting Up the SPI Controller Software After the ADC data capture board setup is complete, set up the SPI controller software using the following procedure: Open the SPI controller software by going to the Start menu or by double-clicking the SPIController software desktop icon. If prompted for a configuration file, select the appropriate one. If not, check the title bar of the window to determine which configuration is loaded. If necessary, choose Cfg Open from the File menu and select the appropriate file based on your part type. Note that the CHIP ID(1) field should be filled to indicate whether the correct SPI controller configuration file is loaded (see Figure 9). 09910-010 NEW DUT BUTTON Figure 10. SPI Controller, New DUT Button 3. 09910-009 1. Click the New DUT button in the SPIController window (see Figure 10). Figure 9. SPI Controller, CHIP ID(1) Box Rev. 0 | Page 7 of 28 Note that other settings can be changed in the Customer tab of the SPIController window. See the appropriate part data sheet; the AN-878 Application Note, High Speed ADC SPI Control Software; and the AN-877 Application Note, Interfacing to High Speed ADCs via SPI, for additional information. UG-290 Evaluation Board User Guide 0 500MSPS 30.3MHz AT –1.0dBFS SNR: 65.0dB ENOB: 10.7 BITS SFDR: 85dBc AMPLITUDE (dBFS) –20 –40 –60 –80 –120 Figure 11. SPI Controller, Customer Tab 4. 0 20 40 60 80 100 120 140 160 180 200 220 240 FREQUENCY (MHz) 09910-014 09910-011 –100 Figure 14. Typical FFT, AD9434 Click the Run button in the VisualAnalog toolbar (see Figure 12). Troubleshooting Tips If the FFT plot appears abnormal, do the following: 09910-012 1. 2. Figure 12. Run Button (Encircled in Red) in the VisualAnalog Toolbar, Collapsed Display Adjusting the Amplitude of the Input Signal If you see a normal noise floor when you disconnect the signal generator from the analog input, be sure you are not overdriving the ADC. Reduce the input level, if necessary. In VisualAnalog, click the Settings button in the Input Formatter block. Check that Number Format is set to the correct encoding (offset binary by default). Repeat for the other channel. The next step is to adjust the amplitude of the input signal as follows: If the FFT appears normal but the performance is poor, do the following: 1. 1. 2. Adjust the amplitude of the input signal so that the fundamental is at the desired level. Examine the Fund Power reading in the left panel of the VisualAnalog Graph - AD9434 Average FFT window (see Figure 13). 3. 4. Make sure an appropriate filter is used on the analog input. Make sure the signal generators for the clock and the analog input are clean (low phase noise). Change the analog input frequency slightly if noncoherent sampling is being used. Make sure the SPI configuration file matches the product being evaluated. If the FFT window remains blank after Run is clicked, do the following: 1. 09910-013 2. Figure 13. Graph Window of VisualAnalog 2. 3. Click the disk icon within the Graph window to save the performance plot data as a .csv formatted file. See Figure 14 for an example. Make sure the evaluation board is securely connected to the HSC-ADC-EVALCZ board. Make sure the FPGA has been programmed by verifying that DONE LED is illuminated on the HSC-ADCEVALCZ board. If this LED is not illuminated, make sure the U4 switch on the board is in the correct position for USB CONFIG. Make sure the correct FPGA program was installed by selecting the Settings button in the ADC Data Capture block in VisualAnalog. Then select the FPGA tab and verify that the proper FPGA bin file is selected for the part. If VisualAnalog indicates that the FIFO capture timed out, 1. 2. Rev. 0 | Page 8 of 28 Make sure all power and USB connections are secure. Confirm that a clock signal is present at the ADC sampling rate. Evaluation Board User Guide UG-290 09910-015 EVALUATION BOARD SCHEMATICS AND ARTWORK Figure 15. Analog Input Circuits Rev. 0 | Page 9 of 28 Evaluation Board User Guide 09910-016 UG-290 Figure 16. Clock Input Circuits Rev. 0 | Page 10 of 28 UG-290 09910-017 Evaluation Board User Guide Figure 17. Board Power Supply Circuits Rev. 0 | Page 11 of 28 UG-290 Evaluation Board User Guide AVDD_3P3V P40 0 1 SPI_VDD 2 3 AVDD_DUT SPI_VDD R404 C400 0.1UF 1.1 K A1 3 A2 100K R403 10K SA 1 Y1 6 DUT_SDIO Y2 4 SB 9 7 D 8 SA ADG734BRUZ 10 IN SDO_USB GND R41 4 2 0 U40 0 AVDD_3P3V TP400 AGND AGND TP403 1 FPGA_SDIO NC7WZ07P6X 1 C40 2 R41 5 AGND SDIO_USB 0.1UF 0 16 U40 0 3 A2 Y2 GND VSS 11 IN 13 D U400 SB TP402 1 DUT_SCLK 4 R406 GND NC7WZ16P6X2 AGND AGND AGND DUT_CSB ADG734BRUZ AGND Y1 6 100K CSB_USB 10K A1 R401 1 1 AGND FPGA_SCLK VCC SCLK_USB TP40 1 SA SB SA FPGA_CSB 19 17 U40 1 100K 5 R408 10K R402 0.1UF ADG734BRUZ 20 IN 10 K C40 1 AGND R41 1 12 14 SPI_VDD 18 D U400 ADG734BRUZ FAST_SPI_EN 6 5 15 NC15 VDD R409 R41 2 0 0 R410 R41 3 0 0 AGND Figure 18. SPI Interface Circuits Rev. 0 | Page 12 of 28 09910-018 R400 1 R40 7 1.1 K U40 2 DU400 VCC 3 5 1.1 K SB R405 SDI_USB 2 4 AVDD_3P3V AGND IN ADG734BRUZ FAST_SPI_EN SPI_VDD Evaluation Board User Guide UG-290 09910-019 Figure 19. DUT Interface Circuits Rev. 0 | Page 13 of 28 UG-290 Evaluation Board User Guide 09910-020 Figure 20. Optional AD9517 Clock Input Circuit Rev. 0 | Page 14 of 28 UG-290 09910-021 Evaluation Board User Guide Figure 21. Top Side Rev. 0 | Page 15 of 28 Evaluation Board User Guide 09910-022 UG-290 Figure 22. Top Silkscreen Rev. 0 | Page 16 of 28 UG-290 09910-023 Evaluation Board User Guide Figure 23. Ground Plane (Layer 2) Rev. 0 | Page 17 of 28 Evaluation Board User Guide 09910-024 UG-290 Figure 24. Power Plane (Layer 3) Rev. 0 | Page 18 of 28 UG-290 09910-025 Evaluation Board User Guide Figure 25. Power Plane (Layer 4) Rev. 0 | Page 19 of 28 Evaluation Board User Guide 09910-026 UG-290 Figure 26. Ground Plane (Layer 5) Rev. 0 | Page 20 of 28 UG-290 09910-027 Evaluation Board User Guide Figure 27. Bottom Side Rev. 0 | Page 21 of 28 Evaluation Board User Guide 09910-028 UG-290 Figure 28. Bottom Silkscreen Rev. 0 | Page 22 of 28 Evaluation Board User Guide UG-290 ORDERING INFORMATION BILL OF MATERIALS Table 2. AD9434/AD9484 BOM Qty Reference Designator Description Value Mfg Mfg_PN 1 N/A PCB board, 9434CE01C 0 0 0 32 C100, C103, C105, C106, C108, C115, C200, C201, C202, C204, C205, C316, C317, C318, C319, C320, C321, C322, C323, C324, C325, C326, C327, C328, C329, C330, C331, C332, C333, C400, C401, C501 CAP CER X7R 0402 0.1 μF Murata GRM155R71C104KA88D 1 C111 CAP High Q microwave chip NP0 0402 4.7 pF Panasonic ECD-G0E4R7C 8 C300, C301, C302, C303, C308, C309, C310, C311 CAP CER chip 4.7 μF Panasonic ECJ-1VB0J475M 3 C304, C305, C306 CAP CER chip X8R 0.01 μF TDK C1005X8R1E103K 5 C307, C312, C313, C314, C315 CAP CER monolithic 10 μF Murata GRM21BR61C106KE15L 1 C605 CAP CER chip 0.22 μF Panasonic ECJ-0EB0J224K 1 CR200 Diode SHTKY dual series HSMS-2812BLK Avago HSMS-2812BLK 5 CR300, CR301, CR303, R304, CR305 Diode recovery rectifier S2A-TP Micro Commercial Components Corp S2A-TP 1 CR302 LED green surface mount LNJ314G8TRA (green) Panasonic LNJ314G8TRA 4 E300, E301, E302, E303 Inductor ferrite beads 50 Ω Murata BLM31PG500SN1L 1 F300 Slim line lead-free 1206 2A Littelfuse 0466002.NR 1 FL300 FLTR noise suppression LC combined type BNX016-01 Murata BNX016-01 3 J100, J200, J201 CONN-PCB SMA ST edge mount SMA-J-P-X-ST-EM1 SAMTEC SMA-J-P-X-ST-EM1 1 J300 CONN-PCB powerjack MINI 0.08 IN. R/A T/H RAPC722X Switchcraft RAPC722X 4 JP300, JP301, JP302, JP303 CONN-PCB Berg JMPR ST male 2P BERG69157-102 Berg 69157-102 3 P200, P400, P500 CONN-PCB Berg HDR ST male 3P SAMTECTSW10608GS3PIN Samtec TSW-103-08-G-S 2 P300, P301 CONN-PCB, pluggable header Z5.531.3425.0 Wieland Z5.531.3425.0 1 P302 CONN-PCB term strip header 2P Z5.530.3225.0 Wieland Z5.530.3225.0 2 P501, P502 CONN_PCB 60PIN RA connector 6469169-1 Tyco 6469169-1 15 R101, R104, R105, R119, RES film SMD 0402 0 Panasonic ERJ-2GE0R00X Rev. 0 | Page 23 of 28 UG-290 Evaluation Board User Guide Qty Reference Designator R202, R203, R204, R207, R208, R211, R213, R214, R215, R509, R510 Description Value Mfg Mfg_PN 4 R108, R109, R110, R111 RES film SMD 0402 33 Panasonic ERJ-2GEJ330X 2 R200, R201 RES film SMD 0402 51 Panasonic ERJ-2GEJ510X 4 R205, R501, R502, R503 RES ultra-prec ultra-reliability MF chip 1K Susumu RG1005P-102-B-T5 1 R212 RES prec thick film chip R0201 100 Panasonic ERJ-1GEF1000C 4 R300, R400, R401, R402 RES prec thick film chip R0402 10 K Panasonic ERJ-2RKF1002X 1 R301 RES prec thick film chip R0402 1.91 K Panasonic ERJ-2RKF1911X 1 R302 RES film SMD 0402 249 Venkel CR0402-16W-2490FT 3 R403, R406, R408 RES prec thick film chip R0402 100 K Panasonic ERJ-2RKF1003X 3 R404, R405, R407 RES film SMD 0402 1.1 K Panasonic ERJ-2GEJ112X 3 R409, R412, R414 RES thick film chip 0 Multicomp 0402WGF0000TCE 2 R506, R507 RES chip SMD 0201 0 Panasonic ERJ-1GE0R00C 1 R603 RES prec thick film chip R0402 200 Panasonic ERJ-2RKF2000X 4 RN500, RN501, RN502, RN503 RES NTWRK 16-pinIN/8RES surface mount 47 Panasonic EXB-2HV470JV 3 T102, T103, T200 XFMR RF 1:1 ETC1-1-13 Macom ETC1-1-13 1 U300 IC-ADI low dropout CMOS LIN REG ADP1706ARDZ-3.3-R7 Analog Devices ADP1706ARDZ-3.3-R7 2 U301, U302 IC-ADI low dropout CMOS LIN REG ADP1706ARDZ-1.8-R7 Analog Devices ADP1706ARDZ-1.8-R7 1 U303 IC-ADI low dropout CMOS LIN REG ADP1708ARDZ-R7 Analog Devices ADP1708ARDZ-R7 1 U401 IC tiny logic UHS dual buffer NC7WZ16P6X Fairchild NC7WZ16P6X 1 U402 IC tiny logic UHS dual buffer NC7WZ07P6X Fairchild NC7WZ07P6X 1 U501 IC-ADI 12-BIT 1.8V ADC converter 0 Analog Devices 0 1 U600 IC-ADI 12-output CLK GEN with INT 1.6GHZ VCO AD9517-4BCPZ Analog Devices AD9517-4BCPZ 38 C101, C102, C104, C107, C109, C110, C112, C113, C114, C116, C117, C118, C119, C203, C206, C207, C208, C402, C500, C502, C600, C601, C606, C607, C608, C609, C610, C611, C612, C613, C614, C615, C616, C617, C618, C619, C620, C621 CAP CER X7R 0402 0.1 μF Murata GRM155R71C104KA88D 1 C602 CAP CER chip 1800 pF Panasonic ECJ-0EB1E182K 1 C603 CAP CER 0.033 μF Panasonic 0402YD333KAT2A Rev. 0 | Page 24 of 28 Evaluation Board User Guide UG-290 Qty Reference Designator Description Value Mfg Mfg_PN 1 C604 CAP CER chip 1500 pF Panasonic ECJ-0EB1H152K 1 CR600 LED red surface mount SML-LXT0805IW-TR Lumex SML-LXT0805IW-TR 1 J101 CONN-PCB SMA ST edge mount SMA-J-P-X-ST-EM1 Samtec SMA-J-P-X-ST-EM1 1 J600 CONN-PCB coax SMA ST JOHNSON142-0701-201 Johnson 142-0701-201 4 L100, L101, L102, L103 Inductor SM 10 nH Panasonic ELJ-RE10NGF2 2 P100, P601 CONN-PCB Berg HDR ST male 3P SAMTECTSW10608GS3PIN Samtec TSW-103-08-G-S 1 P600 CONN-PCB header 8-pin double row TSW-104-08-T-D Samtec TSW-104-08-T-D 1 R100 RES film SMD 0402 51 Panasonic ERJ-2GEJ510X 13 R102, R103, R112, R115, R209, R210, R504, R508, R511, R600, R606, R608, R610 RES film SMD 0402 0 Panasonic ERJ-2GE0R00X 2 R106, R107 RES Vishay high precision SMD 0603 25 Vishay P0603E25R0BNT 2 R113, R114 RES prec thick film chip R0402 200 Panasonic ERJ-2RKF2000X 1 R116 Do not install (TBD_R0402) TBD0402 TBD0402 TBD0402 5 R117, R118, R206, R411, R500 RES prec thick film chip R0402 10 K Panasonic ERJ-2RKF1002X 2 R120, R121 RES film SMD 0402 39 Panasonic ERJ-2GEJ390X 2 R122, R123 RES film SMD 0402 100 Susumu RG1005P-101-B-T5 3 R410, R413, R415 RES thick film chip 0 Multicomp 0402WGF0000TCE 14 R505, R512, R513, R514, R515, R516, R517, R518, R519, R520, R521, R522, R523, R524 RES prec thick film chip R0201 100 Panasonic ERJ-1GEF1000C 5 R601, R602, R604, R607, R609 RES prec thick film chip R0402 1.00 K Panasonic ERJ-2RKF1001X 2 R605, R612 RES film SMD 0402 100 Venkel CR0402-16W-1000FPT 3 R611, R615, R616 RES film SMD 0402 249 Venkel CR0402-16W-2490FT 1 R613 RES prec thick film chip R0402 5.11 K Panasonic ERJ-2RKF5111X 1 R614 RES prec thick film chip R0402 4.12 K Panasonic ERJ-2RKF4121X 1 T100 XFMR RF 1:1 ETC1-1-13 Macom ETC1-1-13 2 T101, T201 XFMR RF ADT1-1WT MiniCircuits® ADT1-1WT 6 TP100, TP400, TP401, TP402, TP403, TP500 CONN-PCB pin receptacle 3102-3-00-15-00-00-08-0 Mill-Max 3102-3-00-15-00-00-08-0 2 TP600, TP601 CONN-PCB pin vector K24A Vector K24A Rev. 0 | Page 25 of 28 UG-290 Evaluation Board User Guide Qty Reference Designator Description Value Mfg Mfg_PN 1 U100 IC-ADI low dist ultra-high-spd diff ADC drvr ADA4960_PRELIM Analog Devices ADA4960_PRELIM 2 U200, U400 IC-ADI CMOS, quad SPDT switches ADG734BRUZ Analog Devices ADG734BRUZ 1 U500 Precision series sub-band gap voltage ref ADR130AUJZ Analog Devices ADR130AUJZ Rev. 0 | Page 26 of 28 Evaluation Board User Guide UG-290 NOTES Rev. 0 | Page 27 of 28 UG-290 Evaluation Board User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG09910-0-7/11(0) Rev. 0 | Page 28 of 28