Silicon Protection Arrays Low Capacitance TVS protection for high-speed data interfaces RoHS Pb GREEN SP03-6 (SO-8) Series Description This new broadband protection device from Littelfuse provides overvoltage protection for applications such as 10/100/1000 BaseT Ethernet, T3/E3 DS3 interfaces, ADSL2+, and VDSL2+. This new protector combines the TVS diode element with a diode rectifier bridge to provide both longitudinal and differential protection in one package. This design innovation results in a capacitive loading characteristic that is log-linear with respect to the signal voltage across the device. This reduces intermodulation (IM) distortion caused by a typical solid-state protection solution. The application schematic provides the connection information. Agency Approvals - Pending Features Agency Agency File Number • RoHS compliant E128662 • MS-012 surface mount package (JEDEC SO-8) Pinout 1 8 2 7 3 6 4 5 • Low insertion loss, loglinear capacitance • Pending UL recognized component • Combined longitudinal and metallic protection • Low clamping voltage • T1/E1 Line cards • T3/E3 and DS3 Interfaces Functional Block Diagram Pin 1 and 8 • UL 94V-0 epoxy molding Applications SO-8 (Top View) Line in • Clamping speed of nanoseconds • 10/100/1000 BaseT Ethernet • STS-1 Interfaces Line out Pin 2, 3, 6, and 7 Ground Line out Line in Pin 4 and 5 www.littelfuse.com ©2008 Littelfuse 73 Electronics Designers Guide SP03-6 (SO-8) Series Specifications are subject to change without notice. Silicon Protection Arrays Low Capacitance TVS protection for high-speed data interfaces Absolute Maximum Ratings Parameter Rating Units 1FBL1VMTF$VSSFOUT 150 A 1FBL1VMTF1PXFST 2800 W *&$%JSFDU%JTDIBSHF-FWFM 8 kV *&$"JS%JTDIBSHF-FWFM 15 kV *&$T 100 A #FMMDPSF(3*OUSB#VJMEJOH T 100 A *56,T A CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Thermal Information Parameter Rating Units 170 °C/W -65 to 150 °C .BYJNVN+VODUJPO5FNQFSBUVSF 150 °C .BYJNVN-FBE5FNQFSBUVSF4PMEFSJOHT 40*$-FBE5JQT0OMZ 300 °C 40*$1BDLBHF 4UPSBHF5FNQFSBUVSF3BOHF Electrical Characteristics (T01 = 25°C) Parameter 3FWFSTF4UBOE0GG7PMUBHF 3FWFSTF#SFBLEPXO7PMUBHF Symbol Test Conditions Min Typ Max Units V38. - - - 6 V V#3 IT= 1mA 6.8 - - V 3FWFSTF-FBLBHF$VSSFOU I3 V38.= 6V, T= 25°C - - 25 " Clamping Voltage, Line-Ground VC I11= 50A, tpT - - 15 V Clamping Voltage, Line-Ground VC I11= 100A, tpT - - 20 V Junction Capacitance Cj V37G.)[ - 16 25 pF V37G.)[ - 8 12 pF SP03-6 (SO-8) Series Specifications are subject to change without notice. 74 Electronics Designers Guide www.littelfuse.com ©2008 Littelfuse Silicon Protection Arrays Low Capacitance TVS protection for high-speed data interfaces Figure 1: Non-repetitive Peak Pulse Current vs. Pulse Time Figure 2: Current Derating Curve Percentage of Rated Current (%IP) Peak Pulse Current (A) 1000 100 10 120 100 80 60 40 20 0 1 1 10 100 0 1000 20 40 Pulse decay time (μs) Figure 3: Pulse Waveform 120 140 160 Figure 4: Clamping Voltage vs. Peak Pulse Current 25 VC Clamping Voltage (V) 100 80 Percentage of IPP (%) 60 80 100 AmbientTemperature (C) 60 40 Line-to-Line 20 15 Line-to-Ground 10 5 20 0 0 0 0 5 10 15 20 25 30 35 20 40 40 60 80 100 IP Peak Impulse Current (A) Time, μs Figure 5: Capacitance vs. Reverse Voltage Figure 6: Forward Voltage vs. Forward Current 7 20 18 6 Line-to-Ground Forward Voltage (V) Capacitance (pF) 16 14 12 10 8 Line-to-Line 6 4 Ground-to-Line 5 4 3 2 1 2 0 0 0 1 2 3 4 5 6 0 7 Reverse Voltage (V) www.littelfuse.com ©2008 Littelfuse 10 20 30 40 50 60 70 80 90 100 Forward Current (A) 75 Electronics Designers Guide SP03-6 (SO-8) Series Specifications are subject to change without notice. Silicon Protection Arrays Low Capacitance TVS protection for high-speed data interfaces Application Example Recommendations of ITU K.20 and .21. This device protects against both positive and negative induced surge events. The TeleLink fuse provides overcurrent protection for the long term 50/60 Hz power fault events. The following schematic shows a high-speed data interface protection solution. The SP03-6 provides both metallic (differential) and longitudinal (common mode) protection from lightning induced surge events. Its surge rating is compatible with the intra-building surge requirements of Telcordia’s GR-1089-CORE, and the Basic Level TIP 1 8 2 7 3 6 4 5 to chipset (Ethernet PHY, T3/E3 PHY, etc.) RING TeleLink (0461 1.25) SP03-6 Soldering Parameters Reflow Condition Pre Heat Pb – Free assembly -Temperature Min (Ts(min)) 150°C -Temperature Max (Ts(max)) 200°C -Time (min to max) (ts) 60 – 180 secs Average ramp up rate (Liquidus) Temp (TL) to peak 3°C/second max TS(max) toTL - Ramp-up Rate 3°C/second max Reflow -Temperature (TL) (Liquidus) -Temperature (tL) 217°C 60 – 150 seconds PeakTemperature (TP) 250+0/-5 °C Time within 5°C of actual peak Temperature (tp) 20 – 40 seconds Ramp-down Rate 6°C/second max Time 25°C to peakTemperature (TP) 8 minutes Max. Do not exceed 260°C SP03-6 (SO-8) Series Specifications are subject to change without notice. 76 Electronics Designers Guide www.littelfuse.com ©2008 Littelfuse Silicon Protection Arrays Low Capacitance TVS protection for high-speed data interfaces Mechanical Drawings and Recommended Solder Pad Outline MS-012 (SO-8) Surface Mount Package LF Symbol o Recommended Soldering Pad Outline (Reference Only) Millimetres Min Inches Min Max A 1.35 1.75 0.053 A1 0.10 0.25 0.010 A2 1.25 1.65 0.065 B 0.31 0.51 0.012 0.020 c 0.017 0.25 0.007 0.010 D 5.00 E 5.80 6.20 0.228 E1 3.80 0.150 0.157 1.27 0.016 e L Part Numbering System Max 1.27 BSC 0.050 BSC 0.050 Product Characteristics XX XX XX X X X G = GREEN Silicon Protection Array T = Tape & Reel PACKAGE SERIES Working Voltage Lead Plating Matte Tin Lead Material Copper Alloy Lead Coplanarity JODIFTNN Subsitute Material Silicon Body Material .PMEFE&QPYZ Flammability 6-7 Notes : 1. All dimensions are in millimeters 2. Dimensions include solder plating. Part Marking System %JNFOTJPOTBSFFYDMVTJWFPGNPMEnBTINFUBMCVSS "MMTQFDJmDBUJPOTDPNQMZUP+&%&$41&$.0*TTVF" 5. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form. LF SP03-6 XXXXXXXX 1BDLBHFTVSGBDFNBUUFmOJTI7%* First Line: Part number Second Line: Date code Ordering Information Part Number Package Marking Min. Order Qty. 41#5( 40*$5BQF3FFM 41 2500 www.littelfuse.com ©2008 Littelfuse 77 Electronics Designers Guide SP03-6 (SO-8) Series Specifications are subject to change without notice. Silicon Protection Arrays Low Capacitance TVS protection for high-speed data interfaces Embossed Carrier Tape & Reel Specification - SOIC Package Dimensions Symbol Millimetres Max Min Max E 1.65 1.85 0.065 0.073 F 5.6 0.213 0.22 1 2.05 0.077 0.081 D 1.5 1.6 0.063 D1 1 1 SP03-6 (SO-8) Series 1.50 Min .JO 0.161 W 12.1 1 8.1 0.311 A0 6.3 6.5 0.256 B0 5.1 5.3 0.2 , 2 2.2 0.087 t Specifications are subject to change without notice. Inches Min 78 Electronics Designers Guide 0.30 +/- 0.05 0.012 +/- 0.002 www.littelfuse.com ©2008 Littelfuse