TS3A226AE www.ti.com SCDS346A – JUNE 2013 – REVISED JULY 2013 Autonomous Audio Headset Switch with Reduced GND Switch RON and FM Capability Check for Samples: TS3A226AE FEATURES DESCRIPTION • • The TS3A226AE is an audio headset switch that detects 3- or 4-pole 3.5mm accessories. For a 4-pole accessory with a microphone, the TS3A226AE also detects the MIC location and routes the microphone and ground signals automatically. The ground signal is routed through a pair of low-impedance ground FETs (60mΩ typical), resulting minimal impact on audio cross-talk performance. The autonomous detection feature allows end users to plug in accessories with different audio pole configurations into the mobile device and have them operate properly with no added software control and complexity. The ground FETs of the device are designed to allow FM signal pass-through, making it possible to use the ground line of the headset as an FM antenna in mobile audio application. 1 • • • • • • • Ground FET Switches (60mΩ typical) Autonomous Detection of Headset Types: 3-Poles or 4-Poles (with MIC on SLEEVE or RING2) Microphone Line Switches Supports FM Signal Transmission Through the Ground FETs Reduction of Click/Pop Noise VDD Range: 2.6 V – 4.7 V THD (Mic): 0.002% Typical Low Current Consumption: 6.5-µA Typical ±8kV Contract Discharge (IEC 61000-4-2) ESD Performance on SLEEVE and RING2 Pins The TS3A226AE is packaged within a 1.2mm × 1.2mm WCSP package, making it suitable for use in mobile application. APPLICATIONS • • Mobile Phones / Tablet PCs Notebook/Ultrabook Computers TIP MIC_BIAS Audio Codec TS3A226AE R1 MIC C2 RING1 SLEEVE MICP S1 VDD EN Control Logic RING2 FET1 FET2 GNDA GNDB FM Receiver Figure 1. Typical Application Diagram ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated TS3A226AE SCDS346A – JUNE 2013 – REVISED JULY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PACKAGE; YFF-WCSP 1 2 3 C C1 C2 C3 B B B1 B2 B3 A A A1 A2 A3 3 2 1 C3 C2 C1 C B3 B2 B1 A3 A2 A1 Top View/Footprint Bump View Die Size: 1.2mm ×1.2mm Bump Size: 0.25mm Bump Pitch: 0.4mm TS3A226AE Pin Mapping (Top View) 3 2 1 C GND TIP EN B SLEEVE GNDA MICp A RING2 GNDB VDD PIN FUNCTIONS PIN NUMB ER 2 NAME TYPE DESCRIPTION A1 VDD Supply Power supply for the chip. A2 GNDB Ground FET2 ground reference. A3 RING2 I/O Connected to the RING2 segment of the jack. The pin will be routed automatically by TS3A226AE to either MICp or GNDB depending on the type of accessory. B1 MICp I/O Microphone signal connection to codec. Microphone bias should be fed into this pin. B2 GNDA Ground FET1 ground reference. B3 SLEEVE I/O Connected to the SLEEVE segment of the jack. The pin will be routed automatically by TS3A226AE to either MICp or GNDA depending on the type of accessory. C1 EN Input A rising edge triggers the detection sequence. This pin can be connected to the headset jack to allow automatic pull-up to supply after headset insertion. C2 TIP I/O Connected to the TIP segment of the headphone jack. C3 GND Ground Chip ground reference. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links :TS3A226AE TS3A226AE www.ti.com SCDS346A – JUNE 2013 – REVISED JULY 2013 S1 MUX DETAIL SLEEVE SW1 MICp SW2 RING2 Figure 2. S1 Mux Detail FUNCTIONAL TABLES: INTERNAL SWITCHES EN Accessory Type Accessory Configuration SW1 SW2 FET1 FET2 0 N/A — High Z High Z High Z High Z 1 TRS 3-pole Headphone or Speaker TIP = Audio Left Ring = Audio Right Sleeve = Ground On On On On 1 TRRS 4-pole Headphone TIP = Audio Left Ring1 = Audio Right Ring2 = Ground Sleeve = Microphone On High Z High Z On 1 TRRS 4-pole Headphone TIP = Audio Left Ring1 = Audio Right Ring2 = Microphone Sleeve = Ground High Z On On High Z 1 N/A — On On On On ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) Voltage range on VDD (2) VI Voltage range on EN, MICP, RING2, SLEEVE, TIP TA TJ (MAX) Tstg (2) V –0.3 to VDD+0.5 V –40 to 85 °C Maximum operating junction temperature 125 °C –65 to 150 °C Storage temperature range ESD rating Human body model(JESD 22 A114) Contact discharge on RING2, SLEEVE, TIP (IEC 61000-4-2) (2) (3) UNIT Operating ambient temperature range (3) Charge device model (JESD 22 C101) (1) VALUE –0.3 to 5 500 V 2 kV 8 kV Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (θJA × PD(max)) Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links :TS3A226AE 3 TS3A226AE SCDS346A – JUNE 2013 – REVISED JULY 2013 www.ti.com RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN VDD Supply voltage range VIO Input/Output voltage range (EN, MICP, RING2, SLEEVE, TIP) VIO(TIP) Input/Output voltage range for TIP VIH VIL TA Input Logic High for EN Input Logic Low for EN MAX UNIT 2.6 4.5 V 0 VDD V -2.0 VDD V VDD = 2.6 V 1.16 VDD VDD = 3.3 V 1.24 VDD VDD = 4.5 V 1.48 VDD VDD = 2.6 V 0 0.19 VDD = 3.3 V 0 0.3 VDD = 4.5 V 0 0.5 –40 85 Operating temperature range V V °C KEY ELECTRICAL CHARACTERISTICS Unless otherwise noted the specification applies over the VDD range and operating junction temperature –40°C ≤ TA ≤ 70°C. Typical values are for VDD = 3.3V and TJ = 25°C. PARAMETER VDD IDD TEST CONDITIONS Input Voltage Range Quiescent Current MIN TYP MAX 2.6 3.3 4.5 V 6.5 14 µA 60 85 60 85 8.5 10.5 8.5 10.5 VDD = 4.5 V, VMICp = 1.8 V to VDD, EN=L or EN=H (after detection) UNIT SWITCH RESISTANCE RF1 FET1 On Resistance RF2 FET2 On Resistance RSW1 SW1 On Resistance RSW2 SW2 On Resistance VDD = 2.6 V, VGND = 0 V, IGND = 10 mA VDD = 2.6 V, VSLEEVE/RING2 = 0 V to 2.6 V, IMIC = ±10 mA mΩ Ω SWITCH LEAKAGE CURRENT IOFF-0.1 FET1 and FET2 off leakage IOFF-10 SW1, SW2 off leakage ION-10 SW1, SW2 on leakage 1 VIN = 0 V to 2.6 V, VOUT = 0 V, VDD = 4.5 V 1 µA 1 SWITCH DYNAMIC CHARACTERISTICS BWF1 FET1 Bandwidth BWF2 FET2 Bandwidth PSR217 PSR1k PSR20k Power Supply Rejection, RL = 50 Ω V = 60 mVPP, Ibias = 10 mA 160 200 160 200 MHz V = 200 mVPP, f = 217 Hz –110 dB V = 200 mVPP, f = 1 kHz –100 dB V = 200 mVPP, f = 20 kHz –85 dB ISOS1 SLEEVE or RING2 to MICP Isolation V = 200 mVPP, f = 20 kHz, RL = 50 Ω –80 dB SEPS1 SLEEVE to RING2 Separation V = 200 mVPP, f = 20 kHz, RL = 50 Ω (see Figure 5) –80 dB THD10 THD200 Total Harmonic Distortion V = 10 mVPP, f = 20-20 kHz, RS = 600 Ω 0.01% V = 200 mVPP, f = 20-20 kHz, RS = 600 Ω 0.002% TIMING CHARACTERISTICS tdect 4 Total detection time From EN=H to S1 switch(es) closing Submit Documentation Feedback 180 ms Copyright © 2013, Texas Instruments Incorporated Product Folder Links :TS3A226AE TS3A226AE www.ti.com SCDS346A – JUNE 2013 – REVISED JULY 2013 TYPICAL CHARACTERISTICS FET1 and FET2 INSERTION LOSS 3.00 0.06 1.00 0.058 ±1.00 0.056 ±3.00 dB (S(2,1) RON ( GROUND FETs Ron vs VDD 0.062 0.054 0.052 ±5.00 ±9.00 0.048 ±11.00 ±13.00 0.046 FET2 ±15.00 100k 0.044 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 4.1 4.2 4.3 4.4 4.5 VDD (V) FET1: 205 MHz at -3db FET2: 207 MHz at -3db ±7.00 0.05 FET1 FET2 FET1 1M 10M 100M Figure 3. C004 Figure 4. THD (SLEEVE to MICP) THD (RING2 to MICP) 1 1 10mV 10mVPP PP 10mV 10mVPP PP 200mVPP 200mV PP 200mVPP 200mV PP 0.1 THD (%) 0.1 THD (%) 1000M Frequency (Hz) C001 0.01 0.001 0.01 0.001 0.0001 0.0001 20 200 2000 Frequency (Hz) 20000 20 C002 Figure 5. 200 2000 Frequency (Hz) 20000 C003 Figure 6. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links :TS3A226AE 5 TS3A226AE SCDS346A – JUNE 2013 – REVISED JULY 2013 www.ti.com REVISION HISTORY Changes from Original (June 2013) to Revision A Page • Removed Machine Model ESD specification. ....................................................................................................................... 3 • Added EN=L or EN=H (after detection) to IDD TEST CONDITIONS. ................................................................................... 4 • Added typical values to RSW1 and RSW2. ............................................................................................................................... 4 • Added tdect PARAMETER to KEY ELECTRICAL CHARACTERISTICS table. ..................................................................... 4 6 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links :TS3A226AE PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2013 PACKAGING INFORMATION Orderable Device Status (1) TS3A226AEYFFR ACTIVE Package Type Package Pins Package Drawing Qty DSBGA YFF 9 3000 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Device Marking (3) SNAGCU Level-1-260C-UNLIM (4/5) -40 to 85 YP2 26AE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TS3A226AEYFFR Package Package Pins Type Drawing SPQ DSBGA 3000 YFF 9 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 180.0 8.4 Pack Materials-Page 1 1.46 B0 (mm) K0 (mm) P1 (mm) 1.36 0.7 4.0 W Pin1 (mm) Quadrant 8.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 29-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TS3A226AEYFFR DSBGA YFF 9 3000 210.0 185.0 35.0 Pack Materials-Page 2 D: Max = 1.386 mm, Min =1.326 mm E: Max = 1.286 mm, Min =1.226 mm IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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