TSOP852..AP5, TSOP854..AP5 Datasheet

Not for New Designs
TSOP852..AP5, TSOP854..AP5
www.vishay.com
Vishay Semiconductors
IR Receiver Modules for Remote Control Systems
FEATURES
• Very low supply current
• Photo detectors and preamplifier in one package
• Internal filter for PCM frequency
• Supply voltage: 2.5 V to 5.5 V
• Improved immunity against ambient light
• Insensitive to supply voltage ripple and noise
21944
• Material categorization:
for definitions of compliance
www.vishay.com/doc?99912
please
see
DESCRIPTION
The TSOP852..AP5, TSOP854..AP5 series are miniaturized
receiver modules for infrared remote control systems. A PIN
diode and a preamplifier are assembled on a PCB, the
epoxy lens cap is designed as an IR filter.
The demodulated output signal can be directly decoded
by a microprocessor. The TSOP852..AP5 is compatible
with all common IR remote control data formats. The
TSOP854..AP5 is optimized to suppress almost all spurious
pulses from energy saving fluorescent lamps but will also
suppress some data signals.
This component has not been qualified according to
automotive specifications.
PARTS TABLE
LEGACY, FOR
LONG BURST REMOTE CONTROLS (AGC2)
RECOMMENDED FOR
LONG BURST CODES (AGC4) (1)
36 kHz
TSOP85236AP5
TSOP85436AP5 (2)(3)(4)
38 kHz
TSOP85238AP5
TSOP85438AP5 (5)(6)(9)
40 kHz
TSOP85240AP5
TSOP85440AP5
56 kHz
TSOP85256AP5
TSOP85456AP5 (7)(8)
AGC
Carrier
frequency
Package
Pinning
Dimensions (mm)
Mounting
Application
Best remote control code
1, 2 = GND, 3 = OUT, 4 = VS
4.5 H x 5.0 W x 1.3 L
SMD
Remote control
(2) RC-5 (3) RC-6 (4) Panasonic (5) NEC (6) Sharp (7) r-step
(8)
Thomson RCA
(9)
r-map
Note
(1) We advise try AGC4 first if the burst length is unknown
BLOCK DIAGRAM
APPLICATION CIRCUIT
17170_5
4
Transmitter
with
TSALxxxx
VS
30 kΩ
Input
AGC
Band
pass
Demodulator
VS
Circuit
3
R1
IR receiver
OUT
+ VS
C1
µC
OUT
GND
VO
GND
1, 2
PIN
Control circuit
GND
R1 and C1 are recommended for protection against EOS.
Components should be in the range of 33 Ω < R1 < 1 kΩ,
C1 > 0.1 µF.
20445-3
Rev. 1.8, 27-Feb-15
1
Document Number: 85197
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Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
TEST CONDITION
SYMBOL
VALUE
UNIT
VS
-0.3 to +6
V
mA
Supply voltage (pin 4)
Supply current (pin 4)
IS
3
Output voltage (pin 3)
VO
-0.3 to (VS + 0.3)
V
Output current (pin 3)
IO
5
mA
Junction temperature
Tj
100
°C
Tstg
-25 to +85
°C
Tamb
-25 to +85
°C
Ptot
10
mW
Storage temperature range
Operating temperature range
Tamb ≤ 85 °C
Power consumption
Note
• Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device reliability.
ELECTRICAL AND OPTICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
PARAMETER
TEST CONDITION
SYMBOL
MIN.
VS
2.5
VS = 3.3 V, Ev = 0
ISD
0.27
Ev = 40 klx, sunlight
ISH
0.45
mA
Ev = 0, IR diode TSAL6200,
IF = 250 mA, test signal see fig. 1
d
35
m
Supply voltage
Supply current (pin 4)
Transmission distance
Output voltage low (pin 3)
mW/m2,
IOSL = 0.5 mA, Ee = 0.7
test signal see fig. 1
TYP.
MAX.
0.35
VOSL
Minimum irradiance
Pulse width tolerance:
tpi - 5/fo < tpo < tpi + 6/fo,
test signal see fig. 1
Ee min.
Maximum irradiance
tpi - 5/fo < tpo < tpi + 6/fo,
test signal see fig. 1
Ee max.
Directivity
Angle of half transmission
distance
ϕ1/2
0.15
UNIT
5.5
V
0.45
mA
100
mV
0.35
mW/m2
W/m2
30
± 75
deg
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Optical Test Signal
600 µs
0.8
Ton, Toff - Output Pulse Width (ms)
Ee
t
600 µs
t = 60 ms
VO
94 8134
Output Signal, (see fig. 4)
VOH
0.6
0.5
Toff
0.4
0.3
0.2
λ = 950 nm,
Optical Test Signal, Fig. 3
0.1
0
0.1
VOL
t on
t off
t
20759
Fig. 1 - Output Function
Rev. 1.8, 27-Feb-15
Ton
0.7
1
10
100
1000
10 000
Ee - Irradiance (mW/m2)
Fig. 2 - Output Pulse Diagram
2
Document Number: 85197
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Not for New Designs
TSOP852..AP5, TSOP854..AP5
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1.2
500
0.8
0.6
0.4
f = f0 ± 5 %
Δ f(3 dB) = f0/10
0.2
450
E - Max. Field Strength (V/m)
E e min./Ee - Rel. Responsivity
1.0
400
350
300
250
200
150
100
50
0.0
0
0.7
0.9
1.1
1.3
0
f/f0 - Relative Frequency
16925
4
Wavelength of Ambient
Illumination: λ = 950 nm
1.5
1
0.5
TSOP852..
0.4
0.3
TSOP854..
0.2
0.1
1
10
f = 38 kHz, Ee = 2 mW/m2
100
0
20817
1.0
f = 100 Hz
0.9
0.8
f = 10 kHz
0.7
0.6
f = 20 kHz
0.5
0.4
f = 30 kHz
0.3
f = fo
0.2
0.1
0
10
100
20
40
60
80
100
120
Burst Length (number of cycles/burst)
Fig. 7 - Max. Envelope Duty Cycle vs. Burst Length
Ee min. - Threshold Irradiance (mW/m2)
Ee min. - Threshold Irradiance (mW/m2)
0.6
0
Ee - Ambient DC Irradiance (W/m2)
1000
0.3
0.25
0.2
0.15
0.1
0.05
0
- 30
VsRMS - AC Voltage on DC Supply Voltage (mV)
20755
Fig. 5 - Sensitivity vs. Supply Voltage Disturbances
Rev. 1.8, 27-Feb-15
3000
0.7
0.1
Fig. 4 - Sensitivity in Bright Ambient
20753
2500
0.8
0.5
1
2000
0.9
2
20757
1500
1
Correlation with Ambient Light Sources:
2
3.5 10 W/m = 1.4 kLx (Std. illum. A, T = 2855 K)
10 W/m2 = 8.2 kLx (Daylight, T = 5900 K)
3
0
0.01
1000
f - EMI Frequency (MHz)
Fig. 6 - Sensitivity vs. Electric Field Disturbances
Max. Envelope Duty Cycle
Ee min. - Threshold Irradiance (mW/m2)
Fig. 3 - Frequency Dependance of Responsivity
2.5
500
20747
- 10
10
30
50
70
90
Tamb - Ambient Temperature (°C)
Fig. 8 - Sensitivity vs. Ambient Temperature
3
Document Number: 85197
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S(λ)rel - Relative Spectral Sensitivity
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
700 750 800 850 900 950 1000 1050 1100
λ - Wavelength (nm)
21946
Fig. 9 - Relative Spectral Sensitivity vs. Wavelength
-20°
-10°
0°
10°
20°
-30°
30°
-40°
40°
-50°
50°
60°
-60°
-70°
70°
-80°
80°
0.1
21947
0.3
0.5
0.7
0.9
Fig. 10 - Directivity
Ee min. - Sensitivity (mW/m2)
0.2
0.18
0.16
0.14
0.12
0.1
0.08
0.06
0.04
0.02
0
2
20756
2.5
3
3.5
4
4.5
5
5.5
6
VS - Supply Voltage (V)
Fig. 11 - Sensitivity vs. Supply Voltage
Rev. 1.8, 27-Feb-15
4
Document Number: 85197
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TSOP852..AP5, TSOP854..AP5
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Vishay Semiconductors
SUITABLE DATA FORMAT
IR Signal
The TSOP852..AP5, TSOP854..AP5 series is designed to
suppress spurious output pulses due to noise or
disturbance signals. Data and disturbance signals can be
distinguished by the devices according to carrier frequency,
burst length and envelope duty cycle. The data signal should
be close to the band-pass center frequency (e.g. 38 kHz)
and fulfill the conditions in the table below.
When a data signal is applied to the TSOP852..AP5,
TSOP854..AP5 in the presence of a disturbance signal, the
sensitivity of the receiver is reduced to insure that no
spurious pulses are present at the output. Some examples
of disturbance signals which are suppressed are:
0
• DC light (e.g. from tungsten bulb or sunlight)
5
• Continuous signals at any frequency
10
15
20
Time (ms)
16920
Fig. 12 - IR Signal from Fluorescent Lamp
with Low Modulation
IR Signal
• Strongly or weakly modulated noise from fluorescent
lamps with electronic ballasts (see figure 12 or figure 13)
0
5
10
15
20
Time (ms)
16921
Fig. 13 - IR Signal from Fluorescent Lamp
with High Modulation
TSOP852..AP5
TSOP854..AP5
Minimum burst length
10 cycles/burst
10 cycles/burst
After each burst of length
a minimum gap time is required of
10 to 70 cycles
≥ 10 cycles
10 to 35 cycles
≥ 10 cycles
For bursts greater than
a minimum gap time in the data stream is needed of
70 cycles
> 4 x burst length
35 cycles
> 10 x burst length
Maximum number of continuous short bursts/second
1800
1500
Recommended for NEC code
Yes
Yes
Recommended for RC5/RC6 code
Yes
Yes
Recommended for Thomson 56 kHz code
Yes
Yes
Recommended for Mitsubishi code (38 kHz, preburst 8 ms, 16 bit)
Yes
No
Recommended for Sharp code
Yes
Yes
Most common disturbance
signals are suppressed
Even extreme disturbance
signals are suppressed
Suppression of interference from fluorescent lamps
Notes
• For data formats with short bursts please see the datasheet for TSOP853..
• Example of compatible products for IR-codes:
-TSOP85436AP5: RC-5, RC-6, Panasonic
-TSOP85438AP5: NEC, Sharp, r-map
-TSOP85456AP5: r-step, Thomson RCA
Rev. 1.8, 27-Feb-15
5
Document Number: 85197
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TSOP852..AP5, TSOP854..AP5
www.vishay.com
Vishay Semiconductors
PACKAGE DIMENSIONS in millimeters
Draft angle designed in mold tool but
appearance on both side of single unit
depends on sawing process and
location of unit in tool
(10°
)
View
Padside of device
1.3
0.85 ± 0.1
(0.66)
3
0.85 ± 0.1
2
4
4.5 ± 0.1
4
85238 AP5
V94568
1
0.95 ± 0.1
1
0.95 ± 0.1
center of sens. area
3
(3.3)
2
PIN 1 Identification
Marking area
(marking picture
for example only)
5 ± 0.1
1: GND
2: GND
Proposed pad layout from component side
3: VOUT
(dim. for reference only)
4: VCC
(3)
(1.15)
technical drawings
according to DIN
specifications
Not indicated tolerances ± 0.2
(2.5)
(1.5)
Drawing-No.: 6.541-5081.01-4
Issue: 4; 23.07.10
21916
ASSEMBLY INSTRUCTIONS
Reflow Soldering
Manual Soldering
• Reflow soldering must be done within 72 h while stored
under a max. temperature of 30 °C, 60 % RH after
opening the dry pack envelope
• Use a soldering iron of 25 W or less. Adjust the
temperature of the soldering iron below 300 °C
• Set the furnace temperatures for pre-heating and heating
in accordance with the reflow temperature profile as
shown in the diagram. Excercise extreme care to keep the
maximum temperature below 260 °C. The temperature
shown in the profile means the temperature at the device
surface. Since there is a temperature difference between
the component and the circuit board, it should be verified
that the temperature of the device is accurately being
measured
• Handle products only after the temperature has cooled off
• Finish soldering within 3 s
• Handling after reflow should be done only after the work
surface has been cooled off
Rev. 1.8, 27-Feb-15
6
Document Number: 85197
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TSOP852..AP5, TSOP854..AP5
www.vishay.com
Vishay Semiconductors
VISHAY LEAD (Pb)-FREE REFLOW SOLDER PROFILE
300
max. 260 °C
245 °C
255 °C
240 °C
217 °C
250
T (°C)
200
max. 20 s
150
max. 100 s
max. 120 s
100
max. Ramp Up 3 °C/s
max. Ramp Down 6 °C/s
50
0
0
50
100
150
t (s)
19800
200
250
300
max. 2 cycles allowed
5.3
1.65
0.3
TAPING VERSION TSOP85..AP5 DIMENSIONS in millimeters
for device orientation only
12
optical center
Z 5:1
1.75
5.5
1
4
2
3
4.8
Z
Ø 1.5 min.
4
Direction of feed
8
2
Ø 1.55
technical drawings
according to DIN
specifications
Drawing-No.: 9.700-5346.01-4
Issue: 2, 24.11.09
21945
Rev. 1.8, 27-Feb-15
7
Document Number: 85197
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Not for New Designs
TSOP852..AP5, TSOP854..AP5
www.vishay.com
Vishay Semiconductors
LABEL
Standard bar code labels for finished goods
The standard bar code labels are product labels and used
for identification of goods. The finished goods are packed in
final packing area. The standard packing units are labeled
with standard bar code labels before transported as finished
goods to warehouses. The labels are on each packing unit
and contain Vishay Semiconductor GmbH specific data.
VISHAY SEMICONDUCTOR GmbH STANDARD BAR CODE PRODUCT LABEL (finished goods)
PLAIN WRITING
ABBREVIATION
LENGTH
Item-description
-
18
Item-number
INO
8
Selection-code
SEL
3
BATCH
10
Data-code
COD
3 (YWW)
Plant-code
PTC
2
Quantity
QTY
8
Accepted by
ACC
-
Packed by
PCK
-
LOT-/serial-number
Mixed code indicator
Origin
Long bar code top
MIXED CODE
-
xxxxxxx+
Company logo
Type
Length
Item-number
N
8
Plant-code
N
2
Sequence-number
X
3
Quantity
N
8
Total length
-
21
Short bar code bottom
Type
Length
Selection-code
X
3
Data-code
N
3
Batch-number
X
10
Filter
-
1
Total length
-
17
DRY PACKING
RECOMMENDED METHOD OF STORAGE
The reel is packed in an anti-humidity bag to protect the
devices from absorbing moisture during transportation and
storage.
Dry box storage is recommended as soon as the aluminum
bag has been opened to prevent moisture absorption. The
following conditions should be observed, if dry boxes are
not available:
Aluminum bag
• Storage temperature 10 °C to 30 °C
• Storage humidity ≤ 60 % RH max.
Label
After more than 72 h under these conditions moisture
content will be too high for reflow soldering.
In case of moisture absorption, the devices will recover to
the former condition by drying under the following condition:
Reel
FINAL PACKING
192 h at 40 °C + 5 °C / - 0 °C and < 5 % RH (dry air /
nitrogen) or
96 h at 60 °C + 5 °C and < 5 % RH for all device containers
or
24 h at 125 °C + 5 °C not suitable for reel or tubes.
The sealed reel is packed into a cardboard box. A secondary
cardboard box is used for shipping purposes.
An EIA JEDEC® standard JSTD-020 level 4 label is included
on all dry bags.
15973
Rev. 1.8, 27-Feb-15
8
Document Number: 85197
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TSOP852..AP5, TSOP854..AP5
www.vishay.com
CAUTION
This bag contains
MOISTURE-SENSITIVE DEVICES
Vishay Semiconductors
VISHAY SEMICONDUCTORS STANDARD
BAR CODE LABELS
LEVEL
4
The Vishay Semiconductors standard bar code labels are
printed at final packing areas. The labels are on each
packing unit and contain Vishay Semiconductors specific
data.
1. Shelf life in sealed bag: 12 months at < 40 °C and < 90 % relative
humidity (RH)
2. After this bag is opened, devices that will be subjected to soldering
reflow or equivalent processing (peak package body temp. 260 °C)
must be
2a. Mounted within 72 hours at factory condition of < 30 °C/60 % RH or
2b. Stored at < 5 % RH
BAR CODE PRODUCT LABEL (example)
3. Devices require baking befor mounting if:
Humidity Indicator Card is > 10 % when read at 23 °C ± 5 °C or
2a. or 2b. are not met.
4. If baking is required, devices may be baked for:
192 hours at 40 °C + 5 °C/- 0 °C and < 5 % RH (dry air/nitrogen) or
96 hours at 60 °C ± 5 °C and < 5 % RH for all device containers or
24 hours at 125 °C ± 5 °C not suitable for reels or tubes
Bag Seal Date:
(If blank, see barcode label)
Note: Level and body temperature defined by EIA JEDEC Standard J-STD-020
22522
EIA JETEC standard JSTD-020 level 4 label is included
on all dry bags
22178
ESD PRECAUTION
Proper storage and handling procedures should be followed
to prevent ESD damage to the devices especially when they
are removed from the antistatic shielding bag. Electrostatic
sensitive devices warning labels are on the packaging.
Rev. 1.8, 27-Feb-15
9
Document Number: 85197
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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www.vishay.com
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Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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Revision: 02-Oct-12
1
Document Number: 91000