STF12N50DM2 N-channel 500 V, 0.299 Ω typ., 11 A MDmesh™ DM2 Power MOSFET in a TO-220FP package Datasheet - production data Features 3 1 2 TO-220FP Figure 1: Internal schematic diagram Order code VDS RDS(on) max. ID STF12N50DM2 500 V 0.350 Ω 11 A Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications Switching applications Description This high voltage N-channel Power MOSFET is part of the MDmesh DM2 fast recovery diode series. It offers very low recovery charge and time (Qrr, trr) combined with low RDS(on), rendering it suitable for the most demanding high efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. Table 1: Device summary Order code Marking Package Packing STF12N50DM2 12N50DM2 TO-220FP Tube March 2016 DocID026809 Rev 2 This is information on a product in full production. 1/13 www.st.com Contents STF12N50DM2 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 5 2/13 TO-220FP package information ...................................................... 10 Revision history ............................................................................ 12 DocID026809 Rev 2 STF12N50DM2 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit V VGS Gate-source voltage ±25 ID(1) Drain current (continuous) at TC = 25 °C 11 ID(1) Drain current (continuous) at TC= 100 °C 8 IDM(2) Drain current (pulsed) 44 A PTOT A Total dissipation at TC = 25 °C 25 W dv/dt (3) Peak diode recovery voltage slope 40 V/ns dv/dt (4) MOSFET dv/dt ruggedness 50 V/ns 2500 V -55 to 150 °C Value Unit VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s, TC = 25 °C) Tstg Storage temperature range Tj Operating junction temperature range Notes: (1)Limited (2)Pulse by maximum junction temperature. width limited by safe operating area. (3) ISD ≤ 11 A, di/dt ≤ 400 A/µs; VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS (4) VDS ≤ 400 V Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case max 5 Rthj-amb Thermal resistance junction-amb max 62.5 °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetetive or not repetetive (pulse width limited by Tjmax) 2.5 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 320 mJ DocID026809 Rev 2 3/13 Electrical characteristics 2 STF12N50DM2 Electrical characteristics (TC = 25 °C unless otherwise specified). Table 5: Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. Max. 500 Unit V VGS = 0 V, VDS = 500 V 1 µA VGS = 0 V, VDS = 500 V, TC = 125 °C(1) 100 µA Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 5.5 A 0.299 0.350 Ω Min. Typ. Max. Unit - 628 - pF - 38 - pF - 1.2 - pF IDSS Zero gate voltage drain current IGSS 3 Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Coss eq.(1) Equivalent output capacitance VDS = 0 V to 400 V, VGS = 0 V - 69 - pF RG Intrinsic gate resistance f = 1 MHz open drain - 7 - Ω - 16 - nC - 4.6 - nC - 7 - nC Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDS= 100 V, f = 1 MHz, VGS = 0 V VDD = 400 V, ID = 11 A, VGS = 10 V (see Figure 15: "Test circuit for gate charge behavior") Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol td(on) tr td(off) tf 4/13 Parameter Test conditions Turn-on delay time Rise time Turn-off-delay time Fall time VDD = 250 V, ID = 5.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") DocID026809 Rev 2 Min. Typ. Max. Unit - 12.5 - ns - 9 - ns - 28 - ns - 9.8 - ns STF12N50DM2 Electrical characteristics Table 8: Source drain diode Symbol Parameter Test conditions ISD Source-drain current ISDM(1) Source-drain current (pulsed) VSD (2) Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current VGS = 0 V, ISD = 11 A ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") Min. Typ. Max. Unit - 11 A - 44 A - 1.6 V - 140 ns - 0.707 µC - 10.1 A - 190 ns - 1.111 µC - 11.7 A Notes: (1)Pulse width is limited by safe operating area (2)Pulse test: pulse duration = 300 µs, duty cycle 1.5% DocID026809 Rev 2 5/13 Electrical characteristics 2.1 6/13 STF12N50DM2 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Normalized gate threshold voltage vs. temperature Figure 7: Normalized V(BR)DSS vs. temperature DocID026809 Rev 2 STF12N50DM2 Electrical characteristics Figure 8: Static drain-source on-resistance Figure 9: Normalized on-resistance vs. temperature Figure 10: Gate charge vs. gate-source voltage Figure 11: Capacitance variations Figure 12: Output capacitance stored energy Figure 13: Source-drain diode forward characteristics DocID026809 Rev 2 7/13 Test circuits 3 8/13 STF12N50DM2 Test circuits Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform DocID026809 Rev 2 STF12N50DM2 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID026809 Rev 2 9/13 Package information 4.1 STF12N50DM2 TO-220FP package information Figure 20: TO-220FP package outline 7012510_Rev_K_B 10/13 DocID026809 Rev 2 STF12N50DM2 Package information Table 9: TO-220FP package mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 DocID026809 Rev 2 11/13 Revision history 5 STF12N50DM2 Revision history Table 10: Document revision history Date Revision 26-Aug-2014 1 First release. 2 Text and formatting changes throughout document In Section 1: "Electrical ratings": - updated Table 4: "Avalanche characteristics" In Section 2: "Electrical characteristics" - updated Table 6: "Dynamic", Table 7: "Switching times" and Table 8: "Source drain diode" Added Section 2.1: "Electrical characteristics (curves)" Updated Section 4: "Package information" 07-Mar-2016 12/13 Changes DocID026809 Rev 2 STF12N50DM2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID026809 Rev 2 13/13