IRF IRLS3036PBF

PD -97358
IRLS3036PbF
IRLSL3036PbF
Applications
l DC Motor Drive
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
HEXFET® Power MOSFET
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
D
G
S
Benefits
l Optimized for Logic Level Drive
l Very Low RDS(ON) at 4.5V VGS
l Superior R*Q at 4.5V VGS
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
G
D
S
60V
1.9mΩ
2.4mΩ
270A
195A
c
S
D
G
D2Pak
IRLS3036PbF
TO-262
IRLSL3036PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
Parameter
Pulsed Drain Current
d
TSTG
Avalanche Characteristics
Single Pulse Avalanche Energy
Avalanche Current
d
Repetitive Avalanche Energy
A
W
W/°C
V
V/ns
-55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
EAS (Thermally limited)
IAR
EAR
Units
380
2.5
±16
8.0
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
f
dv/dt
TJ
Max.
270
190
195
1100
c
c
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
°C
300
e
290
l
See Fig. 14, 15, 22a, 22b
mJ
A
mJ
Thermal Resistance
Symbol
RθJC
RθJA
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Parameter
Typ.
Max.
Units
Junction-to-Case
Junction-to-Ambient (PCB Mount, steady state)
–––
–––
0.40
40
°C/W
k
11
j
1
12/08/08
IRLS/SL3036PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
IDSS
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
60
–––
–––
–––
1.0
–––
–––
–––
–––
RG(int)
Internal Gate Resistance
–––
Conditions
––– –––
V VGS = 0V, ID = 250µA
0.061 ––– V/°C Reference to 25°C, ID = 5mA
VGS = 10V, ID = 165A
1.9
2.4
mΩ
2.2
2.8
VGS = 4.5V, ID = 140A
–––
2.5
V VDS = VGS, ID = 250µA
–––
20
VDS = 60V, VGS = 0V
µA
––– 250
VDS = 60V, VGS = 0V, TJ = 125°C
––– 100
VGS = 16V
nA
––– -100
VGS = -16V
d
g
g
2.0
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
i
h
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
340 ––– –––
–––
91
140
–––
31
–––
–––
51
–––
–––
40
–––
–––
66
–––
––– 220 –––
––– 110 –––
––– 110 –––
––– 11210 –––
––– 1020 –––
––– 500 –––
––– 1430 –––
––– 1880 –––
Conditions
S
VDS = 10V, ID = 165A
ID = 165A
VDS = 30V
nC
VGS = 4.5V
ID = 165A, VDS =0V, VGS = 4.5V
VDD = 39V
ID = 165A
ns
RG = 2.1Ω
VGS = 4.5V
VGS = 0V
VDS = 50V
pF ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
g
g
i
h
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
VSD
trr
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
ISM
e
Min. Typ. Max. Units
–––
–––
–––
–––
270
A
1100
Conditions
MOSFET symbol
showing the
integral reverse
D
G
p-n junction diode.
TJ = 25°C, IS = 165A, VGS = 0V
VR = 51V,
TJ = 25°C
IF = 165A
TJ = 125°C
di/dt = 100A/µs
TJ = 25°C
g
S
––– –––
1.3
V
–––
62
–––
ns
–––
66
–––
––– 310 –––
nC
TJ = 125°C
––– 360 –––
–––
4.4
–––
A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
g
Notes:
 Calcuted continuous current based on maximum allowable junction
‚
ƒ
„
…
temperature Bond wire current limit is 195A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.021mH
RG = 25Ω, IAS = 165A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 165A, di/dt ≤ 430A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
† Coss eff. (TR) is a fixed capacitance that gives the same charging time as
Coss while VDS is rising from 0 to 80% VDSS.
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
‰ Rθ is measured at TJ approximately 90°C.
Š Limited by TJmax, see Fig. 14, 15, 22a, 22b for typical repetitive
avalanche performance.
R θJC value shown is at time zero.
11
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IRLS/SL3036PbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
BOTTOM
100
10
2.7V
1
2.7V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
10
0.1
0.1
1
10
100
0.1
1000
Fig 1. Typical Output Characteristics
10
100
1000
Fig 2. Typical Output Characteristics
1000
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
T J = 175°C
100
10
T J = 25°C
1
VDS = 25V
≤60µs PULSE WIDTH
0.1
ID = 165A
VGS = 10V
2.0
1.5
1.0
0.5
1
2
3
4
5
6
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
5.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 165A
C oss = C ds + C gd
C, Capacitance (pF)
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
Ciss
10000
Coss
1000
Crss
4.0
VDS= 48V
VDS= 30V
3.0
2.0
1.0
0.0
100
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
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0
20
40
60
80
100
120
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
3
IRLS/SL3036PbF
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 175°C
100
T J = 25°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100µsec
1msec
100
Limited by
package
10msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1
0.1
0.0
0.5
1.0
1.5
2.0
0
2.5
Limited By Package
ID, Drain Current (A)
200
150
100
50
0
50
75
100
125
150
175
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
300
25
100
75
Id = 5mA
70
65
60
55
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Drain-to-Source Breakdown Voltage
3.0
EAS , Single Pulse Avalanche Energy (mJ)
1200
2.5
ID
27A
50A
BOTTOM 165A
TOP
1000
2.0
Energy (µJ)
10
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
250
1
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
1.5
1.0
0.5
0.0
800
600
400
200
0
-10
0
10
20
30
40
50
60
VDS, Drain-to-Source Voltage (V)
Fig 11. Typical COSS Stored Energy
4
DC
70
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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IRLS/SL3036PbF
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.1
0.20
0.10
τJ
0.05
0.02
0.01
R1
R1
τJ
τ1
R2
R2
R3
R3
τC
τ
τ2
τ1
τ2
τ3
τ3
τ4
τ4
Ci= τi/Ri
Ci i/Ri
0.01
1E-005
τi (sec)
0.01115
0.000009
0.08360
0.000080
0.18950
0.001295
0.11519
0.006726
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
Ri (°C/W)
R4
R4
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
100
0.05
0.10
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
300
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 165A
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRLS/SL3036PbF
14
2.5
2.0
ID = 250µA
ID = 1.0mA
1.5
12
IF = 110A
V R = 51V
10
TJ = 25°C
TJ = 125°C
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
3.0
8
ID = 1.0A
6
1.0
4
0.5
2
-75 -50 -25 0
25 50 75 100 125 150 175 200
0
100
T J , Temperature ( °C )
300
400
500
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
900
12
IF = 165A
V R = 51V
10
IF = 110A
V R = 51V
800
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
700
600
8
QRR (A)
IRRM (A)
200
diF /dt (A/µs)
6
500
400
300
4
200
2
100
0
100
200
300
400
500
0
100
200
300
400
500
diF /dt (A/µs)
diF /dt (A/µs)
Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 18 - Typical Recovery Current vs. dif/dt
600
IF = 165A
V R = 51V
TJ = 25°C
TJ = 125°C
QRR (A)
500
400
300
200
0
100
200
300
400
500
diF /dt (A/µs)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRLS/SL3036PbF
Driver Gate Drive
D.U.T
ƒ
-
‚
-
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
VGS
20V
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
Fig 22b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- VDD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2µF
.3µF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
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Qgs1 Qgs2
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
7
IRLS/SL3036PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
7+,6,6$1,5)6:,7+
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(/
,17(51$7,21$/
5(&7,),(5
/2*2
3$57180%(5
)6
'$7(&2'(
<($5 :((.
/,1(/
$66(0%/<
/27&2'(
25
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
)6
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRLS/SL3036PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
(;$03/( 7+,6,6$1,5//
/27&2'(
$66(0%/('21::
,17+($66(0%/</,1(&
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
'$7(&2'(
<($5 :((.
/,1(&
25
,17(51$7,21$/
5(&7,),(5
/2*2
$66(0%/<
/27&2'(
3$57180%(5
'$7(&2'(
3 '(6,*1$7(6/($')5((
352'8&7237,21$/
<($5 :((.
$ $66(0%/<6,7(&2'(
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRLS/SL3036PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
3
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/2008
10
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