IRF IRFU420APBF

SMPS MOSFET
Applications
Switch Mode Power Supply (SMPS)
l Uninterruptible Power Supply
l High speed power switching
l Lead-Free
PD - 95075A
IRFR420APbF
IRFU420APbF
HEXFET® Power MOSFET
l
VDSS
RDS(on) max
ID
3.0Ω
3.3A
500V
Benefits
Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
l Effective COSS specified (See AN 1001)
l
D-Pak
IRFR420A
I-Pak
IRFU420A
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
3.3
2.1
10
83
0.67
± 30
3.4
-55 to + 150
A
W
W/°C
V
V/ns
300 (1.6mm from case )
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
140
2.5
5.0
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
1.5
–––
62
°C/W
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
1
12/13/04
IRFR/U420APbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
500
–––
–––
2.0
–––
–––
–––
–––
Typ.
–––
0.60
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, I D = 250µA
––– V/°C Reference to 25°C, ID = 1mA
3.0
Ω
VGS = 10V, ID = 1.5A „
4.5
V
VDS = VGS, ID = 250µA
25
VDS = 500V, VGS = 0V
µA
250
VDS = 400V, VGS = 0V, TJ = 125°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
1.4
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
8.1
12
16
13
340
53
2.7
490
15
28
Max. Units
Conditions
–––
S
VDS = 50V, ID = 1.5A
17
ID = 2.5A
4.3
nC
VDS = 400V
8.5
VGS = 10V, See Fig. 6 and 13 „
–––
VDD = 250V
–––
I
D = 2.5A
ns
–––
RG = 21Ω
–––
RD = 97Ω,See Fig. 10 „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, V DS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 400V …
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 3.3
showing the
A
G
integral reverse
––– –––
10
S
p-n junction diode.
––– ––– 1.6
V
TJ = 25°C, IS = 2.5A, VGS = 0V „
––– 330 500
ns
TJ = 25°C, I F = 2.5A
––– 760 1140 nC
di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 45mH
RG = 25Ω, IAS = 2.5A. (See Figure 12)
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
ƒ ISD ≤ 2.5A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
2
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IRFR/U420APbF
10
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
0.1
4.5V
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
1
4.5V
20µs PULSE WIDTH
TJ = 150 ° C
0.1
100
1
VDS , Drain-to-Source Voltage (V)
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
10
TJ = 150 ° C
1
TJ = 25 ° C
0.1
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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100
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
0.01
4.0
10
VDS , Drain-to-Source Voltage (V)
9.0
ID = 2.5A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U420APbF
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
1000
Ciss
100
Coss
10
20
VGS , Gate-to-Source Voltage (V)
10000
ID = 2.5A
VDS = 400V
VDS = 250V
VDS = 100V
15
10
5
Crss
0
1
1
10
100
FOR TEST CIRCUIT
SEE FIGURE 13
0
4
1000
8
12
16
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
TJ = 150 ° C
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
10
1
TJ = 25 ° C
0.1
0.4
V GS = 0 V
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.2
10
10us
100us
1
0.1
1ms
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
10ms
100
1000
10000
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U420APbF
5.0
VGS
4.0
ID , Drain Current (A)
RD
V DS
D.U.T.
RG
+
-VDD
10V
3.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
2.0
Fig 10a. Switching Time Test Circuit
VDS
1.0
90%
0.0
25
50
75
100
TC , Case Temperature
125
150
( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response
(Z thJC )
10
1
D = 0.50
0.20
0.10
P DM
0.1
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
0.01
t1/ t 2
J = P DM x Z thJC
+T C
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
IRFR/U420APbF
300
TOP
250
BOTTOM
ID
1.1A
1.6A
2.5A
200
150
100
50
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGS
QGD
700
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
V DSav , Avalanche Voltage ( V )
VG
650
600
550
VGS
0.0
3mA
1.0
1.5
2.0
2.5
IAV , Avalanche Current ( A)
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
0.5
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
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IRFR/U420APbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U420APbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRF R120
WITH AS SEMBLY
LOT CODE 1234
AS SEMBLED ON WW 16, 1999
IN T HE AS SEMBLY LINE "A"
PART NUMBER
INTERNAT IONAL
RECTIF IER
LOGO
Note: "P" in as sembly line position
indicates "Lead-Free"
IRFU120
12
916A
34
AS SEMBLY
LOT CODE
DATE CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INTERNATIONAL
RECT IFIER
LOGO
IRFU120
12
ASSEMBLY
LOT CODE
8
34
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
WEEK 16
A = ASSEMBLY SIT E CODE
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IRFR/U420APbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF U120
WIT H AS SEMBLY
LOT CODE 5678
ASS EMB LED ON WW 19, 1999
IN T HE AS S EMBLY LINE "A"
INT ERNAT IONAL
RECT IF IER
LOGO
PART NUMBER
IRF U120
919A
56
78
AS SEMBLY
LOT CODE
Note: "P" in assembly line
position indicates "Lead-F ree"
DAT E CODE
YEAR 9 = 1999
WEEK 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRF U120
56
ASS EMB LY
LOT CODE
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78
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = AS SEMB LY S IT E CODE
9
IRFR/U420APbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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