IRF IRFU3418PBF

PD - 95516A
IRFR3418PbF
IRFU3418PbF
HEXFET® Power MOSFET
Applications
High frequency DC-DC converters
l Lead-Free
l
VDSS
RDS(on) Max
14m:
80V
Benefits
Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
ID
30A
l
D-Pak
IRFR3418
I-Pak
IRFU3418
Absolute Maximum Ratings
Max.
Units
VDS
Drain-to-Source Voltage
Parameter
80
V
VGS
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
± 20
70
IDM
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
280
PD @TC = 25°C
Maximum Power Dissipation
140
PD @TA = 25°C
Maximum Power Dissipation
3.8
Linear Derating Factor
0.95
W/°C
5.2
-55 to + 175
V/ns
°C
ID @ TC = 25°C
ID @ TC = 100°C
h
e
dv/dt
TJ
Peak Diode Recovery dv/dt
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
A
50
c
W
300 (1.6mm from case )
Thermal Resistance
Typ.
Max.
RθJC
Junction-to-Case
Parameter
–––
1.05
RθJA
Junction-to-Ambient (PCB Mount) *
–––
40
RθJA
Junction-to-Ambient
–––
110
Units
°C/W
Notes  through † are on page 10
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1
12/03/04
IRFR/U3418PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
80
–––
–––
∆V(BR)DSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
0.08
–––
V/°C Reference to 25°C, ID = 1mA
RDS(on)
Static Drain-to-Source On-Resistance
–––
11.5
14
Gate Threshold Voltage
3.5
–––
5.5
mΩ
V
VGS = 10V, ID = 18A
VGS(th)
IDSS
Drain-to-Source Leakage Current
–––
–––
1.0
µA
VDS = 80V, VGS = 0V
–––
–––
250
Gate-to-Source Forward Leakage
–––
–––
100
nA
VGS = 20V
Gate-to-Source Reverse Leakage
–––
–––
-100
IGSS
V
VGS = 0V, ID = 250µA
f
VDS = VGS, ID = 250µA
VDS = 64V, VGS = 0V, TJ = 150°C
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
66
–––
–––
S
Conditions
gfs
Qg
Forward Transconductance
VDS = 25V, ID = 18A
Total Gate Charge
–––
63
94
Qgs
Gate-to-Source Charge
–––
23
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
23
–––
VGS = 10V
td(on)
Turn-On Delay Time
–––
24
–––
VDD = 40V
tr
Rise Time
–––
72
–––
ID = 18A
td(off)
Turn-Off Delay Time
–––
41
–––
tf
Fall Time
–––
27
–––
VGS = 10V
Ciss
Input Capacitance
–––
3510
–––
VGS = 0V
Coss
Output Capacitance
–––
330
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
–––
190
–––
Coss
Output Capacitance
–––
1220
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
240
–––
VGS = 0V, VDS = 64V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
360
–––
VGS = 0V, VDS = 0V to 64V
ID = 18A
nC
ns
pF
VDS = 40V
RG = 6.8Ω
f
f
ƒ = 1.0MHz
e
Avalanche Characteristics
EAS
Parameter
Single Pulse Avalanche Energy
IAR
Avalanche Current
c
dh
Typ.
Max.
Units
–––
260
mJ
–––
18
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
70
ISM
(Body Diode)
Pulsed Source Current
–––
–––
280
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
trr
Reverse Recovery Time
–––
57
–––
ns
Qrr
Reverse Recovery Charge
–––
130
–––
nC
ton
Forward Turn-On Time
2
ch
A
Conditions
MOSFET symbol
D
showing the
integral reverse
V
G
p-n junction diode.
TJ = 25°C, IS = 18A, VGS = 0V
S
f
TJ = 150°C, IF = 18A, VDD = 25V
di/dt = 100A/µs
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFR/U3418PbF
1000
1000
100
10
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
6.0V
1
0.1
6.0V
0.01
100
BOTTOM
10
6.0V
1
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.001
0.1
1
10
100
0.1
1000
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
2.5
ID = 70A
RDS(on), Drain-to-Source On Resistance
(Normalized)
1000.00
ID, Drain-to-Source Current (Α)
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
6.0V
2.0
100.00
T J = 175°C
1.5
10.00
1.0
1.00
T J = 25°C
0.5
0.10
VDS = 25V
20µs PULSE WIDTH
0.01
5
6
7
8
9
10
11
12
13
14
15
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TTJ, Junction Temperature (°C)
( °C)
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U3418PbF
100000
VGS , Gate-to-Source Voltage (V)
ID= 18A
Coss = Cds + Cgd
10000
C, Capacitance(pF)
12.0
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, C ds SHORTED
Crss = Cgd
Ciss
1000
Coss
Crss
100
VDS= 64V
VDS= 40V
10.0
VDS= 16V
8.0
6.0
4.0
2.0
10
0.0
1
10
100
0
VDS, Drain-to-Source Voltage (V)
30
40
50
60
70
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000.00
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
20
Q G Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100.00
T J = 175°C
10.00
T J = 25°C
1.00
100
100µsec
10
1msec
1
TC = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.10
10msec
0.1
0.0
0.5
1.0
1.5
VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
10
2.0
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U3418PbF
80
LIMITED BY PACKAGE
ID , Drain Current (A)
RD
V DS
VGS
60
RG
40
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D.U.T.
+
-VDD
VGS
Fig 10a. Switching Time Test Circuit
20
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1
D = 0.50
0.20
PDM
0.10
0.1
0.05
0.02
0.01
0.01
0.00001
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U3418PbF
600
L
VDS
D.U.T
RG
IAS
VGS
20V
tp
DRIVER
+
V
- DD
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
EAS, Single Pulse Avalance Energy (mJ)
15V
TOP
500
BOTTOM
ID
7.3A
13A
18A
400
300
200
100
tp
0
25
50
75
100
125
150
175
StartingTTJ,, Junction
Junction Temperature
(°C)°C)
Starting
Temperature(
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFR/U3418PbF
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D.U.T
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U3418PbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
WITH AS SEMBLY
LOT CODE 1234
AS SEMBLED ON WW 16, 1999
IN T HE AS SEMBLY LINE "A"
PART NUMBER
INT ERNATIONAL
RECT IFIER
LOGO
Note: "P" in as sembly line position
indicates "Lead-Free"
IRFU120
12
916A
34
ASSEMBLY
LOT CODE
DAT E CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
PART NUMBER
INT ERNATIONAL
RECT IFIER
LOGO
IRFU120
12
ASSEMBLY
LOT CODE
8
34
DAT E CODE
P = DESIGNATES LEAD-F REE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 16
A = ASSEMBLY SITE CODE
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IRFR/U3418PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120
WIT H AS SEMBLY
LOT CODE 5678
AS SEMB LED ON WW 19, 1999
IN T HE AS SEMB LY LINE "A"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFU120
919A
56
78
ASS EMBLY
LOT CODE
Note: "P" in assembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 9 = 1999
WEEK 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMB ER
IRF U120
56
ASS EMB LY
LOT CODE
www.irf.com
78
DAT E CODE
P = DESIGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = AS SEMBLY S IT E CODE
9
IRFR/U3418PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 1.6mH
RG = 25Ω, IAS = 18A.
ƒ ISD ≤ 18A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
† Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 30A.
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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