Data Sheet No. PD60160-A IPS0551T FULLY PROTECTED POWER MOSFET SWITCH Product Summary Features • • • • • Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection Rds(on) 5.2mΩ (max) V clamp 40V Ishutdown 100A Description Ton/Toff The IPS0551T is a fully protected three terminal SMART POWER MOSFET that features over-current, over-temperature, ESD protection, and drain to source active clamp. This device combines a HEXFET® POWER MOSFET and a gate driver. It offers full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning OFF the power MOSFET when temperature exceeds 165oC or when the drain current reaches 100A. The device restarts once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations. 4µs Package SUPER TO220 SUPER SMD220 Advance Information Typical Connection L oad R in s e r ie s ( if n e e d e d ) L o g ic s ig n a l www.irf.com D IN c o n tro l S 1 IPS0551T Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 25oC unless otherwise specified). PCB mounting uses the standard footprint with 70 µm copper thickness. Symbol Parameter Min. Max. — 37 Maximum input voltage -0.3 7 V Maximum IN current Diode max. continuous current (1) -10 +10 mA (rth=60oC/W) — 2.8 (rth=5oC/W) Vds Maximum drain to source voltage Vin I+in Isd cont. — 35 Isd pulsed Diode max. pulsed current (1) Pd Maximum power dissipation(1) (rth=60oC/W) — 100 — 2 ESD1 — 4 Electrostatic discharge voltage (Human Body) ESD2 Electrostatic discharge voltage (Machine Model) — 0.5 Tj max. Max. storage & operating junction temp. -40 +150 Tlead Lead temperature (soldering, 10 seconds) — 300 Min. Typ. — — — — 60 60 35 0.7 Units Test Conditions A W C=100pF, R=1500Ω, kV o C=200pF, R=0Ω, L=10µH C Thermal Characteristics Symbol Parameter Rth Rth Rth Rth 1 2 3 4 Thermal Thermal Thermal Thermal resistance free air resistance to PCB min footprint resistance to PCB 1" sq. footprint resistance junction to case Max. Units Test Conditions — — — a o C/W Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Vds (max) VIH VIL I ds Continuous drain to source voltage High level input voltage Low level input voltage Continuous drain current Tamb=85 o C (TAmbient = 85oC, IN = 5V, rth = 80oC/W, Tj = 125oC) ( TAmbient = 85oC, IN = 5V, rth = 5oC/W, Tj = 125oC) Rin Recommended resistor in series with IN pin Tr-in (max) Max recommended rise time for IN signal (see fig. 2) Fr-Isc (2) Max. frequency in short circuit condition (Vcc = 14V) Min. Max. Units — 4 0 18 6 0.5 V — — 0.1 — 0 8 35 0.5 1 1 A kΩ µS kHz (1) Limited by junction temperature (pulsed current limited also by internal wiring) (2) Operations at higher switching frequencies is possible. See Appl. Notes. 2 www.irf.com IPS0551T Static Electrical Characteristics (Tj = 25oC unless otherwise specified. Standard footprint 70µm of copper thickness) Symbol Parameter Rds(on) @Tj=25oC Rds(on) Min. Typ. ON state resistance Tj = 25 C — 4.5 5.2 ON state resistance Tj = 150oC — 7.5 8.8 mΩ Vin = 5V, Ids = 10A Drain to source leakage current 0 0.01 25 µA Vcc = 14V, Tj = 25oC Drain to source clamp voltage 1 Drain to source clamp voltage 2 Body diode forward voltage IN to source clamp voltage IN threshold voltage Input supply current (normal operation) Input supply current (protection mode) 37 — — 7 1 25 50 40 43 0.85 8.0 1.5 90 130 — 48 1 o Max. Units Test Conditions @Tj=150oC Idss @Tj=25oC V clamp 1 V clamp 2 Vsd Vin clamp Vth Iin, on Iin, off 9.5 2 300 400 V µA Id = 20mA (see Fig.3 & 4) Id=Ishutdown (see Fig.3 & 4) Id = 35A, Vin = 0V Iin = 1 mA Id = 50mA, Vds = 14V Vin = 5V Vin = 5V over-current triggered Switching Electrical Characteristics Vcc = 14V, Resistive Load = 0.4Ω, Rinput = 50Ω, 100µs pulse, Tj = 25oC, (unless otherwise specified). Symbol Parameter Min. Ton Tr Trf Toff Tf Qin 0.25 0.25 — 1.5 0.5 — 1 1 15 4 2 200 Min. Typ. — 60 1.5 2 100 165 90 1.9 10 400 Turn-on delay time Rise time Time to 130% final Rds(on) Turn-off delay time Fall time Total gate charge Typ. Max. Units Test Conditions 4 4 — 8 5 — See figure 2 µs See figure 2 nC Vin = 5V Protection Characteristics Symbol Parameter T sd I sd V reset Treset EOI_OT Over temperature threshold Over current threshold IN protection reset threshold Time to reset protection Short circuit energy (cf application note) www.irf.com Max. Units Test Conditions — 120 2.8 40 1200 o C A V µs µJ See fig. 1 See fig. 1 V in = 0V, Tj = 25oC Vcc = 14V 3 IPS0551T Functional Block Diagram All values are typical DRAIN 37 V 200 Ω 100 kΩ IN 8V S Q R Q I sense 80 µA T > 165°c I > Isd SOURCE Lead Assignments 2 (D) 1 2 3 In D S SUPER TO220 1 2 3 In D S SUPER SMD220 (Advanced Information) 4 www.irf.com IPS0551T Vin 5V 0V 90 % Vin 10 % Ids t < T reset Tr-in t > T reset I shutdown Isd 90 % Ids 10 % Td on Td off tf tr T T shutdown Tsd (165 °c) Vds Figure 2 - IN rise time & switching time definitions Figure 1 - Timing diagram T clamp Vin L Rem : V load is negative during demagnetization V load + R 14 V Ids - D Vds clamp Vin ( Vcc ) Vds ( see Appl . Notes to evaluate power dissipation ) Figure 3 - Active clamp waveforms www.irf.com 5v 0v IN Vds S Ids Figure 4 - Active clamp test circuit 5 IPS0551T All curves are typical values with standard footprint. Operating in the shaded area is not recommended. 12 11 10 9 8 7 6 5 4 3 2 1 0 200% 180% 160% 140% 120% Tj = 150oC 100% 80% Tj = 25oC 60% 40% 20% 0% 0 1 2 3 4 5 6 7 8 -50 -25 25 50 75 100 125 150 175 Figure 6 - Normalised Rds(on) (%) Vs Tj (oC) Figure 5 - Rds(on) (mΩ) Vs Input Voltage (V) 40 40 ton delay 35 rise tim e 25 20 20 15 15 10 10 5 5 0 0 1 2 3 4 5 6 7 fall tim e 30 25 0 toff delay 35 130% rdson 30 8 Figure 7 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs Input Voltage (V) 6 0 0 1 2 3 4 5 6 7 8 Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V) www.irf.com IPS0551T 100 100 delay off fall tim e delay on rise time 130% rdson 10 10 1 1 10 100 1000 10 100 1000 Figure 9 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs IN Resistor (Ω) Figure 10 - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor (Ω) 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 100 90 80 70 60 50 40 30 20 Isd 25°C 10 Ilim 25°C 0 0 1 2 3 4 5 6 7 8 9 Figure 11 - Current Iim. & Ishutdown (A) Vs Vin (V) www.irf.com -50 -25 0 25 50 75 100 125 150 Figure 12 - Over-current (A) Vs Temperature (oC) 7 IPS0551T r t h = 1°C /W (cas e t o ambient ) r t h = 5°C /W r t h = 15°C /W r t h = 30°C /W: 1'' f o o t pr int r t h= 60°C/W: s t d. f o o t pr int 100 90 80 1000 T=25°C free air/ std. footprint T=100°C free air/ std. footprint Current path capability should be above this curve 100 70 60 50 Load characteristic should be below this curve 40 10 30 20 10 0 -50 0 50 100 150 200 1 Figure 14 - Ids (A) Vs Protection Resp. Time (s) Figure 13 - Max.Cont. Ids (A) Vs Amb. Temperature (oC) 1 .0 0 E +0 2 s ingle puls e 10 Hz rth=60°C/W dT=25°C 100Hz rth=60°C/W dT=25°C 1k Hz rth=60°C/W dT=25°C 1000 1 .0 0 E +0 1 100 1 .0 0 E +0 0 10 Single pulse 1 .0 0 E -0 1 1 1 .0 0 E -0 2 Vbat = 14 V Tjini = T sd rth free air / std. fooprint rth 1 inch² footprint rth infinite heatsink 0.1 0 .0 0 1 0 .0 1 0 .1 1 10 100 Figure 15 - Iclamp (A) Vs Inductive Load (mH) 8 Figure 16 - Transient Thermal Imped. ( oC/W) Vs Time (s) www.irf.com IPS0551T 200 16 180 14 rise time 12 fall time 160 140 120 10 100 8 80 6 60 40 20 Iin,on 4 Iin,off 2 Treset 0 0 -50 -25 0 25 50 75 100 125 150 Figure 17 - Inputcurrent (µA) Vs Junction (oC) -50 -25 0 25 50 75 100 125 150 Figure 18 - Turn-on, Turn-off and Treset (µS) Vs Tj (oC) 120% 115% 110% 105% 100% 95% 90% Vds clamp @ Isd 85% Vin clamp @ 10mA 80% -50 -25 0 25 50 75 100 125 150 Figure 19 - Vin clamp1 & Vin clamp2 (%) Vs Tj (oC) www.irf.com 9 IPS0551T Case outline Super TO220 11.00 [.433] 10.00 [.394] A 5.00 [.196] 4.00 [.158] 9.00 [.354] 8.00 [.315] B 0.25 [.010] B A 1.50 [.059] 0.50 [.020] 13.50 [.531] 12.50 [.493] 4 15.00 [.590] 14.00 [.552] 1 2 3 LEAD AS S IGNMENTS MOS F ET 4.00 [.157] 3.50 [.138] 14.50 [.570] 13.00 [.512] 3X 2.55 [.100] 2X 1 - GATE 2 - DRAIN 3 - S OURCE 4 - DRAIN 4X 1.30 [.051] 0.90 [.036] 0.25 [.010] B A 1.00 [.039] 0.70 [.028] IGBT 1 - GATE 2 - COLLECTOR 3 - EMIT TER 4 - COLLECTOR O S 3.00 [.118] 2.50 [.099] 1. 2. 3. 4. DIMENSIONING & T OLERANCING PER ASME Y14.5M-1994. CONTROLLING DIMENSION: MILLIMET ER. DIMENSIONS ARE SHOWN IN MILLIMET ERS [INCHES]. OUT LINE CONFORMS TO JEDEC OUT LINE T O-273AA. 01-3073 02 Case outline Super SMD220 (advance information) IRGB-012-012 5 4/17/2000 10 www.irf.com