Data Sheet No.PD 60153-J IPS042G DUAL FULLY PROTECTED POWER MOSFET SWITCH Features • • • • • Product Summary Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection Description The IPS042G is a fully protected dual low side SMART POWER MOSFET that features over-current, over-temperature, ESD protection and drain to source active clamp.This device combines a HEXFET® POWER MOSFET and a gate driver. It offers full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning OFF the power MOSFET when the temperature exceeds 165oC or when the drain current reaches 2A. This device restarts once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations. Rds(on) 500mΩ (max) V clamp 50V Ishutdown 2A Ton/Toff 1.5µs Package 8-Lead SOIC Typical Connection Load R in series (if needed) D IN Q control S S Logic signal (Refer to lead assignment for correct pin configuration) www.irf.com 1 IPS042G 31 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 25oC unless otherwise specified). PCB mounting uses the standard footprint with 70 µm copper thickness. Symbol Parameter Min. Max. — 47 Maximum input voltage -0.3 7 V Maximum IN current Diode max. continuous current (1) -10 +10 mA — 1.2 A — 3 Vds Maximum drain to source voltage Vin Iin, max Isd cont. (for all Isd mosfets, rth=125oC/W) Isd pulsed Diode max. pulsed current (1) (1) P d Units Maximum power dissipation (for all Pd mosfets, rth=125oC/W) — 1 ESD1 Electrostatic discharge voltage (Human Body) — 4 ESD2 Electrostatic discharge voltage (Machine Model) — 0.5 T stor. Tj max. Max. storage temperature -55 150 Max. junction temperature -40 +150 Min. Typ. — 100 — — 125 — — 65 — Test Conditions W C=100pF, R=1500Ω, kV o C=200pF, R=0Ω, L=10µH C Thermal Characteristics Symbol Parameter Rth1 Rth2 Rth3 Thermal resistance with standard footprint (2 mosfets on) Thermal resistance with standard footprint (1 mosfet on) Thermal resistance with 1" square footprint (2 mosfets on) Max. Units Test Conditions o C/W Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Vds (max) VIH VIL I ds Continuous Drain to Source voltage High level input voltage Low level input voltage Continuous drain current (both mosfets at this current) o Tamb=85 C TAmbient = 85oC, IN = 5V, rth = 100oC/W, Tj = 125oC Rin Recommended resistor in series with IN pin Tr-in(max) Max recommended rise time for IN signal (see fig. 2) Fr-Isc (2) Max. frequency in short circuit condition (Vcc = 14V) Min. Max. — 4 0 35 6 0.5 — 1 — 0 0.53 5 1 1 Units V A kΩ µS kHz (1) Limited by junction temperature (pulsed current limited also by internal wiring) (2) Operations at higher switching frequencies is possible. See Appl. notes. 2 www.irf.com IPS042G Static Electrical Characteristics (Tj = 25oC unless otherwise specified.) Symbol Parameter Rds(on) Idss1 Min. Typ. ON state resistance Tj = 25oC Tj = 150oC Drain to source leakage current — — 0 370 590 0.5 Max. Units Test Conditions 500 900 25 Drain to source leakage current 0 5 50 Drain to Source clamp voltage 1 Drain to Source clamp voltage 2 IN to Source clamp voltage IN threshold voltage ON state IN positive current OFF state IN positive current 47 50 7 1 25 50 52 53 8.1 1.6 90 130 56 60 9.5 2 200 250 @Tj=25oC Idss2 mΩ Vin = 5V, Ids = 1A Vcc = 14V, Tj = 25oC µA Vcc = 40V, Tj = 25oC @Tj=25oC V clamp 1 V clamp 2 Vin clamp Vin th Iin, -on Iin, -off V µA Id = 20mA (see Fig.3 & 4) Id=Ishutdown (see Fig.3 & 4) Iin = 1 mA Id = 50mA, Vds = 14V Vin = 5V Vin = 5V over-current triggered Switching Electrical Characteristics Vcc = 14V, Resistive Load = 20Ω, Rinput = 1kΩ, 100µs pulse, Tj = 25oC, (unless otherwise specified). Symbol Parameter Min. Ton Tr Trf Toff Tf Qin 0.05 0.5 — 0.5 0.5 — 0.2 1.3 5 1.6 1.5 1 Min. Typ. — 1.1 1.5 2 — 165 1.7 2.3 10 400 Turn-on delay time Rise time Time to 130% final Rds(on) Turn-off delay time Fall time Total gate charge Typ. Max. Units Test Conditions 0.5 2.5 — 2.5 2.5 — See figure 2 µs See figure 2 nC Vin = 5V Protection Characteristics Symbol Parameter T sd I sd V reset Treset EOI_OT Over temperature threshold Over current threshold IN protection reset threshold Time to reset protection Short circuit energy (see application note) www.irf.com Max. Units Test Conditions — 2.2 3 40 — o C A V µs µJ See fig. 1 See fig. 1 V in = 0V, Tj = 25oC Vcc = 14V 3 IPS042G Functional Block Diagram All values are typical DRAIN 47 V 4000Ω IN 8.1 V S Q R Q 200 kΩ I sense 80 µA T > 165°c I > 1sd SOURCE Lead Assignments D1 D1 D2 D2 In1 S2 In2 1 S1 8 Lead SOIC 4 www.irf.com IPS042G Vin 5V 0V 90 % Vin 10 % Ids t < T reset Tr-in t > T reset I shutdown Isd 90 % Ids 10 % Td on Td off tf tr T T shutdown Tsd (165 °c) Vds Figure 2 - IN rise time & switching time definitions Figure 1 - Timing diagram T clamp Vin L Rem : V load is negative during demagnetization V load + R 14 V - Ids D Vds clamp Vin Vds ( Vcc ) ( see Appl . Notes to evaluate power dissipation ) Figure 3 - Active clamp waveforms www.irf.com 5v 0v IN Vds S Ids Figure 4 - Active clamp test circuit 5 IPS042G All curves are typical values with standard footprints. Operating in the shaded area is not recommended. 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 200% 180% 160% 140% Tj = 150oC 120% 100% 80% Tj = 25o C 60% 40% 20% 0 1 2 3 4 5 6 7 8 8 25 50 75 100 125 150 175 4 ton delay rise tim e 130% rdson 9 0 Figure 6 - Normalised Rds ON (%) Vs Tj (oC) Figure 5 - Rds ON (mΩ) Vs Input Voltage (V) 10 0% -50 -25 toff delay fall tim e 3 7 6 5 2 4 3 1 2 1 0 0 0 1 2 3 4 5 6 7 8 Figure 7 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs Input Voltage (V) 6 0 1 2 3 4 5 6 7 8 Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V) www.irf.com IPS042G 100 100 delay off delay on rise tim e 130% rdson fall tim e 10 10 1 1 0 .1 0 .1 10 100 1000 10 10000 Figure 9 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs IN Resistor (Ω) 100 1000 10000 Figure 10 - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor (Ω) 20 3 18 2.5 16 14 2 12 10 1.5 8 1 6 0.5 4 Isd 25°C 2 Ilim 25°C 0 0 1 2 3 4 5 6 7 Figure 11 - Current Iim. & I shutdown (A) Vs Vin (V) www.irf.com 8 0 -50 -25 0 25 50 75 100 125 150 Figure 12 - I shutdown (A) Vs Temperature (oC) 7 IPS042G 3 Std. footprint 127°C/W m osfet on Std. footprint 100°C/W m osfet on 1 10 T=25°C Std. footprint T=100°C Std footprint 2 Current path capability should be above this curve 2 1 1 mosfet is on 1 Load characteristic should characteristic should be below this curve underneath this curve 0 -50 0 50 100 150 200 0.1 Figure 13 - Max.Cont. Ids (A) Vs Amb. Temperature (oC) Figure 14 - Ids (A) Vs Protection Resp. Time (s) 100 10 single pulse 1000 Hz rth=100°C/W dT=25°C 10kHz rth=100°C/W dT=25°C 10 1 Single pulse 1 rth 1 mosfet active Vbat = 14 V Tjini = T sd all curves for 1 mosfet active rth 2 mosfets active 0 .1 0.1 0 .0 1 0 .1 1 10 100 Figure 15 - Iclamp (A) Vs Inductive Load (mH) 8 Figure 16 - Transient Thermal Imped. (oC/W) Vs Time (s) www.irf.com IPS042G 200 120% 180 115% 160 110% 140 120 105% 100 100% 80 95% 60 90% Iin,on 40 20 Iin,off 0 80% -50 -25 0 -50 -25 Vds clam p @ Isd 85% 25 50 75 100 125 150 Figure 17 - Input current (µA) Vs Tj (oC) 16 14 Treset rise tim e 12 fall tim e Vin clam p @ 10m A 0 25 50 75 100 125 150 Figure 18 - Vin clamp and V clamp2 (%) Vs Tj (oC) 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 Figure 19 - Turn-on, Turn-off, and Treset (µs) Vs Tj (oC) www.irf.com 9 IPS042G D DIM B 5 A F OOT PRINT 6 8 6 7 5 H E 0.25 [.010] 1 2 3 A 4 6.46 [.255] MIN .0532 .0688 1.35 1.75 A1 .0040 3X 1.27 [.050] 8X 1.78 [.070] MAX .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 E .1497 .1574 3.80 4.00 e .050 BAS IC e1 6X e MILLIMETERS MAX A 8X 0.72 [.028] INCHES MIN .025 BAS IC 1.27 BAS IC 0.635 BAS IC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0° 8° 0° 8° K x 45° e1 A C y 0.10 [.004] 8X b 0.25 [.010] A1 8X L 8X c 7 C A B NOT ES: 1. DIMENSIONING & TOLE RANCING PE R ASME Y14.5M-1994. 5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROT RUS IONS NOT TO EXCEED 0.15 [.006]. 2. CONTROLLING DIMENS ION: MILLIMET ER 6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS . MOLD PROT RUS IONS NOT TO EXCEED 0.25 [.010]. 3. DIMENSIONS ARE S HOWN IN MILLIME TE RS [INCHE S]. 4. OUT LINE CONFORMS T O JEDEC OUTLINE MS -012AA. 8-Lead SOIC 7 DIMENS ION IS T HE LENGT H OF LEAD FOR SOLDERING T O A SUBST RATE. 01-6027 01-0021 11 (MS-012AA) IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 6/11/2001 10 www.irf.com