IRF IRFI9610G

PD - 94577
IRFI9610G
l
l
l
l
l
l
Isolated Package
High Voltage Isolation=2.5KVRMS …
Sink to Lead Creepage Dist.=4.8mm
P-Channel
Dynamic dv/dt Rating
Low thermal Resistance
HEXFET® Power MOSFET
D
VDSS = -200V
RDS(on) = 3.0Ω
G
ID = -2.0A
S
Description
Third Generation HEXFETs from International Rectifier provide the designer with the
best combination of fast switching, ruggedized device design, low on-resistance and
cost-effectiveness.Third Generation HEXFETs from International Rectifier provide the
designer with the best combination of fast switching, ruggedized device design, low
on-resistance and cost-effectiveness.
The TO-220 Fullpak eliminates the need for additional insulating hardware in commercialindustrial applications. The moulding compound used provides a high isolation capability
and a low thermal resistance between the tab and external heatsink. This isolation is
equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak
is mounted to a heatsink using a single clip or by a single screw fixing.
TO-220 Full-Pak
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
V GS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
-2.0
-1.3
-8.0
27
0.22
± 20
100
-2.0
2.7
-11
-55 to + 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
300 (1.6mm from case )
10 lbf•in (1.1N•m)
°C
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
4.6
65
°C/W
10/28/02
IRFI9610G
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-200
–––
–––
-2.0
0.7
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
LD
Internal Drain Inductance
–––
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V(BR)DSS
IDSS
IGSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
Typ.
–––
-0.22
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
12
17
19
15
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, ID = -1mA
3.0
Ω
VGS = -10V, I D = -1.2A „
-4.0
V
VDS = VGS, ID = -250µA
–––
S
VDS = -50V, ID = -1.2A
-100
VDS = -200V, VGS = 0V
µA
-500
VDS = -160V, VGS = 0V, TJ = 125°C
100
VGS = 20V
nA
-100
VGS = -20V
13
ID = -2.0A
3.2
nC VDS = -160V
7.3
VGS = -10V, See Fig. 6 and 13 „
–––
VDD = -100V
–––
ID = -2.0A
ns
–––
RG = 24Ω
–––
VGS = -10V, See Fig. 10 „
D
Between lead,
4.5 –––
6mm (0.25in.)
nH
G
from package
7.5 –––
and center of die contact
S
180 –––
VGS = 0V
66 –––
pF
VDS = -25V
12 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
V SD
t rr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -2.0
showing the
A
G
integral reverse
––– ––– -8.0
p-n junction diode.
S
––– ––– -5.8
V
TJ = 25°C, I S = -2.0A, VGS = 0V „
––– 130 200
ns
TJ = 25°C, IF = -2.0A
––– 700 1050 nC di/dt = -100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
ƒ ISD ≤ -2.0A, di/dt ≤ -250A/µs, VDD ≤ V(BR)DSS,
‚ Starting TJ = 25°C, L = 51mH
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
… t =60s, f=60Hz.
max. junction temperature. ( See fig. 11 )
RG = 25Ω, I AS = -2.0A. (See Figure 12)
TJ ≤ 150°C
IRFI9610G
10
10
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM -4.5V
-I D, Drain-to-Source Current (A)
-I D, Drain-to-Source Current (A)
1
-4.5V
0.1
0.01
1
10
1
-4.5V
0.1
20µs PULSE WIDTH
Tj = 150°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.01
0.1
100
1
10
100
-VDS, Drain-to-Source Voltage (V)
-VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics,
TJ = 150oC
Fig 1. Typical Output Characteristics,
TJ = 25oC
10
T J = 150°C
1
VDS = -50V
20µs PULSE WIDTH
0
ID = -2.0A
VGS = -10V
2.0
(Normalized)
RDS(on) , Drain-to-Source On Resistance
2.5
TJ = 25°C
-I D, Drain-to-Source Current (Α)
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM -4.5V
TOP
TOP
1.5
1.0
0.5
4.0
5.0
6.0
7.0
8.0
9.0
10.0
-VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
11.0
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRFI9610G
350
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds
300
Crss = Cgd
Coss = Cds + Cgd
20
ID= -2.0A
SHORTED
-V GS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
400
250
Ciss
200
150
Coss
100
50
Crss
VDS= -160V
VDS= -100V
VDS= -40V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
1
10
0
100
4
6
8
10
12
14
Q G Total Gate Charge (nC)
-VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
-I D, Drain-to-Source Current (A)
10.0
-I SD, Reverse Drain Current (A)
2
T J = 150°C
1.0
TJ = 25°C
OPERATION IN THIS AREA
LIMITED BY R DS(on)
10
100µsec
1
1msec
VGS = 0V
0.1
0.1
0.0
1.0
2.0
3.0
4.0
-VSD, Source-toDrain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
5.0
Tc = 25°C
Tj = 150°C
Single Pulse
10
10msec
100
-VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
1000
IRFI9610G
2.0
VDS
VGS
-ID , Drain Current (A)
1.6
RD
D.U.T.
RG
+
V DD
1.2
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
0.8
Fig 10a. Switching Time Test Circuit
0.4
td(on)
tr
t d(off)
tf
VGS
0.0
10%
25
50
75
100
125
150
T J , Junction Temperature (°C)
90%
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
Fig 10b. Switching Time Waveforms
Thermal Response ( Z thJC )
10
D = 0.50
0.20
1
0.10
0.05
0.02
0.1
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
IRFI9610G
240
D.U.T
RG
IAS
-20V
tp
VDD
A
DRIVER
0.01Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
EAS, Single Pulse Avalanche Energy (mJ)
L
VDS
ID
-0.9A
TOP
-1.3A
BOTTOM -2.0A
200
160
120
80
40
0
25
50
I AS
75
100
125
Starting T J , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.3µF
-10V
QGS
.2µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
150
IRFI9610G
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+

RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
V DD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
[ISD ]
IRFI9610G
TO-220 Full-Pak Package Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
ø
3.40 (.133)
3.10 (.123)
4.80 (.189)
4.60 (.181)
-A3.70 (.145)
3.20 (.126)
16.00 (.630)
15.80 (.622)
2.80 (.110)
2.60 (.102)
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
7.10 (.280)
6.70 (.263)
1.15 (.045)
MIN.
NOTES:
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982
1
2
3
2 CONTROLLING DIMENSION: INCH.
3.30 (.130)
3.10 (.122)
-B-
13.70 (.540)
13.50 (.530)
C
A
3X
1.40 (.055)
1.05 (.042)
0.90 (.035)
3X
0.70 (.028)
0.25 (.010)
3X
M A M
0.48 (.019)
0.44 (.017)
2.85 (.112)
2.65 (.104)
B
2.54 (.100)
2X
D
B
MINIMUM CREEPAGE
DISTANCE BETWEEN
A-B-C-D = 4.80 (.189)
TO-220 Full-Pak Part Marking Information
EXAMPLE: THIS IS AN IRFI840G
WIT H AS S EMBLY
LOT CODE 3432
AS S EMBLED ON WW 24 1999
IN T HE AS S EMBLY LINE "K"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFI840G
924K
34
AS S EMBLY
LOT CODE
32
DAT E CODE
YEAR 9 = 1999
WEEK 24
LINE K
Data and specifications subject to change without notice.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.10/02