PD - 96137 IRF6722SPbF IRF6722STRPbF DirectFET Power MOSFET l l l l l l l l l l RoHS Compliant Containing No Lead and Bromide Low Profile (<0.7 mm) Dual Sided Cooling Compatible Ultra Low Package Inductance Optimized for High Frequency Switching Ideal for CPU Core DC-DC Converters Optimized for Control FET application Low Conduction and Switching Losses Compatible with existing Surface Mount Techniques 100% Rg tested Typical values (unless otherwise specified) VDSS VGS RDS(on) RDS(on) 30V max ±20V max 4.7mΩ@ 10V 8.0mΩ@ 4.5V Qg Qgd Qgs2 Qrr Qoss Vgs(th) 4.1nC 1.2nC 30nC 11nC 1.9V tot 11nC DirectFET ISOMETRIC ST Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SQ SX MQ ST MX MT MP Description The IRF6722SPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6722SPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6722SPbF has been optimized for parameters that are critical in synchronous buck operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses. Absolute Maximum Ratings Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V VGS ID @ TA = 25°C ID @ TA = 70°C ID @ TC = 25°C IDM EAS IAS g Pulsed Drain Current Single Pulse Avalanche Energy Avalanche Current g h Typical RDS(on) (mΩ) 20 ID = 13A 15 10 TJ = 125°C 5 T J = 25°C 0 2 4 6 8 10 12 14 16 18 20 VGS, Gate -to -Source Voltage (V) Fig 1. Typical On-Resistance vs. Gate Voltage Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state. www.irf.com e e f VGS, Gate-to-Source Voltage (V) VDS Max. Units 30 ±20 13 11 58 110 82 11 V A mJ A 14 ID= 11A 12 VDS= 24V VDS= 15V 10 8 6 4 2 0 0 4 8 12 16 20 24 28 QG Total Gate Charge (nC) Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 1.45mH, RG = 25Ω, IAS = 11A. 1 11/12/07 IRF6722SPbF Static @ TJ = 25°C (unless otherwise specified) Parameter BVDSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS Min. Conditions Typ. Max. Units VGS = 0V, ID = 250µA Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient 30 ––– ––– 22 ––– ––– V mV/°C Reference to 25°C, ID = 1mA mΩ VGS = 10V, ID = 13A Static Drain-to-Source On-Resistance ––– ––– 4.7 8.0 7.3 10.3 Gate Threshold Voltage Gate Threshold Voltage Coefficient 1.4 ––– 1.9 -6.0 2.4 ––– V mV/°C Drain-to-Source Leakage Current ––– ––– ––– ––– 1.0 150 µA VDS = 24V, VGS = 0V i i VGS = 4.5V, ID = 11A VDS = VGS, ID = 50µA IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage ––– ––– ––– ––– 100 -100 nA VDS = 24V, VGS = 0V, TJ = 125°C VGS = 20V gfs Qg Qgs1 Forward Transconductance Total Gate Charge 23 ––– ––– 11 ––– 17 S VGS = -20V VDS = 15V, ID = 11A Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge ––– ––– 2.5 1.2 ––– ––– Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) ––– ––– 4.1 3.0 ––– ––– Output Charge ––– ––– 5.3 11 ––– ––– Gate Resistance Turn-On Delay Time ––– ––– 1.4 7.7 2.5 ––– Ω Rise Time Turn-Off Delay Time ––– ––– 11 8.5 ––– ––– ns VDD = 15V, VGS = 4.5V ID = 11A Fall Time Input Capacitance ––– ––– 5.7 1320 ––– ––– Output Capacitance Reverse Transfer Capacitance ––– ––– 490 150 ––– ––– pF See Fig. 17 VGS = 0V VDS = 15V Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss VDS = 15V nC VGS = 4.5V ID = 11A See Fig. 15 nC VDS = 16V, VGS = 0V i RG = 1.8Ω ƒ = 1.0MHz Diode Characteristics Min. Typ. Max. Units Continuous Source Current (Body Diode) Parameter ––– ––– ISM Pulsed Source Current (Body Diode) ––– ––– 110 VSD Diode Forward Voltage ––– 0.80 trr Reverse Recovery Time Reverse Recovery Charge ––– ––– 21 30 IS Qrr g Conditions A MOSFET symbol showing the 1.0 V integral reverse p-n junction diode. TJ = 25°C, IS = 11A, VGS = 0V 32 45 ns nC 52 TJ = 25°C, IF = 11A di/dt = 500A/µs i i Notes: Pulse width ≤ 400µs; duty cycle ≤ 2%. 2 www.irf.com IRF6722SPbF Absolute Maximum Ratings e e f PD @TA = 25°C PD @TA = 70°C PD @TC = 25°C TP TJ TSTG Max. Units 2.2 1.4 42 270 -40 to + 150 W Parameter Power Dissipation Power Dissipation Power Dissipation Peak Soldering Temperature Operating Junction and Storage Temperature Range °C Thermal Resistance Parameter el jl kl fl RθJA RθJA RθJA RθJC RθJ-PCB Junction-to-Ambient Junction-to-Ambient Junction-to-Ambient Junction-to-Case Junction-to-PCB Mounted Linear Derating Factor e Typ. Max. Units ––– 12.5 20 ––– 1.0 58 ––– ––– 3.0 ––– °C/W 0.017 W/°C Thermal Response ( Z thJA ) 100 10 D = 0.50 0.20 0.10 0.05 1 0.02 0.01 τJ 0.1 R1 R1 τJ τ1 R2 R2 R3 R3 τA τ2 τ1 τ3 τ2 0.001 1E-006 0.0001 22.8 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 τA 20.943 Ci= τi/Ri Ci= τi/Ri 0.01 τ3 Ri (°C/W) τi (sec) 5.918 0.002411 31.143 0.5773 0.001 0.01 0.1 1 10 100 1000 t1 , Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient Notes: Used double sided cooling , mounting pad with large heatsink. Mounted on minimum footprint full size board with metalized Rθ is measured at TJ of approximately 90°C. back and with small clip heatsink. Surface mounted on 1 in. square Cu (still air). www.irf.com Mounted to a PCB with small clip heatsink (still air) Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air) 3 IRF6722SPbF 1000 1000 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V 100 10 1 2.5V BOTTOM 10 2.5V 1 ≤60µs PULSE WIDTH ≤60µs PULSE WIDTH Tj = 150°C Tj = 25°C 0.1 0.1 1 10 0.1 100 0.1 1000 Fig 4. Typical Output Characteristics 100 1000 2.0 VDS = 15V ≤60µs PULSE WIDTH ID = 13A Typical RDS(on) (Normalized) ID, Drain-to-Source Current (A) 10 Fig 5. Typical Output Characteristics 1000 100 T J = 150°C T J = 25°C 10 T J = -40°C 1 0.1 V GS = 10V V GS = 4.5V 1.5 1.0 0.5 1 2 3 4 5 6 30 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd Typical RDS(on) ( mΩ) Ciss Coss Crss T J = 25°C Vgs = 3.5V Vgs = 4.0V Vgs = 4.5V Vgs = 5.0V Vgs = 8.0V Vgs = 10V 25 C oss = C ds + C gd 1000 20 40 60 80 100 120 140 160 Fig 7. Normalized On-Resistance vs. Temperature Fig 6. Typical Transfer Characteristics 10000 -60 -40 -20 0 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) C, Capacitance(pF) 1 V DS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) 20 15 10 5 100 0 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 8. Typical Capacitance vs.Drain-to-Source Voltage 4 VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.5V 0 20 40 60 80 100 120 ID, Drain Current (A) Fig 9. Typical On-Resistance vs. Drain Current and Gate Voltage www.irf.com IRF6722SPbF 1000 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 T J = 150°C 100 T J = 25°C T J = -40°C 10 1 VGS = 0V 0.4 0.5 0.6 0.7 0.8 0.9 1.0 100µsec 10 1msec 10msec 1 DC T A = 25°C T J = 150°C 0.1 Single Pulse 0.01 0 0.3 OPERATION IN THIS AREA LIMITED BY R DS(on) 0.01 1.1 VSD, Source-to-Drain Voltage (V) Fig 10. Typical Source-Drain Diode Forward Voltage Typical VGS(th) Gate threshold Voltage (V) 40 30 20 10 0 75 100 125 10.00 100.00 3.0 2.5 2.0 ID = 50µA ID = 150µA ID = 250µA ID = 1.0mA 1.5 ID = 1.0A 1.0 -75 -50 -25 150 0 25 50 75 100 125 150 T J , Temperature ( °C ) T C , Case Temperature (°C) Fig 13. Typical Threshold Voltage vs. Junction Temperature Fig 12. Maximum Drain Current vs. Case Temperature 350 EAS , Single Pulse Avalanche Energy (mJ) ID, Drain Current (A) 50 50 1.00 Fig11. Maximum Safe Operating Area 60 25 0.10 VDS, Drain-to-Source Voltage (V) ID TOP 0.98A 1.23A BOTTOM 11A 300 250 200 150 100 50 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 14. Maximum Avalanche Energy vs. Drain Current www.irf.com 5 IRF6722SPbF Id Vds Vgs L VCC DUT 0 20K 1K Vgs(th) S Qgodr Fig 15a. Gate Charge Test Circuit Qgd Qgs2 Qgs1 Fig 15b. Gate Charge Waveform V(BR)DSS 15V DRIVER L VDS tp D.U.T V RGSG + - VDD IAS 20V tp I AS 0.01Ω Fig 16b. Unclamped Inductive Waveforms Fig 16a. Unclamped Inductive Test Circuit VDS VGS RG VDS RD 90% D.U.T. + - VDD VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 17a. Switching Time Test Circuit 6 A 10% VGS td(on) tr t d(off) tf Fig 17b. Switching Time Waveforms www.irf.com IRF6722SPbF Driver Gate Drive D.U.T + - RG * • • • • *** D.U.T. ISD Waveform Reverse Recovery Current + dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD ** P.W. Period VGS=10V Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer - D= Period P.W. + + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% * Use P-Channel Driver for P-Channel Measurements ** Reverse Polarity for P-Channel ISD *** VGS = 5V for Logic Level Devices Fig 18. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs DirectFET Substrate and PCB Layout, ST Outline (Small Size Can, T-Designation). Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. G = GATE D = DRAIN S = SOURCE D G D www.irf.com S S D D 7 IRF6722SPbF DirectFET Outline Dimension, ST Outline (Small Size Can, T-Designation). Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. DIMENSIONS METRIC MAX CODE MIN 4.85 A 4.75 3.95 B 3.70 2.85 C 2.75 0.45 D 0.35 0.62 E 0.58 0.62 F 0.58 0.79 G 0.75 0.57 H 0.53 0.30 J 0.26 0.98 K 0.88 2.28 L 2.18 M 0.616 0.676 R 0.020 0.080 0.17 P 0.08 IMPERIAL MIN MAX 0.187 0.191 0.146 0.156 0.108 0.112 0.014 0.018 0.023 0.024 0.023 0.024 0.030 0.031 0.021 0.022 0.010 0.012 0.035 0.039 0.086 0.090 0.0235 0.0274 0.0008 0.0031 0.003 0.007 DirectFET Part Marking GATE MARKING LOGO PART NUMBER BATCH NUMBER DATE CODE Line above the last character of the date code indicates "Lead-Free" 8 www.irf.com IRF6722SPbF DirectFET Tape & Reel Dimension (Showing component orientation). NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6722STRPBF). For 1000 parts on 7" reel, order IRF6722STR1PBF REEL DIMENSIONS STANDARD OPTION (QTY 4800) TR1 OPTION (QTY 1000) IMPERIAL IMPERIAL METRIC METRIC MIN MAX CODE MIN MAX MAX MIN MAX MIN 12.992 N.C 6.9 N.C 177.77 N.C 330.0 A N.C 0.795 N.C B 0.75 N.C N.C N.C 19.06 20.2 0.504 0.50 C 0.53 0.520 13.5 12.8 13.2 12.8 0.059 D 0.059 1.5 1.5 N.C N.C N.C N.C 3.937 E 2.31 58.72 100.0 N.C N.C N.C N.C F N.C N.C 0.724 N.C N.C 0.53 18.4 13.50 0.488 G 0.47 11.9 12.4 N.C 0.567 14.4 12.01 0.469 H 0.47 11.9 11.9 0.606 15.4 12.01 N.C LOADED TAPE FEED DIRECTION NOTE: CONTROLLING DIMENSIONS IN MM CODE A B C D E F G H DIMENSIONS METRIC IMPERIAL MIN MIN MAX MAX 0.311 0.319 7.90 8.10 0.154 0.161 3.90 4.10 0.469 11.90 12.30 0.484 0.215 5.45 5.55 0.219 0.201 5.10 5.30 0.209 0.256 6.50 6.70 0.264 0.059 1.50 N.C N.C 0.059 1.50 1.60 0.063 Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.11/2007 www.irf.com 9