INFINEON TDA4863-2

D a t a S h e e t, V 1. 2 , F e b r ua r y 20 0 4
Boost Controller
TDA4863-2
Power Factor Controller
IC for High Power Factor
and Low THD
http://www.infineon.com/pfc
Power Management & Supply
N e v e r
s t o p
t h i n k i n g .
TDA4863-2
Revision History:
2004-02
V1.2
Previous Version:
Page
Subjects (major changes since last revision)
Change footnote in Section 3.2 Electrical Characteristics: February 2004
Change layout: February 2004
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Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com.
Edition 2004-02
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2002.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
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Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
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be endangered.
TDA4863-2
1
1.1
1.2
1.3
1.4
1.5
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Improvements Compared to TDA 4862 and TDA4863 . . . . . . . . . . . . . . . .
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
IC Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Voltage Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Overvoltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current Sense Comparator, LEB and RS Flip-Flop . . . . . . . . . . . . . . . . . . 10
Zero Current Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Restart Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Gate Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Signal Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
3.1
3.2
3.3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
4.1
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Results of THD Measurements with Application Board Pout = 110 W . . . . 22
5
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Data Sheet
3
4
4
4
5
6
8
13
13
14
17
V1.2, 2004-02
Power Factor Controller
IC for High Power Factor
and Low THD
TDA4863-2
Final Data
1
Boost Controller
Overview
1.1 Features
• IC for sinusoidal line-current consumption
• Power factor achieves nearly 1
• Controls boost converter as active harmonic
filter for low THD
• Start up with low current consumption
• Zero current detector for discontinuous
operation mode
• Output overvoltage protection
• Output undervoltage lockout
• Internal start up timer
• Totem pole output with active shut down
• Internal leading edge blanking LEB
P-DIP-8-4
P-DSO-8-3
1.2 Improvements Compared to TDA 4862 and
TDA4863
•
•
•
•
•
•
Suitable for universal input applications with low THD at low load conditions
Very low start up current
Accurate OVR and VISENSEmax threshold
Competition compatible VCC thresholds
Enable threshold referred to VVSENSE
Compared to TDA4863 a bigger MOS Transistor can be driven (see 2.10)
Type
Ordering Code
Package
TDA4863-2
Q67040-S4620
P-DIP-8-4
TDA4863-2G
Q67040-S4621
P-DSO-8-3
Data Sheet
4
V1.2, 2004-02
TDA4863-2
Overview
AC
line
RF-Filter
and
Rectifier
DC Output
Volage
TDA4863-2
GND
Figure 1
1.3
Typical application
Description
The TDA4863-2 IC controls a boost converter in a way that sinusoidal current is taken
from the single phase line supply and stabilized DC voltage is available at the output.
This active harmonic filter limits the harmonic currents resulting from the capacitor
pulsed charge currents during rectification. The power factor which describes the ratio
between active and apparent power is almost one. Line voltage fluctuations can be
compensated very efficiently.
Data Sheet
5
V1.2, 2004-02
TDA4863-2
Overview
1.4
Figure 2
Data Sheet
Pin Configuration
1 VSENSE
8 VCC
2 VAOUT
7 GTDRV
3 MULTIN
6 GND
4 ISENSE
5 DETIN
Pin Configuration of TDA4863-2
6
V1.2, 2004-02
TDA4863-2
Overview
Pin Definitions and Functions
Pin
Symbol
1
VSENSE Voltage Amplifier Inverting Input
VSENSE is connected via a resistive divider to the boost converter
output. With a capacitor connected to VAOUT the internal error
amplifier acts as an integrator.
2
VAOUT
Voltage Amplifier Output
VVAOUT is connected internally to the first multiplier input. To prevent
overshoot the input voltage is clamped internally at 5 V. If VVAOUT is
less than 2.2 V the gate driver is inhibited. If the current flowing into
this pin exceeds an internal threshold the multiplier output voltage is
reduced to prevent the MOSFET from overvoltage damage.
3
MULTIN
Multiplier Input
MULTIN is the second multiplier input and is connected via a resistive
divider to the rectifier output voltage.
4
ISENSE
Current Sense Input
ISENSE is connected to a sense resistor controlling the MOSFET
source current. The input is internally clamped at -0.3 V to prevent
negative input voltage interaction. A leading edge blanking circuitry
suppresses voltage spikes when turning the MOSFET on.
5
DETIN
Zero Current Detector Input
DETIN is connected to an auxiliary winding and monitors the zero
crossing of the inductor current.
6
GND
Ground
7
GTDRV
Gate Driver Output
GTDRV is the output of a totem-pole circuitry for direct driving a
MOSFET. Compared with TDA4863 the TDA4863-2 can drive 20A
MOSFETS. To achieve this the gate output voltage VGTLat IGT=0A has
been set to 0.85 V. An active shutdown circuitry ensures that GTDRV
is set to low if the IC is switched off.
8
VCC
Positive Voltage Supply
If VCC exceeds the turn-on threshold the IC is switched on. When VCC
falls below the turn-off threshold the IC is switched off. In switch off
mode power consumption is very low. Two capacitors should be
connected to VCC. An electrolytic capacitor and 100 nF ceramic
capacitor which is used to absorb fast supply current spikes. Make
sure that the electrolytic capacitor is discharged before the IC is
plugged into the application board.
Data Sheet
Description
7
V1.2, 2004-02
TDA4863-2
Overview
1.5
Block Diagram
VCC
GND
DETIN
tres=150us
5V
20V
+
-
0.5V
+
12.5V
+
0.2V
Restart
Timer
Clamp
Current
Reference
Voltage
Vref
UVLO
10V
-
Detector
-
Enable
1.0V
RS
Flip-Flop
Gate
Drive
GTDRV
1.5V
+
2.2V
-
Inhibit
time delay
Inhibit
-
tdVA=2us
+
LEB
2.5V
+
Voltage
Amp
Multiplier
multout
+
+
1V
-
tdsd=70ns
Current
Comp
1V
+
3.5V
-
Vref
+
uvlo
active
shut down
-
OVR
5.4V
5p
VSENSE
Figure 3
Data Sheet
VAOUT
MULTIN
40k
ISENSE
Internal Bolck Diagram
8
V1.2, 2004-02
TDA4863-2
Functional Description
2
Functional Description
2.1
Introduction
Conventional electronic ballasts and switch mode power supplies are designed with a
bridge rectifier and a bulk capacitor. Their disadvantage is that the circuit draws power
from the line when the instantaneous AC voltage exceeds the capacitors voltage. This
occurs near the line voltage peak and causes a high charge current spike with following
characteristics: The apparent power is higher than the real power that means low power
factor condition, the current spikes are non sinusoidal with a high content of harmonics
causing line noise, the rectified voltage depends on load condition and requires a large
bulk capacitor, special efforts in noise suppression are necessary.
With the TDA4863-2 preconverter a sinusoidal current is achieved which varies in direct
instantaneous proportional to the input voltage half sine wave and so provides a power
factor near 1. This is due to the appearance of almost any complex load like a resistive
one at the AC line. The harmonic distortions are reduced and comply with the IEC555
standard requirements.
2.2
IC Description
The TDA4863-2 contains a wide bandwidth voltage amplifier used in a feedback loop,
an overvoltage regulator, an one quadrant multiplier with a wide linear operating range,
a current sense comparator, a zero current detector, a PWM and logic circuitry, a totempole MOSFET driver, an internal trimmed voltage reference, a restart timer and an
undervoltage lockout circuitry.
2.3
Voltage Amplifier
With an external capacitor between the pins VSENSE and VAOUT the voltage amplifier
acts like an integrator. The integrator monitors the average output voltage over several
line cycles. Typically the integrator´s bandwidth is set below 20 Hz in order to suppress
the 100 Hz ripple of the rectified line voltage. The voltage amplifier is internally
compensated and has a gain bandwidth of 5 MHz (typ.) and a phase margin of 80
degrees. The non-inverting input is biased internally to 2.5 V. The output is directly
connected to the multiplier input.
The gate drive is disabled when VSENSE voltage is less than 0.2 V or VAOUT voltage
is less than 2.2 V.
If the MOSFET is placed nearby the controller switching interferences have to be taken
into account. The output of the voltage amplifier is designed in a way to minimize these
inteferences.
Data Sheet
9
V1.2, 2004-02
TDA4863-2
Functional Description
2.4
Overvoltage Regulator
Because of the integrator´s low bandwidth fast changes of the output voltage can’t be
regulated within an adequate time. Fast output changes occur during initial start-up,
sudden load removal, or output arcing. While the integrator´s differential input voltage
remains zero during this fast changes a peak current is flowing through the external
capacitor into pin VAOUT. If this current exceeds an internal defined margin the
overvoltage regulator circuitry reduces the multiplier output voltage. As a result the on
time of the MOSFET is reduced.
2.5
Multiplier
The one quadrant multiplier regulates the gate driver with respect of the DC output
voltage and the AC half wave rectified input voltage. Both inputs are designed to achieve
good linearity over a wide dynamic range to represent an AC line free from distortion.
Special efforts have been made to assure universal line applications with respect to a 90
to 270 V AC range.
The multiplier output is internally clamped to1.3 V. So the MOSFET is protected against
critical operating during start up.
2.6
Current Sense Comparator, LEB and RS Flip-Flop
The source current of the MOS transistor is transferred into a sense voltage via the
external sense resistor. The multiplier output voltage is compared with this sense
voltage. Switch on time of the MOS transistor is determined by the comparision result
To protect the current comparator input from negative pulses a current source is inserted
which sends current out of the ISENSE pin every time when VISENSE-signal is falling
below ground potential. An internal RC-filter is connected at the ISENSE pin which
smoothes the switch-on current spike.The remaining switch-on current spike is blanked
out via a leading edge blanking circuit with a blanking time of typ. 200 ns.
The RS Flip-Flop ensures that only one single switch-on and switch-off pulse appears at
the gate drive output during a given cycle (double pulse suppression).
2.7
Zero Current Detector
The zero current detector senses the inductor current via an auxiliary winding and
ensures that the next on-time of the MOSFET is initiated immediately when the inductor
current has reached zero. This reduces the reverse recovery losses of the boost
converter diode to a minimum. The MOSFET is switched off when the voltage drop of
the shunt resistor exceeds the voltage level of the multiplier output. So the boost current
waveform has a triangular shape and there are no deadtime gaps between the cycles.
This leads to a continuous AC line current limiting the peak current to twice of the
average current.
Data Sheet
10
V1.2, 2004-02
TDA4863-2
Functional Description
To prevent false tripping the zero current detector is designed as a Schmitt-Trigger with
a hysteresis of 0.5 V. An internal 5 V clamp protects the input from overvoltage
breakdown, a 0.6 V clamp prevents substrate injection. An external resistor has to be
used in series with the auxiliary winding to limit the current through the clamps.
2.8
Restart Timer
The restart timer function eliminates the need of an oscillator. The timer starts or restarts
the TDA4863-2 when the driver output has been off for more than 150 µs after the
inductor current reaches zero.
2.9
Undervoltage Lockout
An undervoltage lockout circuitry switches the IC on when VCC reaches the upper
threshold VCCH and switches the IC off when VCC is falling below the lower threshold VCCL.
During start up the supply current is less then 100 µA.
An internal voltage clamp has been added to protect the IC from VCC overvoltage
condition. When using this clamp special care must be taken on power dissipation.
Start up current is provided by an external start up resistor which is connected from the
AC line to the input supply voltage VCC and a storage capacitor which is connected from
VCC to ground. Be aware that this capacitor is discharged before the IC is plugged into
the application board. Otherwise the IC can be destroyed due to the high capacitor
voltage.
Bootstrap power supply is created with the previous mentioned auxiliary winding and a
diode (see “Application Circuit” on Page 21).
2.10
Gate Drive
The TDA4863-2 totem pole output stage is MOSFET compatible. An internal protection
ciruitry is activated when VCC is within the start up phase and ensures that the MOSFET
is turned off. The totem pole output has been optimized to achieve minimized cross
conduction current during high speed operation.
Compared to TDA4863 a bigger MOS Transistor can be driven by the TDA4863-2. When
a big MOSFET is used in applications with TDA4863, for example SPP20N60C3, the
falling edge of the gate drive voltage can swing under GND and can cause false
triggering of the IC. To prevent false triggering the gate drive voltage of theTDA 4863-2
at low state and gate current IGT= 0mA is set to VGTL= 0.85V (TDA4863: VGTL=0.25V).
The difference between TDA4863-2 and TDA4863 is also depicted in diagramm: gate
drive voltage low state on page 20.
Data Sheet
11
V1.2, 2004-02
TDA4863-2
Functional Description
2.11
Signal Diagrams
IVAOUT
IOVR
DETIN
GTDRV
LEB
VISENSE
multout
Icoil
Figure 4
Data Sheet
Typical signals
12
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
3
Electrical Characteristics
3.1
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
min.
Supply + Zener Current
ICCH + IZ
Supply Voltage
VCC
Voltage at Pin 1,3,4
Current into Pin 2
Unit Remarks
max.
20
mA
-0.3
VZ
V
VZ = Zener
Voltage
ICC +IZ = 20 mA
-0.3
6.5
mA
VVAOUT = 4 V,
VVSENSE = 2.8 V
VVAOUT = 0 V,
VVSENSE = 2.3 V
t < 1 ms
40
IVAOUT
-10
Current into Pin 5
IDETIN
10
DETIN > 6 V
DETIN < 0.4 V
t < 1 ms
500
t < 1 ms
-10
Current into Pin 7
IGTDRV
-500
ESD Protection
2000
V
°C
Storage Temperature
Tstg
-50
150
Operating Junction Temperature
TJ
-40
150
Thermal Resistance
Junction-Ambient
RthJA
Data Sheet
100
180
13
MIL STD 883C
method 3015.6,
100 pF,1500 Ω
K/W P-DIP-8-4
P-DSO-8-3
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
3.2
Characteristics
Unless otherwise stated, -40°C < Tj < 150°C, VCC = 14.5 V
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
typ.
max.
18
20
22
V
ICC + IZ = 20 mA
Start-Up circuit
Zener Voltage
VZ
Start-up Supply Current
ICCL
20
100
µA
VCC = VCCON -0.5 V
Operating Supply Current
ICCH
4
6
mA
Output low
VCC Turn-ON Threshold
VCCON
12
12.5
13
V
VCC Turn-OFF Threshold
VCCOFF
9.5
10
10. 5
VCC Hysteresis
VCCHY
2.5
Voltage Amplifier
Voltage feedback Input
Threshold
VFB
Line Regulation
VFBLR
Open Loop Voltage Gain1)
GV
100
dB
Unity Gain Bandwidth1)
BW
5
MHz
Phase Margin1)
M
80
Degr
Bias Current VSENSE
IBVSENSE -1.0
-0.3
µA
Enable Threshold
VVSENSE
0.17
0.2
0.25
Inhibit Threshold Voltage
VVAOUTI
2.1
2.2
2.3
Inhibit Time Delay
tdVA
3
µs
VISENSE = -0.38 V
Output Current Source
IVAOUTH
-6
mA
VVAOUT = 0 V
VVSENSE = 2.3 V,
t < 1 ms
Output Current Sink
IVAOUTL
35
Upper Clamp Voltage
VVAOUTH 4.8
5.4
6.0
V
VVSENSE = 2.3 V,
IVAOUT = -0.2 mA
Lower Clamp Voltage
VVAOUTL
0.8
1.1
1.4
V
VVSENSE = 2.8 V,
IVAOUT = 0.5 mA
1)
2.45
2.5
2.55
V
5
mV
VCC = 12 V to 16 V
V
VISENSE = -0.38 V
VVAOUT = 4 V
VVSENSE = 2.8 V,
t < 1 ms
not subject to production - verified by characterization
Data Sheet
14
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
3.2
Characteristics (cont’d)
Unless otherwise stated, -40°C < Tj < 150°C, VCC = 14.5 V
Parameter
Symbol
Limit Values
Unit
Test Condition
min.
typ.
max.
IOVR
35
40
45
µA
Tj = 25°C ,
VVAOUT = 3.5 V
Input Bias Current
IBISENSE
-1
-0.2
1
µA
VISENSE = 0 V
Input Offset Voltage
(Tj = 25 °C)
VISENSEO
25
mV
VVAOUT = 2.7 V
VMULTIN = 0 V
Max Threshold Voltage
VISENSEM 0.95
1.0
Threshold at OVR
VISENOVR
0.05
Leading Edge Blanking
tLEB
Shut Down Delay
Overvoltage Regulator
Threshold Current
Current Comparator
100
1.05
V
IOVR = 50 µA
200
300
tdISG
80
130
Upper Threshold Voltage
VDETINU
1.5
1.6
Lower Threshold Voltage
VDETINL
0.95
1.1
Hysteresis
VDETINHY 0.25
0.4
0.55
Input Current
IBDETIN
-0.2
1
Input Clamp Voltage
High State
Low State
VDETINHC 4.5
VDETINLC 0.1
4.9
0.4
5.4
0.7
-0.2
1
ns
Detector
-1
V
µA
VDETIN = 2 V
V
IDETIN = 5 mA
IDETIN = -5 mA
Multiplier
Input bias current
IBMULTIN
Dynamic voltage range
MULTIN
VMULTIN
0 to 4
Dynamic voltage range
VAOUT
VVAOUT
VFB to
VFB +
1.5
VMULTIN = 1 V
Multiplier Gain
Klow
0.3
Khigh
0.7
VVAOUT < 3 V,
VMULTIN = 1 V
VVAOUT > 3.5V,
VMULTIN = 1 V
-1
µA
VMULTIN = 0 V
V
VVAOUT = 2.75 V
K = deltaVISENSE /deltaVVAOUT at VMULTIN = constant
Data Sheet
15
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
3.2
Characteristics (cont’d)
Unless otherwise stated, -40°C < Tj < 150°C, VCC = 14.5 V
Parameter
Symbol
Limit Values
min.
typ.
max.
100
160
250
Unit
Test Condition
Restart Timer
Restart time
tRES
µs
Gate Drive
Gate drive voltage low state
VGTL
0.85
VGTL
1.0
IGT = 0 mA
V
IGT = 2 mA
1.7
IGT = 20 mA
2.2
IGT = 200 mA
Gate drive voltage high state VGTH
10.8
IGT = -5 mA,
see “Gate Drive
Voltage High
State versus
Vcc” on Page 20
Gate drive voltage active shut VGTSD
down
1
1.25
Rise time
trise
80
130
Fall time
tfall
55
130
Data Sheet
16
IGT = 20 mA,
VCC = 9 V
ns
CGT = 4.7 nF
VGT = 2...8 V
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
3.3
Electrical Diagrams
Icc versus Vcc
VCCON/OFF versus Temperature
5
14
4,5
13
4
VCC ON
12
3,5
Vcc / V
Icc / mA
3
2,5
VCC OFF
2
VCC ON
11
10
VCC OFF
1,5
9
1
8
0,5
0
7
0
5
10
15
20
-40
0
Vcc/V
80
120
160
Tj / °C
Iccl versus Vcc
ICCL versus Temperature, VCC = 10 V
50
50
45
45
40
40
35
35
30
30
ICCL / uA
Iccl / uA
40
25
25
20
20
15
15
10
10
5
5
0
0
0
2
4
6
8
10
12
14
16
-40
Vcc / V
Data Sheet
0
40
80
120
160
Tj / °C
17
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
Open Loop Gain and Phase versus
Frequency
VFB versus Temperature
(pin1 connected to pin2)
Phi/deg
GV/dB
2,55
180
120
2,54
160
2,53
Gv
100
140
2,52
VFB / V
120
80
2,51
100
2,5
60
Phi
2,49
80
40
2,48
60
2,47
40
20
2,46
20
2,45
-40
0
40
80
120
0
0,01
160
0,1
1
10
Tj / °C
100
0
1000 10000
f/kHz
Leading Edge Blanking
versus Temperature
Overvoltage Regulator VISENSE
versus Threshold Voltage
300
1,2
VVAOUT = 3.5V
250
0,8
200
LEB / ns
VISENSE / V
VMULTIN = 3.0V
1
0,6
150
0,4
100
0,2
50
0
-40
0
35
37
39
41
43
45
40
80
120
160
Tj / °C
Iovp / uA
Data Sheet
0
18
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
Current Sense Threshold VISENSE
versus VMULTIN
Current Sense Threshold VISENSE
versus VVAOUT
1
1
4.5V
0,9
Vmultin=4.0
0,9
4.0V
0,8
3.0
0,8
3.5V
0,7
0,7
0,6
0,6
2.0
VISENSE / V
VISENSE/ V
1.5
3.25V
0,5
0,4
0,3
1.0
0,5
0,4
0.5
0,3
3.0V
0,2
0,2
0,1
0.25
0,1
VAOUT=2.75V
0
0
0
1
2
3
2,5
4
3
3,5
4
4,5
VVAOUT / V
VMULTIN / V
Restart Time versus Temperature
220
200
trst / us
180
160
140
120
100
-40
0
40
80
120
160
Tj / °C
Data Sheet
19
V1.2, 2004-02
TDA4863-2
Electrical Characteristics
Gate Drive Rise Time and Fall Time
versus Temperature
Gate Drive Voltage High State
versus Vcc
12
140
11,5
IGT =-2mA
120
IGT =-20mA
11
10,5
rise
time
80
V GTH / V
rise time / ns
100
60
10
9,5
fall
time
40
IGT =-200mA
9
20
8,5
0
-40
8
0
40
80
120
11
160
13
15
Vcc / V
Tj / °C
Gate Drive Voltage Low State
versus IGT
1,8
TDA4863-2
1,6
1,4
V GTL / V
1,2
1
0,8
dotted line: TDA4863
0,6
0,4
0,2
0
0
2
4
6
8
10
IGT / mA
Data Sheet
20
V1.2, 2004-02
TDA4863-2
Application Circuit
4
Application Circuit
Application circuit: Pout=110W, universal Input Vin=90-270V AC
L1=750uH
E36/11,N27; gap=2mm
W1=85 turns,d=40x0.1
W2=17 turns, d=0.3
D5
MR856
RF filter
Vin
and
90-270V AC rectifier
Vout
410V DC
D7
D6
C13
3.3n
400V
R12
470
R8A
120k
R8B
120k
R9
33k
R6A
470k
C10
47uF
25V
8
C9
220n
7
6
R10
12
CoolMOS
SPP04N60C3
0.95 Ohm
C8
47uF
450V
5
R4A
422k
TDA4863-2
R6B
470k
1
2
3
4
R4B
422k
C1
1u
R7
9.1k
R7
9.1k
Figure 5
Data Sheet
C2
1u
R11
0.5
C4
10n
R5
5k1
GND
Pout = 110 W, Universal Input Vin = 90 - 270 V AC
21
V1.2, 2004-02
TDA4863-2
Application Circuit
4.1
Results of THD Measurements with Application Board Pout = 110 W
Current RMS(Amps)
(Measurements according to IEC61000-3-2.
150% limit (red line): Momentary measured value must be below this limit.
100% limit (blue line): Average of measured values must be below this limit.
The worst measured momentary value is shown in the diagrams.)
0,30
0,25
0,20
0,15
0,10
0,05
0,00
4
Current RMS(Amps)
Figure 6
8
12
16
20
24
Harmonic #
28
32
36
40
THD Class C:
Pmax = 110 W, Vinac = 90 V, Iout = 250 mA, Vout = 420 V, PF = 0.998
0,225
0,200
0,175
0,150
0,125
0,100
0,075
0,050
0,025
0,000
4
Figure 7
Data Sheet
8
12
16
20
24
Harmonic #
28
32
36
40
THD Class C:
Pmax = 110 W, Vinac = 220 V, Iout = 250 mA, Vaout = 420 V, PF = 0.992
22
V1.2, 2004-02
TDA4863-2
Current RMS(Amps)
Application Circuit
0,175
0,150
0,125
0,100
0,075
0,050
0,025
0,000
4
Current RMS(Amps)
Figure 8
8
12
16
20
24
Harmonic #
28
32
36
40
THD Class C:
Pmax = 110 W, Vinac = 270 V, Iout = 250 mA, Vaout = 420 V, PF = 0.978
0,30
0,25
0,20
0,15
0,10
0,05
0,00
4
Figure 9
Data Sheet
8
12
16
20
24
Harmonic #
28
32
36
40
THD Class C:
Pmax = 110 W, Vinac = 90 V, Iout = 140 mA, Vaout = 420 V, PF = 0.999
23
V1.2, 2004-02
TDA4863-2
Current RMS(Amps)
Application Circuit
0,125
0,100
0,075
0,050
0,025
0,000
4
Current RMS(Amps)
Figure 10
8
12
16
20
24
Harmonic #
28
32
36
40
THD Class C:
Pmax = 110 W, Vinac = 220 V, Iout = 140 mA, Vaout = 420 V, PF = 0.975
0,10
0,09
0,08
0,07
0,06
0,05
0,04
0,03
0,02
0,01
0,00
4
Figure 11
Data Sheet
8
12
16
20
24
Harmonic #
28
32
36
40
THD Class C:
Pmax = 110 W, Vinac = 270 V, Iout = 140 mA, Vaout = 420 V, PF = 0.883
24
V1.2, 2004-02
TDA4863-2
Package Outlines
5
Package Outlines
2.54
0.46 ±0.1
0.35 8x
8
7.87 ±0.38
0.25 +0.1
3.25 MIN.
0.38 MIN.
1.7 MAX.
4.37 MAX.
P-DIP-8-4
(Plastic Dual In-line Package)
6.35 ±0.25 1)
8.9 ±1
5
1
4
9.52 ±0.25 1)
1)
Does not include plastic or metal protrusion of 0.25 max. per side
GPD05583
Index Marking
Figure 12
Data Sheet
25
V1.2, 2004-02
TDA4863-2
Package Outlines
P-DSO-8-3
(Plastic Dual Small Outline)
1.27
0.1
0.41 +0.1
-0.05
.01
0.2 +0.05
-0
C
0.64 ±0.25
0.2 M A C x8
8
5
Index
Marking 1
4
5 -0.21)
8˚ MAX.
4 -0.21)
1.75 MAX.
0.1 MIN.
(1.5)
0.33 ±0.08 x 45˚
6 ±0.2
A
Index Marking (Chamfer)
Does not include plastic or metal protrusion of 0.15 max. per side
GPS09032
1)
Figure 13
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Data Sheet
26
Dimensions in mm
V1.2, 2004-02
In f i n e o n g o e s f or B u s i n e s s E x c el len c e
“Business excellence means intelligent approaches and clearly
defined processes, which are both constantly under review and
ultimately lead to good operating results.
Better operating results and business excellence mean less
idleness and wastefulness for all of us, more professional
success, more accurate information, a better overview and,
thereby, less frustration and more satisfaction.”
Dr. Ulrich Schumacher
www.infineon.com
Published by Infineon Technologies AG