5-V Low-Drop Fixed Voltage Regulator TLE 4268 Features • • • • • • • • • • Output voltage tolerance ≤ ± 2 % Very low current consumption Low-drop voltage Watchdog Settable reset threshold Overtemperature protection Reverse polarity protection Short-circuit proof Suitable for use in automotive electronics Wide temperature range Type Ordering Code Package TLE 4268 GS Q67006-A9229 P-DSO-8-1 (SMD) TLE 4268 G Q67006-A9146 P-DSO-20-6 (SMD) P-DSO-8-1 P-DSO-20-6 Functional Description This device is a 5-V low-drop fixed-voltage regulator. The maximum input voltage is 45 V. It can deliver an output current of at least 180 mA. The IC is short-circuit proof and features temperature protection that disables the circuit in the event of impermissibly high temperatures. The watchdog function is disabled as a function of the load, so that a controller is not interrupted during sleep mode by a watchdog reset. Application Description The IC regulates an input voltage Vi in the range 5.5 V < Vi < 45 V to Vqrated = 5.0 V. In the event of an output voltage VQ < VRT, a reset signal is generated. The wiring of the reset switching threshold input enables the value of VRT to be reduced. The reset delay time can be adjusted using an external capacitor. The integrated watchdog monitors the connected active controller. If there is no positive-going edge at the watchdog input, the reset output is set to low. The reset delay capacitor provides a wide adjustment range for the pulse repetition time. The watchdog function is only activated if the load exceeds 8 mA. This ensures that a microcontroller is not activated during power-down and the current drain is not increased. The IC is protected against overload and overtemperature. Semiconductor Group 1 1998-11-01 TLE 4268 Pin Configuration (top view) P-DSO-8-1 VΙ N.C. QRES GND 1 2 3 4 8 7 6 5 VQ W SRES DRES AEP01954 Figure 1 Pin Definitions and Functions Pin Symbol Function 1 VI Input voltage 2 N. C. Not connected 3 QRES Reset output 4 GND Ground 5 DRES Reset delay 6 SRES Reset switching threshold 7 W Watchdog input 8 VQ 5-V output voltage Semiconductor Group 2 1998-11-01 TLE 4268 Pin Configuration (top view) P-DSO-20-6 N.C. N.C. QRES GND GND GND GND N.C. DRES SRES 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 N.C. N.C. VΙ GND GND GND GND N.C. VQ W AEP01540 Figure 2 Pin Definitions and Functions Pin Symbol Function 1, 2, 8, 13, N. C. 19, 20 Not connected. 3 QRES Reset output; the open collector output is connected to the 5-V output via an integrated resistor of 30 kΩ. 4 … 7, 14 … 17 GND Ground 9 DRES Reset delay; connect a capacitor to ground for delay time adjustment. 10 SRES Reset switching threshold; for setting the switching threshold, output to ground with voltage divider. If this input is connected to ground, the reset is triggered at an output voltage of 4.5 V. 11 W Watchdog input; positive-edge-triggered input for monitoring a microcontroller. 12 VQ 5-V output voltage; block to ground with 22-µF capacitor, ESR < 3 Ω. 18 VI Input voltage; block to ground directly on the IC with ceramic capacitor. Semiconductor Group 3 1998-11-01 TLE 4268 Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If The externally scaled down output voltage at the reset threshold input drops below 1.35 V, the external reset delay capacitor is discharged by the reset generator. If the voltage on the capacitor reaches the lower threshold VST, a reset signal is generated on the reset output and not cancelled again until the upper threshold voltage is exceeded. If the reset threshold input is connected to GND, reset is triggered at an output voltage of 4.5 V. A connected microcontroller is monitored by the watchdog logic. If pulses are missing, the rest output is set to low. The pulse sequence time can be set within a wide range with the reset delay capacitor. The IC also incorporates a member of internal circuits for protection against: • Overload • Overtemperature • Reverse polarity Input 12 Output 18 Temperature Sensor Protection Circuit 3 Reset Output Reset Generator Control Amplifier + - Adjustment Bandgap Reference Watchdog 4-7, 14-17 GND 11 Watchdog Input Reset 10 Switching Threshold 9 Reset Delay AEB01539 Figure 3 Block Diagram Semiconductor Group 4 1998-11-01 TLE 4268 Absolute Maximum Ratings Tj = – 40 to 150 °C Parameter Symbol Limit Values Unit Notes min. max. VI II – 30 45 VR IR – 0.3 VD ID – 0.3 VW – 0.3 7 V – VRE – 0.3 7 V – VQ IQ – 0.3 7 V IM – 100 50 mA – °C °C – – 50 150 150 Input Input voltage Input current V Internally limited Reset Output Voltage Current 7 V Internally limited Reset Delay Voltage Current 7 V Internally limited Watchdog Watchdog input Reset Input Reset threshold Output Output voltage Output current Internally limited Ground Current Temperatures Junction temperature Storage temperature Semiconductor Group Tj TS 5 1998-11-01 TLE 4268 Operating Range Parameter Symbol Input voltage Junction temperature Limit Values Unit Notes min. max. VI Tj – 45 V – – 40 150 °C – RthjA RthjA RthjC RthjC – 200 70 K/W K/W P-DSO-8-1 P-DSO-20-6 – 60 25 K/W K/W P-DSO-8-1 P-DSO-20-6 Thermal Resistance Junction ambient (soldered) Junction case Optimum reliability and life time are guaranteed if the junction temperature does not exceed 125 °C in operating mode. Operation at up to the maximum junction temperature of 150 °C is possible in principle. Note, however, that operation at the maximum permitted ratings could affect the reliability of the device. Characteristics VI = 13.5 V; – 40 °C ≤ Tj ≤ 125 °C (unless otherwise specified) Parameter Symbol Limit Values min. typ. max. Unit Test Condition Output voltage VQ 4.90 5.00 5.10 V 5 mA ≤ IQ ≤ 150 mA; 6 V ≤ VI ≤ 28 V; Output current limiting IQ 180 250 – mA – Current consumption Iq Iq = II - IQ – 300 450 µA IQ = 0 mA Current consumption Iq Iq = II – IQ – 13 20 mA IQ = 150 mA – 0.25 0.5 V – 10 30 mV – 10 30 mV IQ = 150 mA1) IQ = 5 to 150 mA VI = 6 to 28 V IQ = 150 mA Drop voltage Load regulation Supply voltage regulation 1) VDR ∆VQ ∆VQ Drop voltage = VI – VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input) Semiconductor Group 6 1998-11-01 TLE 4268 Characteristics (cont’d) VI = 13.5 V; – 40 °C ≤ Tj ≤ 125 °C (unless otherwise specified) Parameter Symbol Limit Values Unit Test Condition min. typ. max. VRT VRE VR VC Id VDU 4.2 4.5 4.8 V – 1.28 1.35 1.45 V – – 0.2 0.5 V 1 mA extern – 30 100 mV 5 12 18 µA VQ < VRT VC = 1.0 V 1.4 1.8 2.2 V – td tt RR VDRL 10 15 25 ms – 2 – µs Cd = 100 nF Cd = 100 nF 18 30 46 kΩ with resp. to VQ 0.2 0.4 0.55 V – ICd Id VCd VDWL 1.5 3.5 5.2 µA 5 12 18 µA VC = 1.0 V VC = 1.0 V 1.6 1.8 2.0 V – 0.2 0.4 0.55 V – TWP TWT 30 55 75 ms 25 40 60 ms Cd = 100 nF Cd = 100 nF IQ VW 2 8 15 mA Activates watchdog 5 – – V/µs from 20 % up to 80 % VQ Reset Generator Switching threshold Switching voltage Saturation voltage Saturation voltage Charging current Delay switching threshold Delay time Delay time Pull-up Lower switching threshold Watchdog Discharge current Charging current Switching voltage Lower switching threshold Watchdog periode Watchdog trigger time Activating current Slew rate Note: The reset output is low in range from VQ = 1 V to VRT. Semiconductor Group 7 1998-11-01 TLE 4268 ΙQ ΙΙ 1000 µ F 22 µF 470 nF TLE 4268G ΙR VΙ Ι Cd VW VC VQ VR ΙM Ιd VRE Cd 100 nF AES01541 VDr = VΙ -VQ Outside the control range Figure 4 Test Circuit VΙ < t RR V RT VQ dV Ι d = dt C D VDT VST VD td t RR V RO Power-on-Reset Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED01542 Figure 5 Timing (Watchdog Disabled) Semiconductor Group 8 1998-11-01 TLE 4268 VW Ι VΙ T WP VQ T WT VDU VD VDWL t WR VWO T WP = (VDU - VDWL ) (Ι d + Ι dis ) Ι d x Ι dis C D; t WR = VDUL = VDRL (VDU - VDWL ) Ιd C D; T WT = (VDU - VDWL ) Ι dis CD AED01543 Figure 6 Timing of the Watchdog Function Semiconductor Group 9 1998-11-01 TLE 4268 Drop Voltage VDr versus Output Current IQ Current Consumption Iq versus Output Current IQ AED01544 mV Ιq V DR AED01545 mA 700 14 600 12 500 10 400 8 V Ι =13.5 V Tj = 25 C Tj = 125 C 300 6 Tj = 25 C 200 4 100 2 0 0 50 100 150 200 250 0 mA 0 50 100 150 200 250 ΙQ ΙQ Current Consumption Iq versus Input Voltage Vi Output Voltage versus Input Voltage Vi AED01546 mA Ιq mA AED01547 mA VQ Tj = 25 C 10 10 8 8 R L= 33 Ω 6 6 R L= 33 Ω 4 4 R L= 50 Ω 2 0 2 R L= 100 Ω 0 10 20 30 40 0 V 2 4 6 8 V VΙ VΙ Semiconductor Group 0 10 1998-11-01 TLE 4268 Charge Current Id and Discharge Current Icd versus Temperature Tj Switching Voltage VCd and VST versus Temperature Tj AED01548 µA Ι VD VΙ = 13.5 V VD = 1.0 V 7 2.8 V Ι = 13.5 V 2.4 6 Ιd 5 1.6 3 1.2 2 Ι dis 1 0 V DU 2.0 4 0 -40 AED01549 V 40 80 120 0.8 V DWL 0.4 V DRL 0 -40 C 0 40 80 120 Tj Tj Output Voltage VQ versus Temperature Tj Output Current IQ versus Input Voltage Vi AED01550 V C AED01551 mA ΙQ VQ Tj = 25 C 250 5.1 VΙ = 13.5 V 5.0 200 4.9 150 4.8 100 4.7 50 4.6 -40 0 0 40 80 120 V 10 20 30 40 V Vj Tj Semiconductor Group 0 11 1998-11-01 TLE 4268 Package Outlines GPS05121 P-DSO-8-1 (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 12 Dimensions in mm 1998-11-01 TLE 4268 Package Outlines (cont’d) 1.27 0.35 x 45˚ 7.6 -0.2 1) 0.23 +0.0 9 8˚ ma x 2.65 max 2.45 -0.2 0.2 -0.1 P-DSO-20-6 (Plastic Dual Small Outline) 0.4 +0.8 0.35 +0.15 2) 0.2 24x 20 10.3 ±0.3 0.1 11 GPS05094 1 12.8 1) 10 -0.2 Index Marking 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 13 Dimensions in mm 1998-11-01