INFINEON TLE4917

Low Power Hall Switch
TLE 4917
Features
• Micro power design
• 2.4 V to 5.5 V battery operation
• High sensitivity and high stability of the
magnetic switching points
• High resistance to mechanical stress
• Digital output signal
• Switching for both poles of a magnet (omnipolar)
• Programming pin for the switching
direction of the output
P-TSOP6-6-2
Functional Description
The TLE 4917 is an Integrated Hall-Effect Sensor designed specifically to meet the
requirements of low-power devices. e.g. as an On/Off switch in Cellular Flip-Phones, with
battery operating voltages of 2.4V – 5.5V.
Precise magnetic switching points and high temperature stability are achieved through the
unique design of the internal circuit.
An onboard clock scheme is used to reduce the average operating current of the IC.
During the operate phase the IC compares the actual magnetic field detected with the
internally compensated switching points. The output Q is switched at the end of each
operating phase.
During the Stand-by phase the output stage is latched and the current consumption of the
device reduced to some µA.
The IC switching behaviour is omnipolar, i.e. it can be switched on with either the North or
South pole of a magnet.
The PRG pin can be connected to VS which holds the output VQ at a High level for B=0mT;
conversely the output VQ can be inverted by connecting the PRG pin to GND, which will
hold the output VQ at a Low level for B=0mT. In this later case the presence of an adequate
magnetic field will cause the output VQ to switch to a High level ( i.e. off state ).
Type
TLE 4917
Data Sheet
Marking
17s
Ordering Code
Q62705K 605
1
Package
P-TSOP6-6-2
Pin Configuration
(top view)
Top View
GND
GND
6
5
4
1
1 27
VS
GND
S
ym
Sensitive Area
PRG
Pin Definitions and Functions
Data Sheet
Symbol
VS
GND
Q
GND
GND
PRG
year
Q
AEP02801_C
Figure 1
Pin
1
2
3
4
5
6
3
m onth
Function
Supply Voltage
Ground
Open Drain Input
Ground
Ground
Programming Input
2
VS
1
B ias and
Com pensation
Circuits
A c tive E rror
Com pensation
Oscillator
&
Sequencer
Threshold
Generator
2, 4, 5
GND
Com p arator
w ith
Hysteresis
Hall
P robe
Decision
Latch
Logic
Chopped
A m plifier
6
PRG
3
Q
AEB02800_C
Figure 2 Block Diagram
Circuit Description
The Low Power Hall IC Switch comprises a Hall probe, bias generator, compensation
circuits, oscillator, output latch and an n-channel open drain output transistor.
The bias generator provides currents for the Hall probe and the active circuits.
Compensation circuits stabilize the temperature behavior and reduce technology variations.
The Active Error Compensation rejects offsets in signal stages and the influence of
mechanical stress to the Hall probe caused by molding and soldering processes and other
thermal stresses in the package. This chopper technique together with the threshold
generator and the comparator ensures high accurate magnetic switching points.
Very low power consumption is achieved with a timing scheme controlled by an oscillator
and a sequencer. This circuitry activates the sensor for 50 µs (typical operating time) sets
the output state after sequential questioning of the switch points and latches it with the
beginning of the following standby phase (typ. 130 ms). In the standby phase the average
current is reduced to typical 3.5 µA. Because of the long standby time compared to the
operating time the overall averaged current is only slightly higher than the standby current.
By connecting the programming pin to GND (normal to VS) the Output State can be inverted
to further reduce the current consumption in applications where a high magnetic field is the
Data Sheet
3
normal state. In that case the output Q is off at high magnetic fields and no current is
flowing in the open drain transistor.
The output transistor can sink up to 1 mA with a maximal saturation voltage VQSAT.
Absolute Maximum Ratings
Parameter
Symbol
Supply Voltage
Supply Current
Output Voltage
Output Current
Programming Pin Voltage
Junction temperature
Storage temperature
Magnetic Flux Density
Thermal Resistance
P-TSOP6-6-2
VS
IS
VQ
IQ
VPRG
Tj
TS
B
Rth JA
1)
Limit Values
min.
max.
– 0.3
5.5
–1
2.5
– 0.3
5.5
–1
2
– 0.3
5.5 1)
– 40
150
– 40
150
–
unlimited
–
35
Unit
Notes
V
mA
V
mA
V
°C
°C
mT
K/W
VPRG must not exceed Vs by more than 0.3V
Note: Stresses above those listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
ESD Protection
Human Body Model (HBM) tests according to:
EOS/ESD Association Standard S5.1-1993 and Mil. Std. 883D method 3015.7
Parameter
Symbol
ESD Voltage
VESD
Data Sheet
Limit Values
Min.
max.
±2
4
Unit
Notes
kV
R = 1.5 kΩ,
C = 100 pF;
T = 25 °C
Operating Range
Parameter
Symbol
Supply voltage
VS
Output voltage
VQ
Programming Pin Voltage VPRG
Limit Values
Min.
typ.
max.
2.4
2.7
5.5
– 0.3
2.7
5.5
– 0.3
0
0.3
VS –
Ambient Temperature
1)
TA
0.3
– 40
VS
VS +
25
0.3
85
Unit
Notes
V
V
V
1)
Inverted output
state
Standard output
state
°C
A Ceramic Bypass Capacitor of 10 nF at VS to GND is highly recommended.
AC/DC Characteristics
Parameter
Symbol
Limit Values
typ.
Max.
4
20
1.1
2.5
Unit
Averaged Supply Current
Averaged Supply
Current
during Operating Time
Transient Peak Supply
Current
during Operating Time
Supply Current
during Standby Time
Output Saturation Voltage
Output Leakage Current
Output Rise Time
ISAVG
ISOPAVG
Min.
1
0.5
ISOPT
–
–
2.5
mA
ISSTB
1
3.5
20
µA
VQSAT
IQLEAK
tr
–
–
–
0.13
0.01
0.3
0.4
1
1
V
µA
µs
Output Fall Time
tf
–
0.1
1
µs
Operating Time
Standby Time
Duty Cycle
Start-up Time of IC
top
tstb
top / tstb
tstu
15
–
–
–
50
130
0.039
6
93 1) 2)
240 3)
–
12
µs
ms
%
µs
Notes
µA
mA
t < 100 ns
IQ = 1 mA
RL = 2.7 kΩ;
CL = 10 pF
RL = 2.7 kΩ;
CL = 10 pF
4)
for VS=3.5V the max. Operating Time top max = 85µs
includes the Start-up Time tstu
3)
for VS=3.5V the max. Standby Time tstb max = 220ms
4)
initial power on time. VS must be applied in this time ( typ. 6µs to max. 12µs ) to get already a valid output
state after the first operating phase (typ. 56µs). For rise times of VS > 12µs, the output state is valid after the
second operating phase (includes one standby phase), e.g. happens only when the battery in flip phones is
changed.
1)
2)
Data Sheet
5
Magnetic Characteristics
PRG Pin Connected to VS
Parameter
Symbol
Operate Points
BOPS
BOPN
BRPS
BRPN
BHYS
Release Points
Hysteresis
1)
Limit Values
Min.
typ.
max.
3.5
5
7
–7
–5
–3.5
2.2
4
6
–6
–4
–2.2
0.2
1
2
Unit
Notes
mT
mT
mT
mT
mT
1)
1)
Positive magnetic fields are related to the approach of a magnetic south pole to the branded side of package
PRG Pin Connected to GND
Parameter
Symbol
Operate Points
BOPS
BOPN
BRPS
BRPN
BHY
Release Points
Hysteresis
1)
Limit Values
Min.
typ.
max.
2.2
4
6
-6
-4
-2.2
3.5
5
7
-7
-5
-3.5
0.2
1
2
Unit
Notes
mT
mT
mT
mT
mT
1)
1)
Positive magnetic fields are related to the approach of a magnetic south pole to the branded side of package
Note: The listed AC/DC and magnetic characteristics are ensured over the operating range
of the integrated circuit. Typical characteristics specify mean values expected over
the production spread. If not other specified, typical characteristics apply at Tj = 25 °C
and VS = 2.7 V.
Data Sheet
6
IS
O p e rating
Time
ISOPAVG
ISAVG
ISSTB
S tandby Tim e
top
t stb
50 µs
130 m s
L a tch
O u tput
t
AET02802-17
Figure 3 Timing Diagram
Figure 4 Programming of Output with the PRG Pin
Data Sheet
7
All curves reflect typical values at the given parameters for TA in °C and VS in V.
Magnetic Switching Points versus
Temperature (VS=2.7V)
(PRG Pin Connected to VS))
Magnetic Switching Points versus
Supply Voltage VS (TA=20°C)
(PRG Pin Connected to VS))
B[mT]
B[mT]
6
6
BOPS
B OPS
4
2
2
0
0
-2
-2
BRPN
-4
B RPS
4
B RPS
-4
B RPN
BOPN
B
OPN
-6
-6
-40
-20
0
20
40
60
80
100
2.5
3
3.5
4
4.5
5
5.5
6
U S[V]
T [°C]
Supply current ISOPAVG during Operating
Time versus Temperature (VS=2.7V)
Supply current ISOPAVG during Operating
Time versus Supply Voltage VS (TA=20°C)
2.5
2.5
I [mA]
I [mA]
2
2
1.5
ISOPAVG
1.5
1
I SOPA V G
1
0.5
0.5
-40
-20
0
20
40
60
80
0
100
2.5
Data Sheet
3
3.5
4
4.5
5
5.5
6
V S [V]
T [°C]
8
Supply current ISSTB during Standby
Time versus Temperature (VS=2.7V)
Supply current ISSTB during Standby
Time versus Supply Voltage VS (TA=20°C)
20
20
I [µA]
I [µA]
18
18
16
16
14
14
12
12
10
10
8
8
6
ISSTB
6
ISSTB
4
4
2
2
0
-40
-20
0
20
40
60
80
0
100
2.5
3
3.5
4
4.5
5
5.5
6
VS [V]
T [°C]
Output Saturation voltage VQSAT
versus Temperature ( IQ=1mA )
Standby Time tstb versus Temperature
(VS = 2.7V)
180
200
t [ms]
V[mV]
170
V QSAT
160
160
140
150
120
140
100
80
130
60
120
tstb
40
110
20
0
-40
-20
0
20
40
60
80
100
-40
100
Data Sheet
-20
0
20
40
60
80
100
T [°C ]
T [°C]
9
Top View
S
17
ym
6 5 4
Marking on P-TSOP6-6-2 package
corresponds to pin 1 of device
1 2 3
Direction of Unreeling
Package
P-TSOP6-6-2
Pieces / Reel
∅Reel
3.000
180 mm
Figure 5 Marking and Tape Loading Orientation
Figure 6 Foot Print Reflow Soldering
Data Sheet
10
Package Dimensions
P-TSOP6-6-2
(Plastic Thin Small Outline-Package)
weight : 0.015g
coplanary : 0.1mm
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book ”Package Information”.
SMD = Surface Mounted Device
Dimensions in mm
Data Sheet
11
Information about the application circuit of the TLE 4917
Vs
Sensor
1 Vs
RL=2700 Ω
6 Prg
TLE 4917
2 Gnd
5 Gnd
3Q
4 Gnd
S1
Output
C= 10 nF
Gnd
Application circuit TLE 4917
The minimum value for the pull up resistor can be calculated with the power supply voltage
Vs, the maximum current IQmax and the minimum output saturation voltage VQSAT.
Example:
for Vs = 3 V: RLmin = (Vs - VQSATmin)/IQmax = (3 V - 0,1 V)/0,002 A = 1435 Ω
Larger values for RL will reduce the current IQ and therefore the power consumption. If the
resistor RL is very large (>100 kΩ) a capacitor (app. 10pF) between Output and GND pin
could be useful if capacitive coupled noise occurs.
The load at the output Q should have a large input resistance to reduce the current trough
RL and the power consumption.
The TLE 4917 has 3 ground pins. From a mechanical point of view all ground pins should
be connected to ground. Shortest wires should be used to avoid ground loops.
If there is a need to reduce the number of used ground-pins any ground-pin combination
may me used. Furthermore it is possible using only one ground-pin at the application, all
pins are equivalent.
The capacitor C is highly recommended to reduce noise on the power supply voltage and it
will improve the EMI/EMC performance.
Furthermore it decreases the transient peak supply current during operation time. The IC
toggles between low and high current consumption. This behaviour might produce
additional noise at the power supply. The capacitor will reduce this noise.
Furthermore this capacitor is used to supply the sensor if microbreaks (short loss of supply
voltage) occur.
Shortest connection wires between IC and capacitor should be used to avoid noise.
The switch S1 shows the programming feature of the output.
Example:
If the PRG-pin is connected to Vs the IC will hold the output Q at a high voltage level for B= 0 mT in this circuit. A
magnetic field larger than the operating point will switch the output to low level. In typical applications the PRG-pin is
connected directly to Vs or to GND depending on the technical needs. Avoid using a floating PRG-pin.
Data Sheet
12
TLE 4917
Revision History:
2002-08-22
Previous Version:
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Subjects (major changes since last revision)
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Edition 2002-08-22
Published by Infineon Technologies AG
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D-81541 München
© Infineon Technologies AG 2000
All Rights Reserved.
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The information herein is given to describe certain components and shall not be considered as warranted characteristics.
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Data Sheet
13