Single Wire CAN-Transceiver TLE 6255 G Final Data Sheet 1 • • • • • • • • • • • • • • Features Single wire transceiver for up to 33 kBit/s bus speed Compatibel to GM LAN Standard GMW 3089 - V1.26 Excellent EMC performance High speed mode for up to 100 kBit/s bus speed Ambient operation range – 40 °C to 125 °C Supply voltage operation range 5.5 V to 28 V Typ. 30 µA total current consumption in sleep mode 4 kV ESD protection Short circuit and overtemperature protected Input bilevel feature for wake-up detection Output bilevel feature for wake up call Loss of Ground protection Bus dominant timeout feature Programmable slewrate P-DSO-14-8; -9 Type Ordering Code Package TLE 6255 G Q67006-A9352 P-DSO-14-9 (SMD) 2 Description The TLE 6255 G is a special featured low speed transceiver for use in single wire applications. The device is primarily designed for use in single wire CAN systems operating with various CSMA/CR (carrier sense multiple access/collision resolution) protocols such as the BOSCH Controller Area Network (CAN). The normal communication bitrate in CAN-systems is up to 33 kBit/s. For software or diagnostic data download a high speed mode is offered that allows transmission rates up to 100 kBit/s. With many integrated features such as slewrate controlled output, loss of ground circuit, bi-level wake-up and sleep mode for low power consumption the TLE 6255 G is optimized for use in automotive applications. The device is based on Smart Power Technology SPT® which allows bipolar and CMOS control circuitry to be integrated with DMOS power devices on the same monolithic circuitry. Additional features like short circuit and overtemperature protection, over- and undervoltage lockout are integrated. To enhance the reliability and robustness of the TLE 6255 G the enhanced power SO-14 package is used in order to provide high thermal capacity and low thermal resistance. Data Sheet Rev. 2.5 1 2003-11-27 TLE 6255 G 3 Pin Configuration (top view) 14 GND 13 N.C. 12 CANH 11 LOAD 5 10 Vbatt VCC 6 9 RSL GND 7 8 GND GND 1 TxD 2 M0 3 M1 4 RxD Leadframe Chip AEP02568 Figure 1 Pin Configuration RxD = H indicates a bus recessive state, RxD = L a bus normal or high voltage dominant state. Data Sheet Rev. 2.5 2 2003-11-27 TLE 6255 G 4 Pin Definitions and Functions Pin No. Symbol Function 1, 7, 8, 14 GND Ground; internally connected to leadframe 2 TxD Transceive-Input; low active, logic command to transmit on the single wire CAN bus; inverting: TxD = low causes CANH = dominant (high level); internal 10 kΩ pull up 3 M0 Mode-Input 0; to program the device operating mode; internal pull down 4 M1 Mode-Input 1; to program the device operating mode; internal pull down 5 RxD Receive-Output; open drain, logic data as sensed on the single wire CAN bus; inverting (RxD = L when CANH is dominant) 6 VCC Supply Voltage; input for 5 V logic supply voltage 9 RSL Slewrate-Program-Input; an external resistor to VCC on this pin is required to program the bus output slewrate 10 Vbatt Battery Supply Voltage; external blocking capacitor necessary (see application circuit) 11 LOAD Unit-Load Resistor Input; internal termination to GND 12 CANH CAN Bus Input/Output; single wire bus input and output; short circuit protected 13 N.C. not connected Data Sheet Rev. 2.5 3 2003-11-27 TLE 6255 G 5 Block Diagram VBatt 10 CANH 12 6 TLE 6255G Biasing OVLO UVLO 4 kV ESD 4 kV ESD VCC Protection and StartupControl Driver Voltage Current Converter WaveShapeCircuit RSL TxD Mode-Logic Input Filter 11 Load Driver M1 M0 Mode 3 L L H H Sleep High-Speed Wake-up Call Normal 4 L H L H Loss of Ground Control BUF Receive Comp GND 5 M0 M1 RxD 13 1, 7, 8, 14 Figure 2 2 Time Out Circuit FeedbackLoop LOAD 9 N.C. AEB02565 Block Diagram Data Sheet Rev. 2.5 4 2003-11-27 TLE 6255 G 6 Functional Description and Application Hints 6.1 Mode Control By use of the two mode control pins M0 and M1 the transceiver can be set in the following modes. Table 1 Transceiver Modes # M0 M1 Mode 1 Low Low Sleep mode 2 High Low High speed mode 3 Low High Wake-up call 4 High High Normal mode Sleep-Mode In the sleep mode the total current consumption of the TLE 6255 G is reduced to typically 30 µA. Nodes not set to sleep mode can communicate without disturbing ECUs that are already set to sleep mode. To achieve a wake-up via the CAN bus a high voltage level message (wake-up call) is necessary. Only high voltage level messages are reported to the RxD pin in sleep mode. A wake-up from sleep mode of the transceiver itself has to be done by setting the control inputs M0 and M1. If there is no modification on the mode inputs the device remains in sleep mode after the wake-up signal is removed from the bus. The transceiver’s loss of ground protection circuit connection to ground is not interrupted when in the sleep mode. High-Speed-Mode The high-speed mode can be used for software or diagnostic data download with bitrates up to 100 kBit/s. Therefore the slewrate control feature is deactivated to achieve the required timings. Further an additional external resistor of 100 Ω from CANH to GND is necessary in this mode. Wakeup-Call Mode In this mode the TLE 6255 G sends the message to be transmitted as a high voltage wake-up message. The bus includes a special node wake up capability which allows normal communication to take place among some nodes while leaving the other nodes in an undisturbed sleep state. This is accomplished by controlling the level of the signal voltages such that all nodes must wake up when they receive a higher voltage message signal waveform. Communication at the lower, normal voltage levels shall not disturb the sleeping nodes (Vbatt > 9 V). Data Sheet Rev. 2.5 5 2003-11-27 TLE 6255 G Normal Mode In the normal mode the TLE 6255 G sends a normal voltage message waveform on the bus. It is possible to run the transceiver up to transmission rates of 33 kBits/s in this mode. The waveform as well as the slew rate of the rising edge (recessive to dominant transition) are controlled by the internal active wave shaping circuit to minimize EME (electromagnetic emission). For the same reason waveform trailing edge control is required to assure that high frequency content is minimized at the beginning of the downward voltage slope (dominant to recessive transition). The remaining fall time occurs after the bus is inactive with drivers off and is determined by the RC time constant of the total bus load. 6.2 Slew-Rate Control The CANH output voltage and current is controlled by an internal waveshaping circuit. For optimized adjusting of the slew rate to the system timing, the slew rate is programmable by an external resistor connected from pin RSL to VCC. Figure 4 shows the correlation of the slew rate to the resistor RRSL. 6.3 Transmitter The TLE 6255 G contains a high current fully short circuit and overtemperature protected highside-driver (pin CANH). To minimize spectral content the CANH-output waveform is controlled. Logic low (TxD = L) on pin TxD will command the output stage to switch to dominant high potential; TxD = H to recessive low on the bus. To avoid the bus to be blocked by a permanent dominant TxD input signal, the TLE 6255 G incorporates a timeout feature. In case of TxD = L for longer than the internal fixed timeout the CANH output is switched off automatically. The timeout is resetted by a H-signal at TxD without a delay. The loss of an ECU ground may cause the ECU to source current through the various ECU circuits to the communications bus instead of to the vehicle system ground. Therefore the unit-load resistor of any ECU is connected to the LOAD-pin. The TLE 6255 G incorporates a reverse protected switch from LOAD to ground potential. This switch is automatically switched off in a loss of ground state. 6.4 Receiver In normal, high speed and wakeup-mode all data on the bus is sensed by the receive comparator and transmitted to the RxD output. In sleep mode no normal level data is detected. The receiver threshold is set to the wake-up level. So a wake-up interrupt is sent only in case of a wake-up call on the bus. An internal fixed filter improves the EMC susceptibility. Data Sheet Rev. 2.5 6 2003-11-27 TLE 6255 G 6.5 Unit Load Resistor The TLE 6255 covers the specification GMW 3089 V1.26 or the so called first generation of SW CAN. GM decided to design a second generation of SW CAN, which is defined in the specification GMW 3089 V2.0. This led to some differences in the electrical characteristics(GND shift, time constants, etc.) and also in the pinout (pin 9 is used to control a voltage regulator). It must be pointed out, that GMW 3089 V1.26 defines a unit load resistance of: RUL= 8,999 to 9,126 kOhm With this RUL, the TLE 6255 complies to the GMW 3089 V1.26 specification. Values out of this range are not a subject to GMW 3089 V1.26! The loss of ground circuit is not specified to function when the load resistor is out of the 8.999-9.126 kohm range! Data Sheet Rev. 2.5 7 2003-11-27 TLE 6255 G 7 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Remarks min. max. Vbatt VCANH VLOAD VCC Vlogic – 0.3 40 V – – 28 28 V – – 28 28 V – – 0.3 7 V – – 0.3 7 V – ICANH ILOAD – – mA internally limited – – mA internally limited Voltages Supply voltage CAN bus input/output voltage Load voltage Logic supply voltage Logic voltages (VRxD; VTxD; VM0; VM1; VRSL) Currents CAN Bus current Load current ESD-Protection (Human Body Model; According to MIL STD 833 D) Pin CANH, Vbatt Other pins VESD VESD – 4000 4000 V – – 2000 2000 V – Tj Tj Tj Tstg – 40 150 °C – – 175 °C – 200 °C t < 1000 h t < 10 h – 50 150 °C – Rthj-pin Rthj-a – 40 K/W junction to pin 1 – 65 K/W – Temperatures Junction temperature Junction temperature Junction temperature Storage temperature Thermal Resistances Junction to pin Junction ambient Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Data Sheet Rev. 2.5 8 2003-11-27 TLE 6255 G 8 Operating Range Parameter Symbol Limit Values min. Supply voltage Vbatt Unit Remarks V After Vbatt rising above max. VUVOFF 28 VUV ON Vbatt Supply voltage decreasing Vbatt Logic supply voltage VCC – 0.3 Logic supply voltage; increasing VCC – 0.3 VPORON V Outputs in tristate Logic supply voltage; decreasing VCC – 0.3 VPOROF V Outputs in tristate Junction temperature Tj RRSL – 40 150 °C – 35 200 kΩ – Thermal shutdown junction TjSD temperature 150 200 °C – Thermal switch-on junction TjSO temperature 120 170 °C temperature hysteresis ∆T = 30° K (typ.) Supply voltage increasing RSL resistance – 0.3 VUV ON V VUV OFF V VPOROF 5.5 V Outputs in tristate Outputs in tristate After VCC rising above VPORON Thermal Shutdown Data Sheet Rev. 2.5 9 2003-11-27 TLE 6255 G 9 Electrical Characteristics 5.5 V < Vbatt < 16 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; M0 = M1 = H; RUL= 9.1 kΩ (connected between CANH and LOAD); RRSL = 39 kΩ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition min. typ. max. Supply current at Vbatt; Ibatt sleep mode – 20 40 µA M0 = M1 = L; Supply current at VCC; ICC sleep mode – 10 30 µA M0 = M1 = L; Supply current at Vbatt – 3 6 mA TxD = L – 1.5 3 mA TxD = H – 5 9 mA TxD = L; M0 = L – 4 6 mA TxD = H; M0 = L – 3 5 mA TxD = H or L; M0 = H or L 5.2 5.6 V 4.6 5.1 V 0.6 – V Vbatt increasing; VCC = 5 V Vbatt decreasing; VCC = 5 V VUVON – VUVOFF 33 38 V Vbatt increasing Vbatt decreasing VOVOFF – VOVON Current Consumption Supply current at Vbatt Supply current at Vbatt Supply current at Vbatt Supply current at VCC Ibatt Ibatt Ibatt Ibatt ICC Over- and Under Voltage Lockout UV Switch ON voltage VUVON – UV Switch OFF voltage VUVOFF 4.00 UV ON/OFF Hysteresis VUVHY OV Switch OFF voltage VOVOFF 30 – OV Switch ON voltage VOVON 28 32 36 V VOVHY 0.2 2 – V OV ON/OFF Hysteresis Data Sheet Rev. 2.5 10 2003-11-27 TLE 6255 G 5.5 V < Vbatt < 16 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; M0 = M1 = H; RUL= 9.1 kΩ (connected between CANH and LOAD); RRSL = 39 kΩ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values min. Unit Test Condition typ. max. Power ON/OFF Reset at VCC Power ON Reset voltage VPORON 4.00 4.25 4.50 V VCC increasing Power OFF Reset voltage VPOROF 3.50 3.75 4.00 V VCC decreasing POR ON/OFF Hysteresis VPORHY 0.1 0.5 – V VPORON – VPOROF H-input voltage threshold VTxDH – 2.6 0.7 × V – L-input voltage threshold VTxDL 0.3 × – V – Hysteresis of input voltage VTxDHY 50 200 500 mV – – 20 – 10 – 5 µA 0 V < VTxD < 4 V 5 10 30 ms – –2 0 10 µA Transceive Input TxD ITxD Timeout reaction time tTOR Pull up current VCC 2.4 VCC Receive Output RxD Output leakage current IRxDLK Output low voltage level VRxDL – 0.2 0.4 V VRxD = 5 V IRxDL = 2 mA Falltime tFRxD – 80 200 ns CRxD = 25 pF to GND Data Sheet Rev. 2.5 11 2003-11-27 TLE 6255 G 5.5 V < Vbatt < 16 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; M0 = M1 = H; RUL= 9.1 kΩ (connected between CANH and LOAD); RRSL = 39 kΩ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values min. typ. max. 2.6 Unit Test Condition Mode Input M0 and M1 0.7 × V – – V – 200 500 mV – 5 20 50 µA 1 V < VM0,1 < 5 V tDNH – 5 30 µs M1 H to L; (not tested, specified by design) Normal to wakeup call tDNW – 5 30 µs M0 H to L (not tested, specified by design) Normal to sleep tDNS – 5 500 µs M0 and M1 H to L (not tested, specified by design) Sleep to normal tDSN – 5 50 µs M0 and M1 L to H (not tested, specified by design) VRSL 2.5 3 3.5 V IRSL = 100 µA H-input voltage threshold VM0,1H – L-input voltage threshold VM0,1L 0.3 × Hysteresis of input voltage VM0,1HY 50 Pull down current IM0,1 VCC 2.4 VCC Mode Change Delaytimes Normal to high-speed Slewrate Input RSL Output voltage Data Sheet Rev. 2.5 12 2003-11-27 TLE 6255 G 5.5 V < Vbatt < 16 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; M0 = M1 = H; RUL= 9.1 kΩ (connected between CANH and LOAD); RRSL = 39 kΩ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values min. Unit Test Condition typ. max. CANH as Bus Input / Receiver Wake up offset threshold VIHWUO Vbatt – – Vbatt – V Vbatt = 8 V Wake up fixed threshold VIHWUF 6.15 8.10 Vbatt = 14 V 4.30 tDWU Wakeup minimal pulse tWUMIN Wakeup dead time 3.25 7.1 V see note; see Figure 8 see note; see Figure 8 10 21 50 µs – 1 5 10 µs – time Receive threshold; in normal, high-speed and wake-up mode VIH 1.8 2 2.2 V 6 V < Vbatt < 16 V Receive hysteresis VRHY tCRF 50 80 200 mV – 0.05 0.3 1 µs Receive propagation time; high speed tCRF 0.05 0.25 0.5 VCANH > (VIH + 0.8 V) to RxD = L; 6 V < Vbatt < 16 V VCANH > (VIH + 0.8 V) to Receive propagation time tCRR 0.05 0.3 Receive propagation time; high speed tCRR 0.05 0.25 0.5 µs VCANH < (VIH – 0.8 V) to RxD = H; RRxD = 2.4 kΩ 6 V < Vbatt < 16 V VCANH < (VIH – 0.8 V) to RxD = H; RRxD = 2.4 kΩ M1 = L; 6 V < Vbatt < 16 V; Tj < 125 °C 1.5 3.0 µs see Figure 7 Receive propagation time Receive blanking time tCRB after CANH H to L transition µs RxD = L; M1 = L; 6 V < Vbatt < 16 V; Tj < 125 °C 1 5.0 µs Note: The device will send a wake up call to the microcontroller at the minimum of VIHWUO or VIHWUF. Data Sheet Rev. 2.5 13 2003-11-27 TLE 6255 G 5.5 V < Vbatt < 16 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; M0 = M1 = H; RUL= 9.1 kΩ (connected between CANH and LOAD); RRSL = 39 kΩ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values min. Unit Test Condition typ. max. CANH as Bus Output / Transmitter Offset wakeup output high voltage VOHWUO Vbatt – – Vbatt V 220 Ω < RUL < 9.1 kΩ; TxD = L; M0 = L; 6 V < Vbatt < VOHWUF Fixed wakeup output high voltage VOHWUF 9.7 – 12 V 220 Ω < RUL < 9.1 kΩ TxD = L; M0 = L VOHWUF < Vbatt < 16V Bus output high voltage; normal and high speed VOH 3.60 4.0 4.55 V 100 Ω < RUL < 9.1 kΩ TxD = L; 6 V < Vbatt < 16 V Bus output current limit IOLI 200 250 350 mA TxD = L; VCANH = 0 V IOLK – 10 – 200 µA TxD = H; Tj < 125 °C; Vbatt – 28 V < VCANH < Vbatt – 1 V Bus output leakage IOLK current (loss of ground) – 50 – 200 µA 0 V < Vbatt < VUVOFF; Vbatt – 28 V < VCANH < Vbatt – 1 V Slew rate rising edge, normal mode SCANH – 2.0 – V/µs 20% < VCANH < 80% Slew rate rising edge, wake-up mode SCANH – 4.0 – V/µs 20% < VCANH < 80% M0 = L; Vbatt = 12 V Slew rate rising edge; high speed; SCANH 5 16 25 V/µs 20% < VCANH < 80% M1 = L; Tj < 125 °C Transmit propagation time; normal mode tTCF 2 5 6 µs TxD = (H to L) to VCANH = (VIH + 0.8 V) 1.0 µs < τ < 3.6 µs; Transmit propagation time; wake-up mode tTCF 1 5 4 µs TxD = (H to L) to VCANH = (VIH + 0.8 V); M0 = L; Vbatt = 12 V; 1.0 µs < τ < 3.6 µs Bus output leakage current Data Sheet Rev. 2.5 1.5 14 2003-11-27 TLE 6255 G 5.5 V < Vbatt < 16 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; M0 = M1 = H; RUL= 9.1 kΩ (connected between CANH and LOAD); RRSL = 39 kΩ; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition min. typ. max. Transmit propagation tTCF time; high speed mode – 0.5 1.5 µs TxD = (H to L) to VCANH = (VIH + 0.8 V); M1 = L; τ < 1 µs; Tj < 125 °C Transmit propagation time; normal mode tTCR 3 5 8 µs TxD = (L to H) to VCANH = (VIH – 0.8 V) 1.0 µs < τ < 3.6 µs; Transmit propagation time; wake-up mode tTCR 3 – 12.7 µs TxD = (L to H) to VCANH = (VIH – 0.8 V); M0 = L; 1.0 µs < τ < 3.6 µs; Transmit propagation time; high speed tTCRH – – 3.0 µs TxD = (L to H) to VCANH = (VIH – 0.8 V); M1 = L; τ < 1.6 µs; Tj < 125 °C 20 100 mV – 50 µA ILOAD = 2 mA; 8 V < Vbatt < 16 V 0 V < Vbat < VUVOFF Tj < 125 °C; Vbatt – 28 V < VCANH < Vbatt – 1 V Unit-Load Resistor Ground Input LOAD Output low voltage level VLOAD – Output leakage current ILOADLK – 50 (loss of ground) Data Sheet Rev. 2.5 15 2003-11-27 TLE 6255 G 10 Diagrams VTxD 50% t t TCF t TCR VCANH 80% ∆V VIH VIH ∆t 20% t t tR t CRF VRxD t tF t CRR 50% t Bus Output Slewrate Definition: S CANH = Figure 3 ∆V with 20% < VCANH < 80% ∆t AET02566 Input/Output-Timing (Pin CANH, TxD and RxD) Data Sheet Rev. 2.5 16 2003-11-27 TLE 6255 G SCANH AED02570 5.0 V µs 2.0 1.0 0.5 0.2 0.1 20 35 50 100 200 500 kOhm 1000 R RSL Figure 4 Slewrate SCANH vs. Programming Resistor RRSL (Pin RSL) VCANH VIHWU VIH t tp t DWU VRxD tp t DWU t WUMIN Controller Wake Up t p < t DWU No Wake Up t p < t DWU t AET02571 Figure 5 Wakeup Deadtime tDWU Data Sheet Rev. 2.5 17 2003-11-27 TLE 6255 G VTxD VIH t Parasitic dominant "L" on TxD VCANH VIH t H Time Out Counter t L t TOR Active Time Out t Passive Status Normal Operation Bus Blocked Bus Available Normal Operation AET02572 Figure 6 Bus Dominant Blanking Time tTOR Data Sheet Rev. 2.5 18 2003-11-27 TLE 6255 G VTxD t VCANH Bus Ringing Bus Ringing VIH t VRxD t t CRB Without Blanking Feature With Blanking Feature AET02573 Figure 7 RxD Blanking Time tCRB Data Sheet Rev. 2.5 19 2003-11-27 TLE 6255 G V IHWU AED02781 8 V 7 T j = 150 ˚C T j = 25 ˚C T j = -40 ˚C 6 5 4 3 2 1 0 Figure 8 0 2 4 6 8 10 12 14 16 18 20 22 VS 24 V 26 Wake-up Threshold VIHWU vs. Supply Voltage VS Data Sheet Rev. 2.5 20 2003-11-27 TLE 6255 G 11 Application Circuit ECU R WADJ Watchdog Adjust 8 2 Watchdog Input 91 kΩ Watchdog Output Reset-Threshold 1 Adjust (optional) 7 C0 TLE 4278G Reset Output Reset Delay 6 14 47 nF VΙ VQ 9 13 3-5, 10-12 C S1 C CC1 GND 220 nF 22 µF VCC C CC2 DR 1N4001 C S2 100 nF C S3 4.7 µF V Batt 10 L UL Single Wire CAN Bus VBattery 47 µH C UL 220 pF CANH R UL 9.1 kΩ Load Controller R RSL 39 k Ω VCC 6 9 3 12 TLE 6255G 11 4 5 1, 7, 8, 14 GND 2 R RxD 2.4 kΩ R TxD 10 kΩ RSL M0 M1 RxD TxD GND AES02574 Figure 9 Application Circuit Data Sheet Rev. 2.5 21 2003-11-27 TLE 6255 G 12 Package Outlines GPS09222 P-DSO-14-9 (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Data Sheet Rev. 2.5 22 Dimensions in mm 2003-11-27 TLE 6255 G Edition 2003-11-27 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München © Infineon Technologies AG 2003. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect Data Sheet Rev. 2.5 23 2003-11-27