Fault Tolerant Differential CAN Transceiver TLE 6252 G Target Data Features • Data transmission rate up to 125 kBaud • Very low current consumption in stand-by and sleep mode • Optimized EMI behavior due to limited and symmetric dynamic slopes of CANL and CANH signals • Switches to single-wire mode during bus line P-DSO-14-2 failure events • Supports one-wire transmission mode with ground offset voltages up to 1.5 V • Preventation from bus occupation in case of CAN controller failure • Fully-integrated receiver filters • Short-circuit detection to battery and ground in 12 V powered systems • Thermal protection • Bus line error protection against transients in automotive environment Type ▼ TLE 6252 G Ordering Code Package Q67006-A9337 P-DSO-14-2 (SMD) ▼ New type Functional Description The CAN Transceiver works as the interface between the CAN protocol controller and the physical differential CAN bus. Figure 1 shows the principle configuration of a CAN network. The TLE 6252 is optimized for low-speed data transmission (up to 125 kBaud) in automotive and industrial applications. In normal operation mode a differential signal is transmitted/received. When bus wiring failures are detected the device automatically switches in single-wire mode to maintain communication. While no data is transferred, the power consumption can be minimized by multiple low power modes. Semiconductor Group 1 1998-11-01 TLE 6252 G Local Area 1 Local Area 2 Controller 1 Controller 2 RxD 1 TxD 1 RxD 2 Transceiver 1 Transceiver 2 Bus Line Figure 1 TxD 2 AES02410 CAN Network Example Semiconductor Group 2 1998-11-01 TLE 6252 G Pin Configuration (top view) P-DSO-14-2 INH TxD RxD NERR NSTB ENT WAKE 1 2 3 4 5 6 7 14 13 12 11 10 9 8 V BAT GND CANL CANH V CC RTL RTH AEP02411 Figure 2 Semiconductor Group 3 1998-11-01 TLE 6252 G Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 INH Inhibit output; For controlling an external 5 V regulator 2 TxD Transmit data input; LOW: bus is dominant, HIGH: bus is recessive 3 RxD Receive data output; LOW: bus is dominant 4 NERR Error flag output; LOW: bus error 5 NSTB Not stand-by input; Digital control signal for low power modes 6 ENT Enable transfer input; Digital control signal for low power modes 7 WAKE Wake-up input; If level of VWAKE changes the device initials a wake-up from sleep mode by switching INH HIGH 8 RTH Termination resistor output; For CANH line, controlled by internal failure management 9 RTL Termination resistor output; For CANL line, controlled by internal failure and mode management 10 VCC Supply voltage; +5V 11 CANH Bus line H; HIGH: dominant state, external pull-down for termination 12 CANL Bus line L; LOW: dominant state, external pull-up for termination 13 GND Ground 14 VBAT Battery voltage; + 12 V Semiconductor Group 4 1998-11-01 TLE 6252 G Functional Block Diagram RTL CANH CANL RTH 9 V CC V BAT 10 14 L Termination 11 Driver Temperature Protection 12 8 2 Failure Management TxD H Termination 3 Output Stage Filter RxD Receiver Failure Detect Wake - Up Time - Out NSTB ENT 4 1 5 INH Stand - By Sleep Wake - Up 6 Contol Unit 7 WAKE 13 GND Figure 3 NERR AEB02412 Block Diagram Semiconductor Group 5 1998-11-01 TLE 6252 G General Operation Modes In addition to the normal operation mode, the CAN transceiver offers three multiple low power operation modes to save power when there is no bus achieved: sleep mode, VBat stand-by mode and VCC stand-by mode (see Table 2 and Figure 4). Via the control inputs NSTB and ENT the operation modes are selected by the CAN controller. In sleep operation mode the lowest power consumption is achieved. To deactivate the external voltage regulator for 5 V supply, the INH output is switched to high impedance in this mode. Also CANL is pulled-up to the battery voltage via the RTL output and the pull-up paths at input pins TxD and RxD are disabled from the internal supply. On a wake-up request either by bus line activities or by the input WAKE, the transceiver automatically switches on the voltage regulator (5 V supply). The WAKE input reacts to rising and falling edges. As soon as VCC is provided, the wake-up request can be read on both the NERR and RxD outputs, upon which the microcontroller can activate the normal operation mode by setting the control inputs NSTB and ENT high. In VCC-stand-by mode the wake up request is only reported at the RxD-output. The NERR output in this mode is set low when the supply voltage at pin Vbat was below the battery voltage threshold of 1 V. When entering the normal mode the Vbat-Flag is reseted and the NERR becomes high again. In addition the Vbat-Flag is set at a first connection of the device to battery voltage. This feature is usefull e.g. when changing the ECU and therefore a presetting routine of the microcontroller has to be started. If either of the supply voltage drop below the specified limits, the transceiver automatically goes to a stand-by mode. Semiconductor Group 6 1998-11-01 TLE 6252 G Table 2 Truth Table of the CAN Transceiver NSTB ENT Mode 1) INH NERR RxD RTL Vbat active LOW wake-up interrupt if switched VCC is present to VBAT 0 0 VBAT stand-by 0 0 sleep mode 2) floating switched to VBAT 0 1 go to sleep command floating switched to VBAT 1 0 VCC stand-by 3) Vbat active LOW active LOW VBAT power-on wake-up interrupt flag switched to VCC 1 1 normal mode Vbat active LOW error flag switched to VCC HIGH = receive; LOW = dominant receive data 1) Wake-up interrupts are released when entering normal operation mode. 2) If go to sleep command was used before. ENT may turn LOW as VCC drops, without affecting internal functions. 3) VBAT power-on flag will be reseted when entering normal operation mode. Semiconductor Group 7 1998-11-01 TLE 6252 G Normal Operation NSTB ENT INH 1 1 HIGH NSTB = 0 ENT = 0 V CC = 1 ENT = 1 V CC = 1 NSTB = 1 V CC = 1 V CC Stand-By NSTB ENT INH 1 0 HIGH NSTB = 1 ENT = 0 V CC = 1 NSTB = 0 ENT = 1 NSTB = 0 or V CC = 0 NSTB = 1 ENT = 1 V CC = 1 V BAT Stand-By NSTB ENT INH 0 0 HIGH ENT = 1 ENT = 0 t < th (Wake-Up from bus or via WAKE pin) V BAT t > t WO NSTB = 1 V CC = 1 Go to Sleep NSTB = 1 V CC = 1 NSTB = 1 ENT = 1 V CC = 1 (NSTB = 0 ENT = 0) or V CC = 0 NSTB ENT INH 0 1 float. ENT = 1 V CC = 1 Sleep Mode ENT = 1 t > th Figure 4 NSTB ENT INH 0 0 float. AED02413 State Diagram The transceiver will stay in a present operating mode until a suitable condition disposes a state change. If not otherwise defined all conditions are AND-combined. The signals VCC and VBAT show if the supply is available (e.g. VCC = 1 : VCC voltage is present). If at minimum one supply voltage is switched on, the start-up procedure begins (not figured). After a delay time the device changes to normal operating or stand-by mode. Semiconductor Group 8 1998-11-01 TLE 6252 G Bus Failure Management The TLE 6252 detects the bus failures as described in the following (Table 3, failures listed according to ISO 11519-2) and automatically switches to a dedicated CANH or CANL single wire mode to maintain data transmission if necessary. Therefore, it is equipped with one differential receiver and 4 single ended comparators, two for each bus line. To avoid false triggering by external RF influences the single wire modes are activated after a certain delay time. As soon as the bus failure disappears the transceiver switches back to differential mode after another time delay. Bus failures are indicated in the normal operation mode by setting the NERR output to LOW. To reduce EMI the dynamic slopes of the CANL and CANH signals are both limited and symmetric. This allows the use of an unshielded twisted or parallel pair of wires for the bus. During single-wire transmission the EMI performance of the system is degraded from the differential mode. The differential receiver threshold is set to – 2.8 V. This ensures correct reception in the normal operation mode as well as in the failure cases 1, 2 and 4 with a noise margin as high as possible. For these failures, further failure management is not necessary. Detection of the failure cases 1, 2 and 4 is only possible when the bus is dominant. Nevertheless, they are reported on the NERR output until transmission of the next CAN word on the bus begins. When one of the bus failures 3, 5, 6, 6a and 7 is detected, the defective bus wire is disabled by switching off the affected bus termination and the respective output stage. A wake-up from sleep mode via the bus is possible either via a dominant CANH or CANL line. This ensures that a wake-up is possible even if one of the failures 1 to 7 occurs. In case the transmission data input, TxD from the CAN controller is permanently dominant, both, the CANH and CANL transmitting stage, are deactivated after a delay time. This is necessary to prevent blocking the bus by a defective protocol unit. The transmit time out error is flagged on NERR. Semiconductor Group 9 1998-11-01 TLE 6252 G Table 3 Specified Wiring Failure Cases on the Bus Line (according to ISO 11519-2) CANH 1) CANL Wire Interrupted V CC Failure case 1: V CC Failure case 2: CANL CANL TxD 1 TxD 1 RxD 2 RxD 2 CANH CANH GND GND AES02414 AES02415 Wire Short-Circuited to GND CANL CANL TxD 1 TxD 1 RxD 2 RxD 2 CANH CANH GND GND GND Semiconductor Group V CC Failure case 5: V CC Failure case 4: GND AES02416 10 AES02417 1998-11-01 TLE 6252 G Table 3 Specified Wiring Failure Cases on the Bus Line (cont’d) 1) (according to ISO 11519-2) CANH CANL Wire Short-Circuited to Battery Failure case 6: V CANH > 7.2 V Failure case 6a: 1.8 V < V CANH < 7.2 V (no ISO failure) Failure case 3: V CANL > 7.2 V Failure case 3a: 1.8 V < V CANL < 7.2 V (no ISO failure) V CC V BAT V CC CANL CANL TxD 1 TxD 1 RxD 2 RxD 2 CANH CANH V BAT GND GND AES02418 AES02419 CANL Mutually Short-Circuited to CANH V CC Failure case 7: CANL TxD 1 RxD 2 CANH GND 1) AES02420 The images represent a communication between two participants of the network (see Figure 1). The controller of the local area 1 transmits data (T×D1) to the receiver of the local area 2 (R×D2). When a single failure of cases 1 to 7 occurs, the error handling enables communication through appreciated reactions. Semiconductor Group 11 1998-11-01 TLE 6252 G Circuit Protection A current limiting circuit protects the CAN transceiver output stages from damage by short-circuit to positive and negative battery voltages. The CANH and CANL pins are protected against electrical transients which may occur in the severe conditions of automotive environments. The transmitter output stage generates the majority of the power dissipation. Therefore it is disabled if the junction temperature exceeds the maximum value. This effectively reduces power dissipation, and hence will lead to a lower chip temperature, while other parts of the IC can remain operating. Absolute Maximum Ratings Parameter Input voltage at VBAT Logic supply voltage VCC Input voltage at TxD, RxD, NERR, NSTD and ENT Input voltage at CANH and CANL Input voltage at CANH and CANL Transient voltage at CANH and CANL Input voltage at WAKE Input current at WAKE Input voltage at INH, RTH and RTL Termination resistances at RTL and RTH Junction temperature Storage temperature Electrostatic discharge voltage at any pin Symbol Limit Values Unit Notes min. max. VBAT VCC VIN – 0.3 40 V – – 0.3 6 V – – 0.3 VCC + 0.3 V – VBUS VBUS VBUS VIN IIN VIN RRTL/H – 10 27 V – – 40 40 V 1) – 150 100 V 2) – VBAT + 0.3 V – – 15 – mA 3) – 0.3 VBAT + 0.3 V – 500 16000 Ω – Tj Tstg Vesd – 40 150 °C – – 55 155 °C – – 4000 4000 V 4) 1) VCC = 0 to 5.5 V; VBAT > 0 V; t < 0.1 ms; load dump 2) See ISO 7637 3) Negative currents flowing out of the IC. 4) Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor. Note: Maximum ratings are absolute ratings; exceeding one of these values may cause irreversible damage to the integrated circuit. Semiconductor Group 12 1998-11-01 TLE 6252 G Operating Range Parameter Symbol Limit Values min. max. Unit Notes Logic input voltage VCC 4.75 5.25 V – Battery input voltage VBAT 6 27 V – Junction temperature Tj – 40 150 °C – Rthja – 120 K/W – Thermal Resistance Junction ambient Semiconductor Group 13 1998-11-01 TLE 6252 G Static Characteristics 4.75 V ≤ VCC ≤ 5.25 V; VNSTB = VCC; 6 V ≤ VBAT ≤ 27 V; – 40 ≤ Tj ≤ + 125 °C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values Unit Notes min. typ. max. – 3.5 10 mA recessive; TxD = VCC; normal operating mode – 6 20 mA dominant; TxD = 0 V; no load; normal operating mode – 120 500 µA – 55 100 µA VCC = 5 V; VBAT = 12 V; TA < 90 °C – 15 30 µA – – 1.0 V VCC = 0 V; VBAT = 12 V; TA < 90 °C VCC stand-by mode – 200 – µs VCC stand-by mode Supplies VCC, VBAT Supply current Supply current (VCC stand-by) Supply current (VBAT stand-by) Supply current (sleep operation mode) ICC ICC + IBAT IBAT + ICC IBAT Battery voltage for setting VBAT power-on flag Battery voltage low time for setting power-on flag tpw(on) Receiver Output R×D and Error Detection Output NERR HIGH level output voltage VOH (pin NERR) VCC HIGH level output voltage VOH (pin RxD) VCC LOW level output voltage VOL 0 Semiconductor Group – VCC V I0 = – 100 µA – VCC V I0 = – 250 µA – 0.9 V I0 = – 1.25 mA – 0.9 – 0.9 14 1998-11-01 TLE 6252 G Static Characteristics (cont’d) 4.75 V ≤ VCC ≤ 5.25 V; VNSTB = VCC; 6 V ≤ VBAT ≤ 27 V; – 40 ≤ Tj ≤ + 125 °C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values min. typ. Unit Notes max. Transmission Input T×D, Not Stand-By NSTB and Enable Transfer ENT HIGH level input voltage VIH threshold 0.7 × LOW level input voltage threshold VIL – 0.3 HIGH level input current (pins NSTB and ENT) IIH – 9 LOW level input current (pins NSTB and ENT) IIL 0 HIGH level input current (pin TxD) IIH LOW level input current (pin TxD) IIL 500 mV hysteresis V 500 mV hysteresis 20 µA Vi = 4 V 1 – µA Vi = 1 V – 200 – 50 – 25 µA Vi = 4 V – 800 – 200 – 100 µA Vi = 1 V 2.75 – 4.5 V – thSLP 4 22 38 µs – IIL VWK(th) –3 –2 –1 µA – 2.0 3.0 4.0 V VNSTB = 0 V VCC + 0.3 – 0.3 × VCC VCC Forced battery voltage stand-by mode (fail safe) Minimum hold time for Go-To-Sleep command VCC V – Wake-up Input WAKE Input current Wake-up threshold voltage Semiconductor Group 15 1998-11-01 TLE 6252 G Static Characteristics (cont’d) 4.75 V ≤ VCC ≤ 5.25 V; VNSTB = VCC; 6 V ≤ VBAT ≤ 27 V; – 40 ≤ Tj ≤ + 125 °C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter Symbol Limit Values min. typ. max. Unit Notes Inhibit Output INH HIGH level voltage drop ∆VH = VBAT – VINH ∆VH – 0.5 0.8 V IINH = – 0.18 mA; Leakage current ILI –5 – 5.0 µA sleep operation mode; VINH = 0 V – 2.5 – 2.2 Bus Lines CANL, CANH Differential receiver recessive-to-dominant threshold voltage VdRxD(rd) – 2.8 V VCC = 5.0 V Differential receiver dominant-to-recessive threshold voltage VdRxD(dr) – 3.17 – 2.87 – 2.58 V VCC = 5.0 V CANH recessive output voltage VCANHr 0.1 0.2 0.3 V TxD = VCC; RRTH < 4 kΩ CANL recessive output voltage VCANLr VCC – – V TxD = VCC; RRTL < 4 kΩ CANH dominant output voltage VCANHd – VCC V TxD = 0 V; normal mode; ICANH = – 40 mA CANL dominant output voltage VCANLd – 1.1 1.4 V TxD = 0 V; normal mode; ICANL = 40 mA CANH output current ICANH – 130 – 90 – 50 mA VCANH = 0 V; – 0.2 VCC – 1.4 TxD = 0 V – Semiconductor Group 0 16 – µA sleep operation mode; VCANH = 12 V 1998-11-01 TLE 6252 G Static Characteristics (cont’d) 4.75 V ≤ VCC ≤ 5.25 V; VNSTB = VCC; 6 V ≤ VBAT ≤ 27 V; – 40 ≤ Tj ≤ + 125 °C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter CANL output current Symbol ICANL Limit Values min. typ. max. – 50 90 130 Unit Notes mA VCANL = 5 V; TxD = 0 V – 0 – µA sleep operation mode; VCANL = 0 V; VBAT = 12 V Vdet(th) Voltage detection threshold for short-circuit to battery voltage on CANH and CANL 6.5 7.3 8.0 V normal operation mode Vdet(th) Voltage detection threshold for short-circuit to battery voltage on CANH VBAT VBAT VBAT V – 2.5 –2 –1 stand-by/ sleep operation mode CANH wake-up voltage threshold VWAKEH 1.2 1.9 2.7 V – CANL wake-up voltage threshold VWAKEL 2.4 3.1 3.8 V – Wake-up voltage threshold difference ∆VWAKE 0.2 – – V ∆VSLP = VSLPL – CANH single-ended receiver threshold VCANH 1.5 1.9 2.3 V failure cases 3, 5 and 7 CANL single-ended receiver threshold VCANL 2.8 3.1 3.8 V failure case 6 and 6a CANH leakage current ICANHl – 0 5 µA VCC = 0 V, Vbat = 0 V, VCANL = 13.5 V, RRTL = 100 Ω, Tj < 85 °C Semiconductor Group VSLPH 17 1998-11-01 TLE 6252 G Static Characteristics (cont’d) 4.75 V ≤ VCC ≤ 5.25 V; VNSTB = VCC; 6 V ≤ VBAT ≤ 27 V; – 40 ≤ Tj ≤ + 125 °C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter CANL leakage current Symbol ICANLl Limit Values Unit Notes min. typ. max. – 0 5 µA VCC = 0 V, Vbat = 0 V, VCANH = 5 V, RRTH = 100 Ω, Tj < 85 °C – 43 95 Ω Io = – 10 mA; Termination Outputs RTL, RTH RTL to VCC switch-on resistance RRTL RTL output voltage VoRTL normal operating mode VCC VCC – 1.0 – 0.7 RTL to BAT switch series RoRTL resistance 10 RTH to ground switch-on RRTH resistance – RTH output voltage VoRTH – V |Io| < 1 mA; VCC stand-by mode 16 35 kΩ VBAT stand-by or sleep operation mode 43 95 Ω Io = 10 mA; normal operating mode – 0.7 1.0 V Io = 1 mA; low power mode RTH pull-down current IRTHpd – 75 – µA normal operating mode, failure cases 6 and 6a RTL pull-up current IRTLpu – – 75 – µA normal operating mode, failure cases 3, 3a, 5 and 7 RTH leakage current IRTHl – 0 5 µA VCC = 0 V, Vbat = 0 V, VCANH = 5 V, RRTH = 100 Ω, Tj < 85 °C Semiconductor Group 18 1998-11-01 TLE 6252 G Static Characteristics (cont’d) 4.75 V ≤ VCC ≤ 5.25 V; VNSTB = VCC; 6 V ≤ VBAT ≤ 27 V; – 40 ≤ Tj ≤ + 125 °C (unless otherwise specified). All voltages are defined with respect to ground. Positive current flowing into the IC. Parameter RTL leakage current Symbol Limit Values Unit Notes min. typ. max. IRTLl – 0 5 µA VCC = 0 V, Vbat = 0 V, VCANL = 13.5 V, RRTL = 100 Ω, Tj < 85 °C TjSH 150 – – o – Thermal Shutdown Shutdown junction temperature Semiconductor Group 19 C 1998-11-01 TLE 6252 G Dynamic Characteristics VCC = 4.75 V to 5.25 V; VNSTB = VCC; VBAT = 6 V to 27 V; TA = – 40 to + 125 oC (unless otherwise specified). All voltages are defined with respect to ground. Positive current flows into the IC. Parameter Symbol Limit Values min. typ. max. Unit Notes CANH and CANL bus output transition time recessive-to-dominant trd 0.6 1.4 2.0 µs 10% to 90%; C1 = 10 nF; C2 = 0; R1 = 100 Ω CANH and CANL bus output transition time dominant-to-recessive tdr 0.7 1.0 1.3 µs 10% to 90%; C1 = 1 nF; C2 = 0; R1 = 100 Ω Minimum dominant time for wake-up on CANL or CANH twu(min) 8 22 38 µs stand-by modes VBAT = 12 V 20 36 60 µs Low power modes VBAT = 12 V 30 55 80 µs normal operating mode Failure case 6a detection time 2 4.8 8 ms normal operating mode Failure cases 5, 6, 6a and 7 recovery time 30 55 80 µs normal operating mode Failure cases 3 recovery time 150 450 750 µs normal operating mode Failure cases 5 and 7 detection time 0.75 1.8 4.0 ms normal operating mode Failure cases 5, 6, 6a and 7 detection time 0.8 3.6 8.0 ms Failure cases 5, 6, 6a and 7 recovery time – Minimum WAKE Low time tWK(min) for wake-up Failure cases 3 and 6 detection time Semiconductor Group tfail stand-by modes; VBAT = 12 V 2 20 – µs stand-by modes; VBAT = 12 V 1998-11-01 TLE 6252 G Dynamic Characteristics (cont’d) VCC = 4.75 V to 5.25 V; VNSTB = VCC; VBAT = 6 V to 27 V; TA = – 40 to + 125 oC (unless otherwise specified). All voltages are defined with respect to ground. Positive current flows into the IC. Parameter Propagation delay TxD-to-RxD LOW (recessive to dominant) Symbol tPD(L) Limit Values min. typ. max. – 0.8 1.5 Unit Notes µs C1 = 100 pF; C2 = 0; R1 = 100 Ω; no failures and bus failure cases 1, 2, 3a and 4 – 0.8 1.5 µs C1 = C2 = 3.3 nF; R1 = 100 Ω; no bus failure and failure cases 1, 2, 3a and 4 – 1.2 1.8 µs C1 100 pF; C2 = 0; R1 = 100 Ω; bus failure cases 3, 5, 6, 6a and 7 – 1.2 1.8 µs C1 = C2 = 3.3 nF; R1 =100 Ω; bus failure cases 3, 5, 6, 6a and 7 Semiconductor Group 21 1998-11-01 TLE 6252 G Dynamic Characteristics (cont’d) VCC = 4.75 V to 5.25 V; VNSTB = VCC; VBAT = 6 V to 27 V; TA = – 40 to + 125 oC (unless otherwise specified). All voltages are defined with respect to ground. Positive current flows into the IC. Parameter Propagation delay TxD-to-RxD HIGH (dominanat to recessive) Symbol tPD(H) Limit Values min. typ. max. – 1.5 2.0 Unit Notes µs C1 = 100 pF; C2 = 0; R1 =100 Ω; no failures and bus failure cases 1, 2, 3a and 4 – 2.5 3.0 µs C1 = C2 = 3.3 nF; R1 = 100 Ω; no bus failure and failure cases 1, 2, 3a and 4 – 1.0 1.5 µs C1 100 pF; C2 = 0; R1 = 100 Ω; bus failure cases 3, 5, 6, 6a and 7 – 1.4 2.1 µs C1 = C2 = 3.3 nF; R1 = 100 Ω; bus failure cases 3, 5, 6, 6a and 7 4 22 38 µs – Edge-count difference ne (falling edge) between CANH and CANL for failure cases 1, 2, 3a and 4 detection NERR becomes LOW – 4 – – normal operating mode Edge-count difference (rising edge) between CANH and CANL for failure cases 1, 2, 3a and 4 recovery – 2 – – 1 2.5 4 ms Minimum hold time to go sleep command TxD permanent dominant disable time Semiconductor Group th(min) tTxD 22 normal mode 1998-11-01 TLE 6252 G Test and Application +5V 7 6 5 4 3 2 1 WAKE ENT NSTB NERR RxD TxD INH TLE 6252 RTH RTL 8 9 20 pF CAN Transceiver V CC CANH CANL GND V BAT 10 11 R1 C1 12 13 14 + 12 V R1 C2 C1 CAN Bus Substitute 1 R1 R1 CK R 1 = 100 Ω C 1,2 = 10 nF C K = 1 nF CK Schaffner Generator CAN Bus Substitute 2 Figure 5 AES02423 Test Circuits For isolated testing the CAN Bus Substitute 1 is connected to the CAN Transceiver (see Figure 5). The capacitors C1-3 simulate the cable. Allowed minimum values of the termination resistors RRTH and RRTL are 500 Ω. Electromagnetic interference on the bus lines is simulated by switching to CAN Bus Substitute 2. The waves of the applied transients will be in accordance with ISO 7637 part 1, test 1, test pulses 1, 2, 3a and 3b. Semiconductor Group 23 1998-11-01 TLE 6252 G V BAT +5 V C 505C / C 515C / C 164CJ Microcontroller with On - Chip CAN Module TLE 4271 / TLE 4276 Low Drop Voltage Regulator 22 µ F 7 3 2 1 WAKE ENT NSTB NERR RxD TxD INH 6 5 4 TLE 6252 CAN Transceiver RTH RTL 8 9 V CC CANH CANL GND 10 11 12 V BAT 13 R RTL 14 100 nF R RTH 100 nF CAN Bus Line AES02422 Figure 6 Application of the TLE 6252 G Semiconductor Group 24 1998-11-01 TLE 6252 G Package Outlines P-DSO-14-2 (Plastic Dual Small Outline) 1.27 0.1 0.35 +0.15 2) 8˚ max. 4 -0.2 1) 0.19 +0.06 1.75 max 1.45 -0.2 0.2 -0.1 0.35 x 45˚ 0.4 +0.8 0.2 14x 6 ±0.2 14 8 1 7 8.75 -0.21) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.05 max. per side Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 25 GPS05093 Dimensions in mm 1998-11-01