Product Overview

Product Overview
NB6L611: Clock / Data Fanout Buffer, 1:2 Differential, 3 GHz, 2.5 V / 3.3 V,
with LVPECL Outputs
For complete documentation, see the data sheet
Product Description
The NB6L611 is a differential 1:2 clock or data fanout buffer. The differential inputs incorporate internal 50-ohm termination resistors
that are accessed through the VTD pins and will accept LVPECL, CML, LVDS, LVCMOS or LVTTL logic levels. The VREFAC pin is
an internally generated voltage supply available to this device only. VREFAC is used as a reference voltage for single-ended PECL
or NECL inputs. For all single-ended input conditions, the unused complementary differential input is connected to VREFAC as a
switching reference voltage. VREFAC may also rebias capacitor-coupled inputs. When used, decouple VREFAC with a 0.01uF
capacitor and limit current sourcing or sinking to 0.5mA. When not used, VREFAC output should be left open. The device is housed
in a small 3mm x 3mm 16-pin QFN package. The NB6L611 is a member of the ECLinPS MAX family of high performance clock and
data management products.
Features
Benefits
• Maximum Input Clock Frequency > 3.0 GHz
• VREFAC Reference Output
• Internal Input Termination Resistors, 50-ohm
• High Performance Applications
• Rebias Capacitor-coupled Input Signal
• No external components needed for inputs
Applications
• Clock / Data Distribution
Part Electrical Specifications
Product
Compliance
Status
Type
Chann
els
Input / Input
Output Level
Ratio
Output VCC
Level
Typ
(V)
tJitterR
MS
Typ
(ps)
tskew(oo) Max
(ps)
tpd Typ
(ns)
tR & tF
Max
(ps)
fmaxClo fmaxDat Packa
ck Typ a Typ ge
(MHz) (Mbps) Type
NB6L611MNG
Pb-free
Active
Buffer
1
1:2
ECL
0.2
15
0.28
170
4000
QFN16
0.2
15
0.28
170
4000
QFN16
Halide free
CMO
S
3.3
2.5
TTL
ECL
CML
LVD
S
NB6L611MNR2G
Pb-free
Halide free
Active
Buffer
1
1:2
CML
CMO
S
ECL
3.3
2.5
TTL
LVD
S
ECL
For more information please contact your local sales support at www.onsemi.com
Created on: 6/30/2016