NTMFS4899NF D

NTMFS4899NF
Power MOSFET
30 V, 75 A, Single N−Channel, SO−8 FL
Features
•
•
•
•
•
Integrated Schottky Diode
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
RDS(ON) MAX
5.0 mW @ 10 V
30 V
Applications
N−CHANNEL MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
D
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
17.8
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.70
W
Continuous Drain
Current RqJA v
10 sec
TA = 25°C
ID
29.1
A
Power Dissipation
RqJA, t v 10 sec
TA = 25°C
PD
TA = 25°C
ID
TA = 85°C
7.18
W
10.4
A
7.5
TA = 25°C
PD
0.92
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
75
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
48
W
TA = 25°C
IDM
188
A
TA = 25°C
IDmaxpkg
90
A
TJ,
TSTG
−55 to
+150
°C
IS
46
A
TC = 85°C
Current limited by package
MARKING
DIAGRAM
D
1
TA = 85°C
tp=10ms
S
21
Power Dissipation
RqJA (Note 2)
Pulsed Drain
Current
G
12.9
TA = 85°C
Steady
State
75 A
7.5 mW @ 4.5 V
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
Continuous Drain
Current RqJA
(Note 2)
ID MAX
Operating Junction and Storage
Temperature
Source Current (Body Diode)
54
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 41 Apk, L = 0.1 mH, RG = 25 W)
EAS
84
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A
Y
W
ZZ
S
S
S
G
D
4899NF
AYWZZ
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4899NFT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4899NFT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2012
September, 2012 − Rev. 3
1
Publication Order Number:
NTMFS4899NF/D
NTMFS4899NF
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
2.6
Junction−to−Ambient – Steady State (Note 1)
RqJA
46.3
Junction−to−Ambient – Steady State (Note 2)
RqJA
136.2
Junction−to−Ambient − t v 10 sec
RqJA
17.4
Unit
°C/W
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size (50 mm2, 1 oz Cu).
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 1.0 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Parameter
Typ
Max
Unit
OFF CHARACTERISTICS
V
27
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V,
VDS = 24 V
TJ = 25 °C
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 1.0 mA
mV/°C
500
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)/TJ
RDS(on)
10
VGS = 10 V
VGS = 4.5 V
Forward Transconductance
1.5
gFS
ID = 30 A
3.9
ID = 15 A
3.8
ID = 30 A
6.0
ID = 15 A
5.8
VDS = 1.5 V, ID = 15 A
57
mV/°C
5.0
7.5
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
165
Total Gate Charge
QG(TOT)
12.2
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
1600
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
360
1.6
4.6
pF
nC
4.6
QG(TOT)
VGS = 10 V, VDS = 15 V,
ID = 30 A
25
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
12.6
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
20.3
20
4.2
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTMFS4899NF
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
8.8
tr
td(OFF)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
18.5
ns
25.9
2.5
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.45
TJ = 125°C
0.43
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 2.0 A
0.70
V
19
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
9.2
ns
9.8
QRR
5.7
nC
Source Inductance
LS
0.38
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.005
1.84
1.5
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
2.4
W
NTMFS4899NF
TYPICAL CHARACTERISTICS
180
VGS = 4.6 V
4.8 V
3.8 V
3.6 V
80
3.4 V
60
3.2 V
40
3V
2.8 V
2.6 V
20
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
160 VDS = 10 V
4V
6V
100
4.4 V
4.2 V
5V
120
180
ID, DRAIN CURRENT (A)
140
TJ = 25°C
0.5
1
1.5
2
2.5
3
3.5
4
4.5
100
80
60
TJ = 125°C
40
TJ = 25°C
5
TJ = −55°C
1
3
3.5
4
4.5
Figure 2. Transfer Characteristics
8E−03
7E−03
6E−03
5E−03
4E−03
4.0
5.0
6.0
7.0
8.0
9.0
10.0
5
9E−03
TJ = 25°C
8E−03
7E−03
VGS = 4.5 V
6E−03
5E−03
VGS = 10 V
4E−03
3E−03
2E−03
10
20
30
40
50
60
70
80
90 100
ID, DRAIN CURRENT (A)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
Figure 3. On−Region versus VGS
1.0E−01
VGS = 0 V
ID = 30 A
VGS = 10 V
1.4
1.3
TJ = 125°C
1.0E−03
1.2
1.1
1
1.0E−04
0.9
0.8
0.7
0.6
−50
TJ = 150°C
1.0E−02
IDSS, LEAKAGE (A)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
2.5
Figure 1. On−Region Characteristics
9E−03
1.6
1.5
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
1E−02
1.8
1.7
1.5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID = 30 A
TJ = 25°C
3.0
120
0
1.1E−02
3E−03
140
20
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
160
7 V to
10 V
TJ = 25°C
1.0E−05
−25
0
25
50
75
100
125
150
1.0E−06
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
30
NTMFS4899NF
TYPICAL CHARACTERISTICS
1800
TJ = 25°C
VGS = 0 V
Ciss
1600
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
2000
1400
1200
1000
800
600
Coss
400
Crss
200
0
0
5
10
15
20
25
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
11
10
QT
9
8
7
6
5
4
Qgs
2
1
0
30
0
td(off)
100
t, TIME (ns)
IS, SOURCE CURRENT (A)
30
VDD = 15 V
ID = 15 A
VGS = 10 V
tf
tr
td(on)
10
1
10
RG, GATE RESISTANCE (W)
20
15
10
5
0
0.1
100
0.2
0.3
0.4
0.5
0.6
0.7
0.8
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
0.9
Figure 10. Diode Forward Voltage vs. Current
1000
90
VGS = 30 V
Single Pulse
TC = 25°C
10 ms
100 ms
10
1 ms
10 ms
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
0.1
dc
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
VGS = 0 V
TJ = 25°C
25
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
0.01
25
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
100
ID = 30 A
TJ = 25°C
VDD = 15 V
VGS = 10 V
5
10
15
20
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1
Qgd
3
100
ID = 41 A
80
70
60
50
40
30
20
10
0
25
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
1
NTMFS4899NF
TYPICAL CHARACTERISTICS
100
R(t)
(°C/W)
D = 0.5
10 0.2
0.1
0.05
0.02
1
0.01
0.1
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
t, TIME (s)
Figure 13. Thermal Response
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6
1
10
100
1000
NTMFS4899NF
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE G
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
2X
0.20 C
4X
E1
2
3
q
E
2
1
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
0.10 C
SIDE VIEW
SOLDERING FOOTPRINT*
DETAIL A
3X
8X
0.10
C A B
0.05
c
4X
e/2
1
4
0.965
K
G
0.750
1.000
L
PIN 5
(EXPOSED PAD)
4X
1.270
b
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
1.20
1.35
1.50
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
1.330
2X
0.905
2X
E2
L1
M
0.495
4.530
3.200
0.475
D2
2X
BOTTOM VIEW
1.530
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTMFS4899NF/D