ONSEMI NTMFS4983NF

NTMFS4983NF
Power MOSFET
30 V, 106 A, Single N−Channel, SO−8 FL
Features
•
•
•
•
•
Integrated Schottky Diode
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
Applications
•
•
•
•
RDS(ON) MAX
2.1 mW @ 10 V
30 V
CPU Power Delivery
Synchronous Rectification for DC−DC Converters
Low Side Switching
Telecom Secondary Side Rectification
N−CHANNEL MOSFET
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
30
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
3.13
W
Continuous Drain
Current RqJA v
10 sec
TA = 25°C
ID
48
A
Power Dissipation
RqJA, t v 10 sec
TA = 25°C
PD
7.7
W
TA = 25°C
ID
22
A
Continuous Drain
Current RqJA
(Note 2)
TA = 85°C
Steady
State
Power Dissipation
RqJA (Note 2)
TA = 25°C
PD
1.7
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
106
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
38
W
TA = 25°C
IDM
320
A
TA = 25°C
IDmaxpkg
100
A
TJ,
TSTG
−55 to
+150
°C
IS
54
A
Pulsed Drain
Current
tp=10ms
Current limited by package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
76
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V, IL = 45 Apk,
L = 0.1 mH, RG = 25 W)
EAS
101
mJ
TL
260
°C
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2012
July, 2012 − Rev. 2
S
(1, 2, 3)
MARKING
DIAGRAM
D
16
TC = 85°C
(5, 6)
(4)
34
TA = 85°C
D
G
22
TA = 85°C
106 A
3.1 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
ID MAX
1
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A
Y
W
ZZ
S
S
S
G
4983NF
AYWZZ
D
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4983NFT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4983NFT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Publication Order Number:
NTMFS4983NF/D
NTMFS4983NF
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
3.3
Junction−to−Ambient – Steady State (Note 1)
RqJA
40
Junction−to−Ambient – Steady State (Note 2)
RqJA
74
Junction−to−Ambient − t v 10 sec
RqJA
16.3
Unit
°C/W
1. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size of 100 mm2.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
30
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 1.0 mA
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
ID = 10 mA, referenced to 25°C
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VGS = 0 V,
VDS = 24 V
V
15
TJ = 25°C
mV/°C
500
VDS = 0 V, VGS = ±20 V
±100
mA
nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)
VGS = VDS, ID = 1.0 mA
VGS(TH)/TJ
ID = 10 mA, referenced to 25°C
RDS(on)
VGS = 10 V
VGS = 4.5 V
Forward Transconductance
gFS
1.2
1.7
ID = 30 A
1.6
ID = 15 A
1.6
ID = 30 A
2.5
ID = 15 A
2.5
VDS = 1.5 V, ID = 15 A
2.3
5.0
60
V
mV/°C
2.1
3.1
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
90
Total Gate Charge
QG(TOT)
22.6
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
3250
VGS = 0 V, f = 1 MHz, VDS = 15 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
1340
2.9
7.0
pF
nC
6.9
QG(TOT)
VGS = 10 V, VDS = 15 V,
ID = 30 A
47.9
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
13.5
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
24.9
28.7
10.7
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTMFS4983NF
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
9.4
tr
td(OFF)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
16.7
ns
35.2
7.4
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.4
TJ = 125°C
0.32
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 2 A
0.7
V
45
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 2 A
23
ns
22
QRR
50
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.20
1.5
1.0
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
W
NTMFS4983NF
200
4.0 V
VGS = 3.4 V
3.6 V
4.2 V
3.2 V
4.4 V to 4.5 V
3.0 V
7.5 V to 10 V
2.8 V
2.6 V
140
120
100
1
2
3
TJ = 125°C
80
TJ = 25°C
60
TJ = −55°C
40
20
4
0
5
1.0
1.5
2.0
2.5
3.0
3.5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
2.0E−02
4.0
3.0E−03
ID = 30 A
TJ = 25°C
1.8E−02
1.6E−02
2.8E−03 TJ = 25°C
2.6E−03
1.4E−02
VGS = 4.5 V
2.4E−03
1.2E−02
2.2E−03
1.0E−02
2.0E−03
8.0E−02
1.8E−03
6.0E−02
VGS = 10 V
1.6E−03
4.0E−02
1.4E−03
2.0E−02
0.0E+00
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
1.2E−03
5
20
35
50
65
80
95
110 125 140 155
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.8
1.7
ID = 20 A
1.6
VGS = 10 V
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
−50 −25
0
1.00E−01
VGS = 0 V
TJ = 150°C
1.00E−02
IDSS, LEAKAGE (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
160
2.4 V
0
VDS = 5 V
180
ID, DRAIN CURRENT (A)
200
190
180
170
160
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
TYPICAL PERFORMANCE CURVES
TJ = 125°C
1.00E−03
TJ = 25°C
1.00E−04
25
50
75
100
125
150
1.00E−05
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
NTMFS4983NF
TYPICAL PERFORMANCE CURVES
11
4000
VGS = 0 V
TJ = 25°C
Ciss
3200
VGS, GATE−TO−SOURCE VOLTAGE
(V)
C, CAPACITANCE (pF)
3600
2800
2400
Coss
2000
1600
1200
800
400
Crss
0
0
5
10
15
20
25
QT
9
8
7
6
5
4
Qgs
Qgd
5
10
ID = 30 A
TJ = 25°C
VDD = 15 V
VGS = 10 V
3
2
1
0
30
0
15
20
25
30
35
40
45
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
50
10
1000
9
VDD = 15 V
ID = 10 A
VGS = 10 V
td(off)
IS, SOURCE CURRENT (A)
t, TIME (ns)
10
100
tf
tr
td(on)
10
VGS = 0 V
TJ = 25°C
8
7
6
5
4
3
2
1
1
1
10
100
0.3
0.4
0.5
0.6
0.7
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
10 ms
100 ms
10
1 ms
10 ms
1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1
1
dc
10
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
0.2
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
0 V < VGS < 20 V
Single Pulse
TC = 25°C
0.01
0.01
0.1
RG, GATE RESISTANCE (W)
1000
100
0
0.0
100
110
ID = 45 A
100
90
80
70
60
50
40
30
20
10
0
25
50
75
100
125
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
NTMFS4983NF
TYPICAL PERFORMANCE CURVES
100
D = 0.5
0.2
0.1
r(t)
(°C/W)
10
0.05
1
0.02
0.01
0.1
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (s)
Figure 13. Thermal Response
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6
1
10
100
1000
NTMFS4983NF
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE G
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
2X
0.20 C
4X
E1
2
3
q
E
2
1
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
0.10 C
SIDE VIEW
SOLDERING FOOTPRINT*
DETAIL A
3X
8X
0.10
C A B
0.05
c
4X
e/2
1
4
0.965
K
G
0.750
1.000
L
PIN 5
(EXPOSED PAD)
4X
1.270
b
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
1.20
1.35
1.50
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
1.330
2X
0.905
2X
E2
L1
M
0.495
4.530
3.200
0.475
D2
2X
BOTTOM VIEW
1.530
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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NTMFS4983NF/D