INTEGRATED CIRCUITS DATA SHEET TDA4780 RGB video processor with automatic cut-off control and gamma adjust Preliminary specification Supersedes data of May 1994 File under Integrated Circuits, IC02 1997 Feb 06 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 FEATURES • Gamma adjust • Dynamic black control (adaptive black) • All input signals clamped on black-levels • Automatic cut-off control, alternative: output clamping on fixed levels • Three adjustable reference voltage levels via I2C-bus for automatic cut-off control The required input signals are: • Luminance/colour difference interface • 2 or 3-level sandcastle pulse for internal timing pulse generation • Luminance and negative colour difference signals • Two luminance input levels allowed • I2C-bus data and clock signals. • Two RGB interfaces controlled by either fast switches or by I2C-bus • Two peak drive limiters, selection via Two sets of analog RGB colour signals can also be inserted, e.g. one from a peritelevision connector (SCART plug) and the other one from an On-Screen Display (OSD) generator. The TDA4780 has I2C-bus control of all parameters and functions with automatic cut-off control of the picture tube cathode currents. It provides RGB output signals for the video output stages. In clamped output mode it can also be used as an RGB source. I2C-bus • Blue stretch, selection via I2C-bus • Luminance output for scan velocity modulation (SCAVEM) • Extra luminance output; same pin can be used as hue control output e.g. for the TDA4650 and TDA4655 • Non standard operations like 50 Hz/32 kHz are also possible The main differences with the sister type TDA4680 are: • Additional features, namely gamma adjust, adaptive black, blue stretch and two different peak drive limiters • Either 2 or 3 level sandcastle pulse applicable • High bandwidth for 32 kHz application • The measurement lines are triggered by the trailing edge of the vertical component of the sandcastle pulse • White point adjusts via I2C-bus • Average beam current and improved peak drive limiting • I2C-bus receiver only. Automatic white level control is not provided; the white levels are determined directly by the I2C-bus data. • Two switch-on delays to prevent discoloration during start-up • All functions and features programmable via I2C-bus • The TDA4780 is pin compatible (except pin 18) with the TDA4680. The I2C-bus slave address can be used for both ICs. When a function of the TDA4780 is not included in the TDA4680, the I2C-bus command is not executed. Special commands (except control bit FSWL) for the TDA4680 will be ignored by the TDA4780. • PAL/SECAM or NTSC matrix selection. GENERAL DESCRIPTION The TDA4780 is a monolithic integrated circuit with a luminance and a colour difference interface for video processing in TV receivers. Its primary function is to process the luminance and colour difference signals from a colour decoder which is equipped e.g. with the multistandard decoder TDA4655 or TDA9160 plus delay line TDA4661 or TDA4665 and the Picture Signal Improvement (PSI) IC TDA467X or from a feature module. 1997 Feb 06 2 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VP supply voltage (pin 5) 7.2 8.0 8.8 V IP supply current (pin 5) 80 100 120 mA V8(p-p) luminance input (peak-to-peak value) (C)VBS − 0.45/1.43 − V6(p-p) −(B − Y) input (peak-to-peak value) − 1.33 − V V7(p-p) −(R − Y) input (peak-to-peak value) − 1.05 − V V14 three-level sandcastle pulse H+V − 2.5 − V H − 4.5 − V BK − 8.0 − V H+V − 2.5 − V BK − 4.5 − V Vi RGB input signals at pins 2, 3, 4, 10, 11 and 12 (black-to-white value) − 0.7 − V Vo(p-p) RGB output at pins 24, 22 and 20 (black-to-white value) − 2.0 − V Tamb operating ambient temperature −20 − +70 °C V two-level sandcastle pulse ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA4780 DIP28 1997 Feb 06 DESCRIPTION plastic dual in-line package; 28 leads (600 mil) 3 VERSION SOT117-1 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 BLOCK DIAGRAM handbook, full pagewidth peak dark storage FSW1 FSW2 Y - output / hue adjust output VP = 8 V 1 µF 200 µF FSW1 FSW2 CPDST YHUE GND VP 13 1 18 26 9 5 TDA4780 YEXH R1 G1 B1 10 nF R1 10 10 nF G1 11 10 nF B1 12 10 nF R2 2 HUE ADJUST CLAMP SUPPLY BANDGAP REFERENCE UGAP −(R − Y) Y INPUT SELECTOR CLAMP B2 4 10 nF −(B − Y) 6 10 nF −(R − Y) 7 47 nF CLAMP Y 8 0.45 V 1.43 V Y DELOF HDTV SC5 FSBL R PAL / SECAM G NTSC MATRIX B G NMEN Y Y - MATRIX R B FSON2 −(B − Y) 10 nF G2 3 a GAMMA R ADBL R−Y COLOUR DIFFERENCE MATRIX YBL ADAPTIVE BLACK gamma Y BL SATURATION ADJUST G−Y G B b c d B−Y FSDIS2 B2 10 nF FSON1 G2 Y FSDIS1 R2 e YEXH RELC BCOF TCPL f YHI 6 DATA 8 DATA CONTROL REGISTERS REGISTERS DIGITAL TO ANALOG CONVERTERS g UGAP CL SC5 BREN I2C-BUS RECEIVER V SANDCASTLE DETECTOR DELOF 28 27 14 SCL SDA SC I2C-bus Fig.1 Block diagram (continued in Fig.2). 1997 Feb 06 4 sandcastle input HV (H) h i j MGE875 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust handbook, full pagewidth average beam current limiting input TDA4780 peak drive limiting storage 1 µF BCL CPDL 15 16 PEAK DRIVE LIMITER ABSOLUTE LEVEL AVERAGE BEAM CURRENT LIMITING TDA4780 RELC PEAK DRIVE LIMITER CUT-OFF RELATED MINIMUM DETECTOR VOLTAGE COMPARATOR TCPL VOLTAGE COMPARATOR RELC WHITE POINT ADJUST R a R b CONTRAST ADJUST c G B d WHITE POINT ADJUST G B WHITE POINT ADJUST f j GO NMEN BLANK FSBL HDTV MP OUTPUT BUFFER (H) OUTPUT CLAMP CUT-OFF CONTROL 19 CI TIMING GENERATOR 1st AND 2nd SWITCH-ON DELAY leakage and cut - off current input 82 kΩ LEAKAGE CURRENT COMPARATOR 17 UGAP CL 330 nF leakage storage 21 23 25 CB 220 nF CG CR 220 nF 220 nF cut-off storage Fig.2 Block diagram (continued from Fig.1). 1997 Feb 06 20 BO UGAP BCOF CL HV RGB outputs to video amplifiers B BCOF i 22 MP BLANK REGISTERS DIGITAL ANALOG CONVERTERS h OUTPUT BUFFER MP BLANK B BLUE STRETCH e g RO G B MOD2 24 MP BLANK R BRIGHTNESS ADJUST OUTPUT BUFFER 5 MGE876 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 PINNING SYMBOL PIN DESCRIPTION FSW2 1 fast switch 2 input R2 2 red input 2 G2 3 green input 2 B2 4 blue input 2 VP 5 supply voltage −(B − Y) 6 colour difference input −(B − Y) −(R − Y) 7 colour difference input −(R − Y) Y 8 luminance input GND 9 ground R1 10 red input 1 G1 11 green input 1 B1 12 FSW1 13 fpage FSW2 1 28 SCL R2 2 27 SDA G2 3 26 YHUE B2 4 25 CR VP 5 24 RO blue input 1 −(B − Y) 6 23 CG fast switch 1 input −(R − Y) 7 SC 14 sandcastle pulse input BCL 15 average beam current limiting input CPDL 16 storage capacitor for peak limiting CL 17 storage capacitor for leakage current compensation CPDST 18 storage capacitor for peak dark CI 19 cut-off measurement input BO 20 blue output CB 21 blue cut-off storage capacitor GO 22 green output CG 23 green cut-off storage capacitor RO 24 red output CR 25 red cut-off storage capacitor YHUE 26 Y-output/hue adjust output SDA 27 I2C-bus serial data input/acknowledge output SCL 28 I2C-bus serial clock input 1997 Feb 06 22 GO TDA4780 Y 8 21 CB GND 9 20 BO R1 10 19 CI G1 11 18 CPDST B1 12 17 CL FSW1 13 16 CPDL 15 BCL SC 14 MGE874 6 Fig.3 Pin configuration. Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 FUNCTIONAL DESCRIPTION Adaptive black (ADBL) Signal input stages The adaptive black stage detects the lowest voltage of the luminance component of the internal RGB signals during the scanning time and shifts it to the nominal black level. In order to keep the nominal white level the contrast is increased simultaneously. The TDA4780 contains 3 sets of input signal stages for: 1. Luminance/colour-difference signals: a) Y: 0.45 V (p-p) VBS or 1.43 V (p-p) VBS, selectable via I2C-bus. b) −(R − Y): 1.05 V (p-p). Blue stretch (BLST) c) −(B − Y): 1.33 V (p-p). The blue stretch channel gets additional amplification if the blue signal is greater than 80% of the nominal signal amplitude. In the event the white point is shifted towards higher colour temperature so that white parts of a picture seem to be brighter. The capacitively coupled signals are matrixed to RGB signals by either a PAL/SECAM or NTSC matrix (selected via I2C-bus). 2. (RGB)1 signals (0.7 V (p-p) VB), capacitively coupled (e.g. from external source). Measurement pulse and blanking stage 3. (RGB)2 signals (0.7 V (p-p) VB), capacitively coupled (e.g. videotext, OSD). During the vertical and horizontal blanking time and the measurement period the signals are blanked to an ultra black level, so the leakage current of the picture tube can be measured and automatically compensated for. All input signals are clamped in order to have the same black levels at the signal switch input. Displayed signals must be synchronous with the sandcastle pulse. During the cut-off measurement lines (one line period for each R, G or B) the output signal levels are at cut-off measurement level. Signal switches Both fast signal switches can be operated by switching pins (e.g. SCART facilities) or set via the I2C-bus. With the pin FSW1 the Y-CD signals or the (RGB)1 signals can be selected, with pin FSW2 the above selected signals or the (RGB)2 signals are enabled. During the vertical and horizontal blanking time an artificial black level equal to the clamped black level is inserted in order to clip off the sync pulse of the luminance signal and to suppress hum during the cut-off measurement time and eliminate noise during these intervals. The vertical blanking period is timed by the sandcastle pulse. The measurement pulses (leakage, R, G and B) are triggered by the negative going edge of the vertical pulse of the sandcastle pulse and start after the following horizontal pulse. The IC is prepared for 2fH (32 kHz) application. Output amplifier and white adjust potentiometer The RGB signals are amplified to nominal 2 V (p-p), the DC-levels are shifted according to cut-off control. The nominal signal amplitude can be varied by ±50% by the white point adjustment via the I2C-bus (individually for RGB respect). Saturation, contrast and brightness adjust Saturation, contrast and brightness adjusts are controlled via the I2C-bus and act on Y, CD as well as on RGB input signals. Gamma acts on the luminance content of the input signals. Gamma adjust The gamma adjust stage has a non-linear transmission characteristic according to the formula y = xgamma, where x represents the input and y the output signal. If gamma is smaller than unity, the lower parts of the signal are amplified with higher gain. 1997 Feb 06 7 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 Automatic cut-off control Switch on delay circuit During leakage measurement time the leakage current is compensated in order to get a reference voltage at the cut-off measurement info pin. This compensation value is stored in an external capacitor. During cut-off current measurement times for the R, G and B channels, the voltage at this pin is compared with the reference voltage, which is individually adjustable via I2C-bus for each colour channel. The control voltages that are derived in this way are stored in the external feedback capacitors. Shift stages add these voltages to the corresponding output signals. The automatic cut-off control may be disabled via the I2C-bus. In this mode the output voltage is clamped to 2.5 V. Clamping periods are the same as the cut-off measurement periods. After switch on all signals are blanked and a warm up test pulse is fed to the outputs during the cut-off measurement lines. If the voltage at the cut-off measurement input exceeds an internal level the cut-off control is enabled but the signal remains still blanked. In the event of output clamping, the cut-off control is disabled and the switch on procedure will be skipped. Y output and hue adjust The TDA4780 contains a D/A converter for hue adjust. The analog information can be fed, e.g. to the multistandard decoder TDA4650 or TDA4655. This output pin may be switched to a Y output signal, which can be used for scan velocity modulation (SCAVEM). The Y output is the Y input signal or the matrixed (RGB) input signal according to the switch position of the fast switch. Signal limiting The TDA4780 provides two kinds of signal limiting. First, an average beam limiting, that reduces signal level if a certain average is exceeded. Second, a peak drive limiting, that is activated if one of the RGB signals even shortly exceeds a via I2C-bus adjusted threshold. The latter can be either referred to the cut-off measurement level of the outputs or to ground. I2C-bus The TDA4780 contains an I2C-bus receiver for control function. ESD protection The Pins are provided with protection diodes against ground and supply voltage (see Chapter “Internal pin configurations”). I2C-bus input pins do not shunt the I2C-bus signals in the event of missing supply voltage. When signal limiting occurs, contrast is reduced, and at minimum contrast brightness is reduced additionally. Sandcastle decoder and timer A 3-level detector separates the sandcastle pulse into combined line and field pulses, line pulses, and clamping pulses. The timer contains a line counter and controls the cut-off control measurement. EMC The pins are protected against electromagnetic radiation. Application with a 2-level 5 V sandcastle pulse is possible. 1997 Feb 06 8 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 I2C-BUS RECEIVER Table 1 Slave address; note 1 A6 A5 A4 A3 A2 A1 A0 W 1 0 0 0 1 0 0 0 Note 1. Explanation for the cell contents of the table: a) W means write. Table 2 S Slave receiver format (write mode; BREN = 0); note 1 SLAVE ADDRESS A SUBADDRESS(2) A DATA BYTE n data bytes with auto-increment of subaddresses A P Notes 1. Explanation for the cell contents of the table: a) S means START condition. b) P means STOP condition. c) A means acknowledge. 2. All subaddresses within the range 00H to 0FH are automatically incremented. The subaddress counter wraps around from 0FH to 00H. Only in this event 0FH will be acknowledged. Subaddresses outside the range 00H to 0EH are not acknowledged by the device and neither auto-increment nor any other internal operation takes place. All eight bits of the subaddress have to be decoded by the device. Table 3 S Slave receiver format (write mode; BREN = 1); note 1 SLAVE ADDRESS A SUBADDRESS DATA BYTE(2) A Notes 1. Explanation for the cell contents of the table: a) S means START condition. b) P means STOP condition. c) A means acknowledge. 2. Auto-increment is not possible. 1997 Feb 06 9 A P Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust handbook, full pagewidth TDA4780 MSB 1 LSB 0 0 0 1 0 0 module address X ACK R/W MED696 Fig.4 The module address byte. handbook, full pagewidth STA MAD SAD STO MED697 START condition data byte STOP condition Fig.5 Data transmission without auto-increment (BREN = 0 or 1). handbook, full pagewidth STA MAD SAD STO MED698 START condition STOP condition data byte data bytes Fig.6 Data transmission with auto-increment (BREN = 0) 1997 Feb 06 10 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust Table 4 Signal input selection and effect on adaptive black measurements by fast source switches and I2C-bus; note 1 I2C-BUS CONTROLLED BITS ANALOG SWITCH FSW2 (pin 1) FSON2 FSDIS2 FSON1 FSDIS1 L L L L L TDA4780 L L L H L H X FSW1 (pin 13) SELECTED SIGNALS RGB2 (pins 2, 3 and 4) ADBL L L active L H active H X L X H X L X H X L ON active ON L X X H active L H L H X X active L H H X X X active H L X X L X X X ON active ON inactive ON active Note 1. Explanation for the cell contents of the table: a) H = set to logic 1 or analog switch (pins 1 and 13) to >0.9 V. b) L = set to logic 0 or analog switch (pins 1 and 13) to <0.4 V. c) X = don’t care. d) ON = this signal is selected. 1997 Feb 06 ON active H X ON inactive L X ON inactive H H ON active ON 11 TV (pins 6, 7 and 8) inactive L H RGB1 (pins 10, 11 and 12) ON ON ON ON Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust Table 5 Crosstalk; note 1 FSW1 FSW2 L L L H L H H TDA4780 H AT 4 MHz MAXIMUM VALUE (dB) AT 8 MHz MAXIMUM VALUE (dB) AT 13 MHz MAXIMUM VALUE (dB) RGB1 → Y, CD −58 −55 −50 RGB2 → Y, CD −58 −55 −50 Y, CD → RGB1 −51 −50 −47 RGB2 → RGB1 −58 −55 −50 Y, CD → RGB2 −51 −50 −47 RGB1 → RGB2 −58 −55 −50 Y, CD → RGB2 −51 −50 −47 RGB1 → RGB2 −58 −55 −50 CROSSTALK Note 1. Explanation for the cell contents of the table: a) H = set to logic 1. b) L = set to logic 0. Table 6 Subaddress byte and data byte format; notes 1 and 2 DATA BYTE FUNCTION Brightness SUBADDRESS 00H D7 D6 D5 D4 D3 D2 D1 D0(3) L L A05 A04 A03 A02 A01 A00 Saturation 01H L L A15 A14 A13 A12 A11 A10 Contrast 02H L L A25 A24 A23 A22 A21 A20 Hue 03H L L A35 A34 A33 A32 A31 A30 Red gain 04H L L A45 A44 A43 A42 A41 A40 Green gain 05H L L A55 A54 A53 A52 A51 A50 Blue gain 06H L L A65 A64 A63 A62 A61 A60 Red level reference 07H L L A75 A74 A73 A72 A71 A70 Green level reference 08H L L A85 A84 A83 A82 A81 A80 Blue level reference 09H L L A95 A94 A93 A92 A91 A90 Peak drive limit 0AH L L AA5 AA4 AA3 AA2 AA1 AA0 Gamma 0BH L L AB5 AB4 AB3 AB2 AB1 AB0 Control register 1 0CH SC5 DELOF BREN X NMEN X X X Control register 2 0DH X HDTV FSBL BCOF Control register 3 0EH ADBL YHI MOD2 BLST FSDIS2 FSON2 FSDIS1 FSON1 YEXH RELC TCPL Notes 1. Explanation for the cell contents of the table: a) L = set to logic 0. b) X means don’t care but for software compatibility with further video ICs with the same slave address, it is recommended to set all these bits to logic 0. 2. After power on reset all alignment registers are set to 01H. 3. The least significant bit of the analog alignment register. 1997 Feb 06 12 L Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust Table 7 TDA4780 RGB processor mode bits control register SYMBOL PARAMETER CONDITIONS Control register 1 SC5 sandcastle 5 V 0 = 3-level sandcastle pulse DELOF delay of leading edge of clamping pulse switched off 0 = delay buffer register enable 0 = new data are executed just after reception 1 = 2-level sandcastle pulse BREN 1 = no delay 1 = data is held in a latch (buffer register) and will be transferred to their destination register within the next vertical blanking interval; the device does not acknowledge any new data transfer until the internal transfer to the destination register has been completed NMEN NTSC matrix enable; note 1 0 = PAL matrix 1 = NTSC matrix; hue position set on −2 degrees Control register 2 HDTV HDTV / progressive scan for ADBL line counter 0 = 272 (PAL), 224 (NTSC) lines FSBL full screen black level, e.g. for optical measurement 0 = normal mode BCOF internal black level control off 0 = automatic cut-off control active FSON2 fast switch 2 on see Table 4 FSDIS1 fast switch 1 disable 1 = 544 (PAL), 448 (NTSC) lines 1 = cut-off measurement level during full field, brightness inactive 1 = RGB outputs clamped to fixed DC levels FSDIS2 fast switch 2 disable FSON1 fast switch 1 on Control register 3 ADBL adaptive black 0 = off 1 = on YHI Y high level MOD2 modus 2 0 = input = 0.315 V (p-p) (black-white) 1 = input = 1.0 V (p-p) (black-white) 0 = inactive; (BCOF = 0) AND (MOD2 = 1) is senseless, no output stabilization 1 = output clamp without brightness adjust, brightness remains active e.g. for blue stretch BLST blue stretch 0 = off 1 = on YEXH Y exclusive hue RELC relative to cut-off 0 = pin 26 is switched to hue adjust output 1 = pin 26 is switched to Y output 0 = peak drive limit to absolute output 1 = peak drive limit relative to cut-off TCPL time constant peak drive limiter 0 = 2fH 1 = 1fH 1997 Feb 06 13 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 Note 1. Matrix coefficients should be tested by comparing RGB output signals with a reference RGB colour bar, which is fed in at (RGB)1 or (RGB)2 inputs. In the event of NMEN = 1 (NTSC) at minimum saturation the Y output and RGB output signals are not identical to the Y input signal. PAL/SECAM signals are matrixed by the equation: VG − Y = −0.51VR − Y − 0.19VB − Y NTSC signals are matrixed by the equations (hue phase shift of −2 degrees): VR − Y* = 1.39VR − Y − 0.07VB − Y; VG − Y* = −0.46VR − Y − 0.15VB − Y; VB − Y* = VB − Y For demodulation axis see Fig.11. In the matrix equations: VR − Y and VB − Y are conventional PAL demodulation axes and amplitudes at the output of the demodulator. VR − Y*, VG − Y* and VB − Y* are the NTSC-modified colour-difference signals. handbook, full pagewidth maximum brightness nominal brightness cut-off measurement line for green signal ultra-black MGE878 Fig.7 Cut-off measurement pulses. 1997 Feb 06 14 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 nominal white level handbook, full pagewidth nominal black level input signal adaptive black level control Fig.8 Principle of adaptive black control. handbook, full pagewidth R G B MGE880 Fig.9 Principle of blue stretch. 1997 Feb 06 15 MGE879 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 handbook, full pagewidth sandcastle pulse with vertical component timing controlled by sandcastle pulse R channel LM MR G channel LM MG B channel LM MB MT DG MGE881 LM = leakage current measurement time. MR, MG, MB = R, G, B cut-off measurement pulses. MT = measurement time. DG = internal blanking. Fig.10 Pulse diagram. handbook, full pagewidth V-axis V-axis (R − Y) 1.14 / 90˚ (R − Y) 1.59 / 95.1˚ PAL NTSC-JAPAN nominal hue = −2˚ (B − Y) 2.03 / 0˚ (B − Y) 2.03 / 0˚ U-axis U-axis (G − Y) 0.606 / 239.9˚ (G − Y) 0.698 / 236.4˚ MGE877 Fig.11 Demodulation axes. 1997 Feb 06 16 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VP supply voltage −0.1 +9.0 V V10, 11, 12 (RGB)1 inputs with respect to GND −0.1 VP V V2, 3, 4 (RGB)2 inputs with respect to GND −0.1 VP V V8, 7, 6 Y, CD-inputs with respect to GND −0.1 VP V V13, 1 switch 1 and switch 2 input voltage with respect to GND −0.1 VP V V25, 23, 21, 17 black level, leakage storage with respect to GND −0.1 VP V V14 sandcastle with respect to GND −0.7 VP + 5.8 V V15 average current information with respect to GND −0.7 VP + 0.7 V V16 peak drive storage with respect to GND −0.1 VP V V18 peak dark storage with respect to GND −0.1 VP V V19 cut-off control input voltage with respect to GND −0.7 VP + 0.7 V V27, 28 I2C-bus: SDA and SCL voltage with respect to GND −0.1 VP V I24, 22, 20 output peak current −20 − mA I24, 22, 20 output average current −10 − mA I26 Y output/hue adjust current −8 − mA Ptot total power dissipation − 1200 mW Tamb operating ambient temperature −20 +70 °C Tstg storage temperature −20 +150 °C Ves electrostatic handling; note 1 −500 +500 V Note 1. Charge device model class A: discharging a 200 pF capacitor through a 0 Ω series resistor. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE UNIT 47 K/W QUALITY SPECIFICATION In accordance with URV-4-2-59/601. The number of the quality specification can be found in the “Quality Reference Handbook”. The handbook can be ordered using the code 9397 750 00192. 1997 Feb 06 17 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 CHARACTERISTICS VP = 8 V; Tamb = +25 °C; Vnom: nominal signal amplitude (black-white) 2 000 mV (peak-to-peak value) at output pins; gamma = 1; adaptive black inactive; brightness, contrast, saturation and white balance at nominal settings; no beam current or peak drive limiting; all voltages are related to ground (pin 9) and measured in Figs 1 and 2; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VP supply voltage (pin 5) 7.2 8 8.8 V IP supply current (pin 5) − 100 120 mA Colour-difference inputs (−(B − Y): pin 6, −(R − Y): pin 7; capacitively coupled to a low-ohmic source; recommendation: maximum 600 Ω) V6(p-p) −(B − Y) signal (peak-to-peak value) − 1.33 − V V6, 7 internal bias during clamping − 4.0 − V I6, 7 DC input current between clamping pulses − − 0.1 µA I6, 7 maximum input current during clamping 100 180 260 µA V7(p-p) −(R − Y) signal (peak-to-peak value) − 1.05 − V R6, 7 AC input resistance 10.0 − − MΩ 75% colour bar signal 75% colour bar signal Y input (pin 8; capacitively coupled to a low-ohmic source; recommendation: maximum 600 Ω) V8(p-p) input signal (composite signal; VBS; peak-to-peak value) R8 AC input resistance V8 internal bias during clamping adaption to two different signal levels via control bit YHI YHI = 0 − 0.45 − V YHI = 1 − 1.43 − V 10.0 − − MΩ YHI = 0 − 3.7 − V YHI = 1 − 4.6 − V I8 DC input current between clamping pulses − − 0.1 µA I8(max)(clamp) maximum input current during clamping 100 180 260 µA RGB input 1 (R1: pin 10, G1: pin 11, B1: pin 12; capacitively coupled to a low-ohmic source; recommendation: maximum 600 Ω); note 1 V10, 11, 12(p-p) input signal (peak-to-peak value) − 0.7 − V R10, 11, 12 AC input resistance 10.0 − − MΩ V10, 11, 12 internal bias during clamping − 5.1 − V I10, 11, 12 DC input current between clamping pulses − − 0.1 µA I10, 11, 12(clamp) maximum input current during clamping 100 180 260 µA 1997 Feb 06 18 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT RGB input 2 (R2: pin 2, G2: pin 3, B2: pin 4; capacitively coupled to a low-ohmic source; recommendation: maximum 600 Ω); note 1 V2, 3, 4(p-p) input signal (peak-to-peak value) − 0.7 − V R2, 3, 4 AC input resistance 10.0 − − MΩ V2, 3, 4 internal bias during clamping − 5.1 − V I2, 3, 4 DC input current between clamping pulses − − 0.1 µA I2, 3, 4(max)(clamp) maximum input current during clamping 100 180 260 µA Fast signal switches and blanking (fast signal switch 1 (pin 13); Y, CD / R1, G1, B1; control bits FSDIS1, FSON1) V13 voltage to select Y and CD − 0 0.4 V V13 voltage range to select R1, G1 and B1 0.9 1.0 5.5 V R13 internal resistor to ground 3.3 3.8 4.8 kΩ − − 10 ns CROSSTALK (SEE TABLE 5) ts − ti difference between transit times for signal switching and signal insertion Fast signal switch 2 (pin 1; Y, CD or R1, G1, B1 / R2, G2, B2; control bits FSDIS2, FSON2) V1 voltage to select Y and CD / R1, G1 and B1 − 0 0.4 V V1 voltage range to select R2, G2 and B2 0.9 1.0 5.5 V V1 required minimal voltage to switch off the ADBL measurement − 0.87 1.0 V R1 internal resistor to ground 2.8 4.2 6.0 kΩ − − 10 ns R1 > R13 CROSSTALK (SEE TABLE 5) ts − ti difference between transit times for signal switching and signal insertion Adjust stages (adaptive black, gamma, contrast, saturation, brightness and white point adjust, blue stretch) ADAPTIVE BLACK (DETECTORS INACTIVE STATUS DUE TO ACTION OF FAST SWITCH 2 (PIN 1); see Table 4, Fig.9 and note 2) I18(dch) discharge current of peak dark storage capacitor outside active measurement window −1.0 0.0 +1.0 µA inside active measurement window 1.5 2.5 3.5 µA I18(ch) charge current of peak dark storage capacitor −360 −300 −250 µA dbl(max) maximum level shift: ∆ black level in percent of nominal signal amplitude 10 13 16 % dbl(nom) difference between nominal black and adaptive black in percent of nominal signal amplitude −3 0 +3 % tdibb detectors inactive time before blanking 2.3 3.1 4.0 µs tdiab detectors inactive time after blanking 2.3 2.5 3.4 µs 1997 Feb 06 19 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT GAMMA ADJUST (ACTS ON INTERNAL Y SIGNAL; Y MATRIX SEE Y OUTPUT; I2C-BUS CONTROLLED POTENTIOMETER (SUBADDRESS 0BH); RESOLUTION 6 BIT; note 3) dg Gmax range of gamma minimum (3FH) − 0.7 − − maximum (00H) − 1.0 − − 5 6 7 dB maximum gain at minimum gamma near nominal black OUTPUT; I2C-BUS CONTROLLED POTENTIOMETERS SATURATION ADJUST (ACTS ON RGB SIGNALS; Y MATRIX SEE Y (SUBADDRESS 01H); RESOLUTION 1.5% OF MAXIMUM SATURATION) ds(max) maximum saturation I2C-bus data 3FH; measured at 100 kHz; relative to nominal saturation; note 4 4.7 5.2 5.8 dB ds(min) minimum saturation I2C-bus data 00H; measured at 100 kHz; relative to typical value of maximum saturation − − −50 dB CONTRAST ADJUST (ACTS ON RGB SIGNALS; I2C-BUS CONTROLLED POTENTIOMETERS (SUBADDRESS 02H); RESOLUTION 1.5% OF MAXIMUM CONTRAST) dc(max) maximum contrast I2C-bus data 3FH; limiters inactive; relative to nominal contrast; note 5 − 4.5 5.5 dB dc(min) minimum contrast I2C-bus data 00H; relative to maximum contrast −28 −22 −16 dB BRIGHTNESS ADJUST (ACTS ON RGB SIGNALS; I2C-BUS CONTROLLED POTENTIOMETERS (SUBADDRESS 00H); RESOLUTION 1.5% OF RANGE; ∆ BLACK LEVEL IN PERCENT OF NOMINAL SIGNAL AMPLITUDE REFERRED TO CUT-OFF MEASURING LEVEL) dbr(max) maximum brightness: ∆ black level I2C-bus data 3FH 23 30 37 % dbr(nom) nominal brightness: ∆ black level I2C-bus data 29H −7 0 +7 % dbr(min) minimum brightness: ∆ black level I2C-bus −58 −50 −42 % dbr(max) maximum brightness: ∆ black level I2C-bus data 3FH; control bits BCOF = 1 and MOD2 = 0 23 30 37 % dbr(min) minimum brightness: ∆ black level I2C-bus data 00H; control bits BCOF = 1 and MOD2 = 0 −58 −50 −42 % 20 25 % data 00H BLUE STRETCH (BLUE STRETCH IS ACTIVATED BY I2C-BUS CONTROL BIT BLST = 1; see Fig.9) Gbs 1997 Feb 06 increase of small signal gain 100% of nominal signal 15 amplitude and at 1 MHz 20 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT DIFFERENCES OF BLACK LEVEL STEPS (DIFFERENCES FROM CHANNEL TO CHANNEL OF THE RATIO OF THE DIFFERENCE (BLACK LEVEL CUT-OFF MEASUREMENT LEVEL) TO ACTUAL NOMINAL SIGNAL AMPLITUDE (VNOM24, VNOM22, VNOM20) OVER THE WHOLE CONTRAST, BRIGHTNESS AND SATURATION RANGE, SWITCHING MATRIX OR SWITCHING FAST SWITCHES, GAMMA = 1, BLST = 0, ADBL = 0) ∆V/Vnom static deviation note 6; ripple on pin 5 during clamping ≤1 mV; note 7 −1.0 − +1.0 % at nominal saturation −0.5 − +0.5 % RGB outputs (output for positive RGB signals (R: pin 24, G: pin 2, B: pin 20); following data without external load) R24, 22, 20 differential output resistance − 25 30 Ω I24, 22, 20(max) maximum output current 4.0 5.0 − mA V24, 22, 20(min) minimum output voltage note 8 − − 0.8 V V24, 22, 20(max) maximum output voltage RL ≥ 2 kΩ 6.3 7.0 − V V24, 22, 20(max)(p-p) maximum signal amplitude (black-white) due to internal limits (peak-to-peak value) 3.3 − − V V24, 22, 20(max)(p-p) nominal signal amplitude (black-white; peak-to-peak value) at nominal white adjust, contrast and saturation setting; gamma = 1; nominal input signals 1.7 2.0 2.3 V V24, 22, 20 cut-off measurement level note 8 1.0 − 5.0 V V24, 22, 20 recommended cut-off measurement level − 3.0 − V control bit BCOF = 1 2.3 2.5 2.7 V OUTPUT CLAMPING (RGB) V20, 22, 24 clamp voltage black level WHITE POTENTIOMETERS ∆Gv(inc)(max) maximum increase of AC gain I2C-bus data 3FH; relative to nominal setting; note 9 40 50 60 % ∆Gv(dec)(max) maximum decrease of AC gain I2C-bus data 00H; relative to nominal setting; note 9 40 50 60 % 1997 Feb 06 21 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT OVERALL WHITE POINT DEVIATION ∆V/Vnom input: (RGB)1, 2; −2.0 differences from channel to channel of the ratio of the difference (signal white level cut-off measurement level) to actual nominal signal amplitude (Vnom24, Vnom22, Vnom20) over the whole saturation range at nominal contrast, brightness and nominal input signals; ripple on pin 5 during clamping ≤1 mV; note 7 note 10 − +2.0 % − 3 dB Frequency behaviour BETWEEN THE Y INPUT (PIN 8) AND THE RGB OUTPUTS (PINS 24, 22 AND 20) ∆G decrease in gain 1 MΩ and 20 pF load at 13 MHz − BETWEEN THE COLOUR-DIFFERENCE INPUTS (PINS 7 AND 6) AND THE CORRESPONDING R AND B OUTPUTS (PINS 24 AND 20) ∆G decrease in gain at 13 MHz − − 3 dB BETWEEN THE (RGB)1, 2 INPUTS (PINS 10, 11 AND 12 OR 2, 3 AND 4) AND THE RGB OUTPUTS (PINS 24, 22 AND 20) ∆G decrease in gain at 22 MHz − − 3 dB V14 < 0.5 V −100 − − µA − − 10 pF Sandcastle input (pin 14; control bit SC5); note 11 I14 input current C14-9 input capacitance V14 required voltage range 1997 Feb 06 for horizontal and vertical blanking pulses SC5 = 0 or SC5 = 1 2.0 2.5 3.0 V for horizontal pulses (line count) SC5 = 0 4.0 4.5 4.9 V for burst key pulses SC5 = 0 6.1 − VP + 5.8 V for burst key pulses and line count SC5 = 1 4.0 − VP + 5.8 V 22 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT CLAMP PULSE DELAY Td(clamp) delay of leading edge of clamping pulse nominal sandcastle pulse DELOF = 0 1.2 1.5 1.8 µs DELOF = 1 − 0 − µs REQUIRED MINIMAL BURST GATE PULSE WIDTH tW DELOF = 0 line frequency: 16 kHz 3 − − µs DELOF = 1 line frequency: 32 kHz 1.5 − − µs no clipping; independent of white point adjust 25 35 45 % Generation of measurement lines and blanking; note 12 ∆V/Vnom ∆V = VCL − VUB difference between ultra black level (VUB) and measurement level (VCL) in percent of nominal signal amplitude WARM UP TEST PULSE DURING MT (see pulse diagram Fig.10) VWU warm up level VWU = VPL − 1 V; VPL = peak drive level (see also signal limiting); given by I2C-bus; subaddress 0AH; no warm up test pulse in the event of output clamping (BCOF = 1) − − − − VWU(max) maximum warm up level I2C-bus data 3FH; RELC = 0 6.3 6.6 6.9 V VWU(fixed) fixed warm up level RELC = 1 5.0 5.2 5.4 V RELC = 0 − VPL − V RELC = 1 − 5.7 − V THRESHOLD FOR POWER ON RESET (POR) DURING TIME DG (see pulse diagram Fig.10) V20, 22, 24(POR) output voltage to cause POR Y output (pin 26; note 13) V26(nom)(p-p) nominal signal amplitude (black-white; independent of gamma, adaptive black, saturation, contrast and brightness; peak-to-peak value) control bit YEXH = 1; hue DAC (subaddress 03H) set to >28H 0.85 1.0 1.15 V V26 black level YEXH = 1; I2C-bus data 3FH − 4.0 − V YEXH = 1; I2C-bus data 20H − 2.0 − V ar Y matrix coefficients Y = arR + agG + abB 0.27 0.30 0.33 ag Y matrix coefficients Y = arR + agG + abB 0.53 0.59 0.65 ab Y matrix coefficients Y = arR + agG + abB 0.10 0.11 0.12 1997 Feb 06 23 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER R26 differential output resistance ∆τ26 group delay time fg 3 dB bandwidth CONDITIONS between RGB outputs and Y output MIN. TYP. MAX. UNIT − 190 230 Ω 20 25 30 ns 11 15 − MHz − − VP − 1.4 V 2.4 2.7 3.0 V Automatic cut-off control (pin 19; measurement periods see beam info on pin 19) V19 permissible voltage (also during scanning period) VREF0 internally controlled voltage on pin 19 Io19(max) maximum output current −350 − −250 µA Ii19(max) maximum input current 250 − 350 µA R19 input resistance for measurement input 1 − − MΩ I19 additional input current − 0.5 − mA V19 threshold of warm up detector (active in line MG) 4.3 4.5 4.7 V VMEAS difference between input voltage for cut-off and VREF0; adjustable via I2C-bus (subaddress for reference: R: 07H, G: 08H and B: 09H) − − − − during leakage measurement time LM only during warm up maximum VMEAS I2C-bus data 3FH 1.45 1.6 1.75 V nominal VMEAS I2C-bus data 20H 0.9 1.0 1.1 V minimum VMEAS I2C-bus data 00H 0.4 0.45 0.5 V Storage of cut-off control voltage / output clamping voltage (pins 25, 23 and 21) I25, 23, 21 input currents of storage inputs outside of the measurement time − − 0.1 µA I25, 23, 21(max) maximum charge / discharge current during measurement time 0.2 0.3 0.4 mA Gstg gain from storage pins 25, 23 and 21 to outputs − 1.7 − − 300 400 − µA Storage of leakage information (pin 17) I17 maximum charge / discharge current at time LM I17 discharge current peak limiting during time − MK active 4 − mA I17 leakage current outside time LM − − 0.1 µA V17 voltage to reset IC to switch on conditions V17 is below 2.3 2.5 3.0 V 1997 Feb 06 24 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Signal limiting (the limitation acts on contrast and at low contrast on brightness) AVERAGE BEAM CURRENT LIMITING (PIN 15) V15 start of contrast reduction − 4 − V ∆V15 input range for full contrast reduction − −2 − V V15 start of brightness reduction − 2.5 − V ∆V15 input range for full brightness reduction − −1.6 − V I15 input current − − −0.5 µA PEAK SIGNAL LIMITING OF OUTPUT SIGNALS (PIN 16; THE LIMITATION ACTS 1H DELAYED; LIMITING LEVEL ADJUSTABLE BY I2C-BUS (SUBADDRESS 0AH; CONTROL BIT RELC = 0)) maximum limiting level extrapolated from 2FH V24, 22, 20(min) minimum limiting level I2C-bus I16(max) maximum discharge current at peak drive RELC = 0 V24, 22, 20(max) data 00H 6.8 − 7.2 V − 2.3 3 V 4 − 6 mA PEAK SIGNAL LIMITING (PIN 16; CONTROL BIT RELC = 1; LIMITING LEVEL (VLIL) ADJUSTABLE BY I2C-BUS (SUBADDRESS 0AH)) equal gain in white point adjust; signal only in one output channel; peak drive limiting starts, if the maximum of the RGB signals after white point adjustment exceeds a threshold VLiL maximum limiting level I2C-bus data 3FH 3.2 3.5 4.0 V minimum limiting level I2C-bus 1.2 1.5 1.8 V data 00H DISCHARGE CURRENTS (CUT-OFF MEASUREMENT LEVEL MX = MR OR MB OR MG) total discharge current I16 = I16(1) + I16(2) + I16(3) − − − − I16(1)(max)(dch) maximum discharge current TH1 = MX + VLiL; 1 line delayed and low-pass filtered 4.5 6 7.5 mA S steepness − 15 − mA/V I16(tot)(dch) Threshold 1 (TH1) Low-pass filter, control bit TCPL tDPDL time constant low-pass filter TCPL = 1 (at 1fH); RELC = 1 0.9 1.2 1.5 µs tDPDL time constant low-pass filter TCPL = 0 (at 2fH); RELC = 1 0.4 0.6 0.8 µs I16(2)(max)(dch) maximum discharge current TH2 = MX + VLiL × 1.10; 4.5 1 line delayed 6 7.5 mA S steepness 15 − mA/V Threshold 2 (TH2) 1997 Feb 06 − 25 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust SYMBOL TDA4780 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Threshold 3 (TH3) I16(3)(max)(dch) maximum discharge current S TH3 = MX + VLiL; undelayed 0.45 0.6 0.75 mA steepness − 1.5 − mA/V I16 charge current −2 −1 −0.5 µA V16 start of contrast reduction − 4 − V CHARGE CURRENT ∆V16 input range for full contrast reduction − −2 − V V16 start of brightness reduction − 2.5 − V ∆V16 input range for full brightness reduction − −1.6 − V V16(max) maximum voltage by internal limitation 4.5 − − V Hue adjust output (pin 26); note 14 Vo26(min) minimum output voltage YEXH = 0; I2C-bus data 00H 0.5 − 1.0 V Vo26(nom) nominal output voltage YEXH = 0; I2C-bus data 20H 3.0 3.2 3.4 V Vo26(max) maximum output voltage YEXH = 0; I2C-bus data 3FH 4.8 − 5.6 V I26 current of internal emitter follower 500 700 − µA f28 clock frequency range 0 − 100 kHz tSU;DAT data set-up time 250 − − ns tH clock pulse HIGH 4 − − µs tL clock pulse LOW 4.7 − − µs tr rise time − − 1 µs tf fall time − − 0.3 µs I2C-bus inputs Input levels (pins 27 and 28) VIL LOW level input voltage − − 1.5 V VIH HIGH level input voltage 3.0 − 5.5 V II input current V27 and V28 = 0.4 V −10 − − µA V27 and V28 = 0.9VP − − 10 µA − − 0.4 V V27 = 0.4 V 3.0 − − mA Output level (pin 27) VOL LOW level output voltage IO output current 1997 Feb 06 26 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 Notes to the characteristics 1. RGB signals controlled by saturation, adaptive black, contrast and brightness. Gamma affects the Y component of the internal RGB signals. 2. Adaptive black control acts on Y signal, which is either Y input or Y output from RGB matrix. Negative set-up is not affected. The level shift value is determined by the peak dark detector, operation selected by control bit ADBL. The peak dark detector is inactive during blanking. Peak dark detector activated by internal line counter, which starts after the end of the vertical blank of the sandcastle. Active from line 16 (after end of vertical sandcastle) to line 224 (NTSC mode, NMEN = 1) or line 272 (PAL mode, NMEN = 0). It is recommended to increase the contrast value (subaddress 02H) by 15% if ADBL = 1. The line numbers are doubled if control bit HDTV = 1. 3. At minimum gamma (3FH) any differences in black level steps are amplified by 6 dB. 4. For nominal saturation the range of values is: a) 1FH is the minimum value that can be used b) 20H is the typical value that can be used c) 21H is the maximum value that can be used. 5. For nominal contrast the range of values is: a) 20H is the minimum value that can be used b) 22H is the typical value that can be used c) 24H is the maximum value that can be used. 6. ∆V 24 ∆V 22 ∆V 20 ∆V 20 ∆V 24 ∆V 22 ∆V ------------- = ------------------- – ------------------- = ------------------- – ------------------- = ------------------- – ------------------- . For meaning of actual nominal signal see V nom V nom24 V nom22 V nom24 V nom20 V nom22 V nom20 chapter “Characteristics”. 7. Series resistor in supply voltage should be less than 0.3 Ω. 8. At 1.0 V cut-off measurement level the function of the cut-off control loop is not guaranteed because the blanking level is limited to the minimum output voltage. For proper working a guide number for the minimum cut-off measurement level is 1.3 V. 9. For nominal AC gain settings the range of values is: a) 21H is the minimum value that can be used b) 22H is the typical value that can be used c) 23H is the maximum value that can be used. ∆V 24 ∆V 22 ∆V 20 ∆V 20 ∆V 24 ∆V 22 ∆V 10. ------------- = ------------------- – ------------------- = ------------------- – ------------------- = ------------------- – ------------------- . For meaning of actual nominal signal see V nom24 V nom22 V nom24 V nom20 V nom22 V nom20 V nom chapter “Characteristics”. 11. Sandcastle pulse detector (pin 14) The sandcastle pulse is compared with 3 (control bit SC5 = 0) or 2 (SC5 = 1) internal threshold levels to separate the various pulses; the internal pulses are generated while the input is higher than the thresholds. The thresholds are independent of supply voltage and temperature. 1997 Feb 06 27 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 12. Blanking to ultra black level occurs during time DG except MR in R-channel, MG in G-channel, MB in B-channel (see Fig.10). a) Leakage current measuring time: LM will start after the end of vertical sandcastle (see Fig.10). b) Vertical blanking period and cut-off measurement lines (see Fig.10): The vertical component will be identified if it contains 2 or more burst key pulses in the event of SC5 = 1 or two or more line pulses (H) in the event of SC5 = 0. The line counter is triggered by the leading edge. The blanking time is valid for a vertical pulse detected by the sandcastle decoder. The internal blank pulse is OR gated with the sandcastle vertical pulse and the end of the measurement pulses. c) Insertion time: full line period. d) Measurement time: line period minus horizontal period (50/60 Hz). e) Line sequence of measuring lines (see Fig.10): First line after end of horizontal pulse which followed the end of vertical pulse: leakage measurement LM First line after leakage measurement pulse: red measurement MR Second line after leakage measurement pulse: green measurement MG Third line after leakage measurement pulse: blue measurement MB. 13. Y output can be switched to hue adjust output via I2C-bus control bit YEXH. Output without sync pulse. Recommendation: Hue adjust DAC set to 3FH. Black level adjustable via hue adjust DAC. 14. Output can be switched to Y output via I2C-bus control bit YEXH (via I2C-bus, resolution 6-bit, bus subaddress 03H). 1997 Feb 06 28 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 INTERNAL PIN CONFIGURATIONS Abbreviations: OB: Open Base and CL: Clamp Pulse. PIN 1 PIN NAME (DESCRIPTION) WAVE FORM I or Z INTERNAL CIRCUIT fast switch 2 input + 0.1 mA 1 4.2 kΩ + ESD protection 1 MGE883 2 100 µA/OB red input 2 colour bars CL 2 5V black CL MGE884 + 0.5 µA ESD protection 2 MGE885 3 100 µA/OB green input 2 colour bars CL 3 5V black CL MGE886 + 0.5 µA ESD protection 3 MGE887 1997 Feb 06 29 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 4 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z INTERNAL CIRCUIT 100 µA/OB blue input 2 colour bars CL 4 5V black CL MGE888 + 0.5 µA ESD protection 4 MGE889 5 supply voltage 5 ESD protection + VP 5 MGE890 6 100 µA/OB colour difference input −(B − Y) colour bars 4V CL 6 CL MGE891 + 0.5 µA ESD protection 6 MGE892 1997 Feb 06 30 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 7 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z INTERNAL CIRCUIT 100 µA/OB colour difference input −(R − Y) 4V CL 7 colour bars CL MGE893 + 0.5 µA ESD protection 7 MGE894 8 100 µA/OB luminance input CL 5V black 8 colour bars CL MGE895 + 0.5 µA ESD protection 8 MGE896 9 ground 9 GND MGE897 no ESD protection circuit for ground pin 1997 Feb 06 31 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 10 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z INTERNAL CIRCUIT 100 µA/OB red input 1 colour bars CL 10 5V black CL MGE898 + 0.5 µA ESD protection 10 MGE899 11 100 µA/OB green input 1 colour bars CL 11 5V black CL MGE900 + 0.5 µA ESD protection 11 MGE901 12 100 µA/OB blue input 1 colour bars CL 12 5V black CL MGE902 + 0.5 µA ESD protection 12 MGE903 1997 Feb 06 32 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN PIN NAME (DESCRIPTION) 13 fast switch 1 input TDA4780 WAVE FORM I or Z INTERNAL CIRCUIT + 0.2 mA 13 3.8 kΩ + ESD protection 13 MGE904 14 sandcastle pulse input 37 kΩ (SC5 = 0) 3-level sandcastle 120 µA 1 kΩ 5.5 V CL 14 3.5 V H V + + 50 µA 14 kΩ 1.5 V 1 kΩ MGE905 23 kΩ OB (SC5 = 1) 2-level sandcastle CL HV + SC5=1 3.5 V ESD protection 1.5 V 14 MGE906 MGE907 15 average beam current limiting input OB + 30 µA 2 kΩ 15 + 15 ESD protection MGE908 1997 Feb 06 33 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 16 PIN NAME (DESCRIPTION) storage capacitor for peak limiting TDA4780 WAVE FORM I or Z outside peak drive OB during peak drive (RELC = 1) 0 to 12 mA during peak drive (RELC = 0) 5 mA INTERNAL CIRCUIT + 30 µA 2 kΩ 16 4.2 V 0 to 12 mA peak drive detection + ESD protection 16 MGE909 17 storage capacitor for leakage current compensation outside leakage current measurement OB during leakage current measurement −400 µA to +400 µA automatic switch to power on reset 4 mA + 12 µA 2.5 V LM 17 4 mA + switch to power on reset 17 ESD protection MGE910 1997 Feb 06 34 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 18 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z storage capacitor for peak dark INTERNAL CIRCUIT OB/0.26 mA + 0.26 mA closed switch if peak dark detected 18 2 kΩ closed switch during active measurement window 63 µA 2 µA + ESD protection 18 MGE911 19 −300 µA to +300 µA cut-off measurement input + 60 µA 3.7 V 2.7 V MR MG MB LM 19 preclamp MGE912 preclamp 3.15 V to 4.3 V 0.5 mA + warm up finished 19 ESD protection MGE913 1997 Feb 06 35 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 20 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z blue output INTERNAL CIRCUIT 5 mA BCOF = 0 1st line sawtooth signal 20 cut-off measurement pulse brightness 5 mA + ultra black ESD protection MGE914 5 mA 20 MGE917 BCOF = 1 MOD2 = 0 brightness 2.5 V MGE915 5 mA BCOF = 1 MOD2 = 1 2.5 V MGE916 21 blue cut-off storage capacitor during cut-off control or during output clamping OB −300 µA to +300 µA 2.5 V 21 5 kΩ + ESD protection 21 MGE918 1997 Feb 06 36 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 22 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z green output INTERNAL CIRCUIT 5 mA BCOF = 0 1st line sawtooth signal 22 cut-off measurement pulse brightness 5 mA + ultra black ESD protection MGE919 5 mA 22 MGE922 BCOF = 1 MOD2 = 0 brightness 2.5 V MGE920 5 mA BCOF = 1 MOD2 = 1 2.5 V MGE921 23 green cut-off storage capacitor during cut-off control or during output clamping OB −300 µA to +300 µA 2.5 V 23 5 kΩ + ESD protection 23 MGE923 1997 Feb 06 37 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 24 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z red output INTERNAL CIRCUIT 5 mA BCOF = 0 1st line sawtooth signal cut-off measurement pulse brightness 24 5 mA + ultra black MGE924 5 mA ESD protection BCOF = 1 MOD2 = 0 24 MGE927 brightness 2.5 V MGE925 5 mA BCOF = 1 MOD2 = 1 2.5 V MGE926 25 red cut-off storage capacitor during cut-off control or during output clamping OB −300 µA to +300 µA 2.5 V 25 5 kΩ + ESD protection 25 MGE928 1997 Feb 06 38 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust PIN 26 PIN NAME (DESCRIPTION) TDA4780 WAVE FORM I or Z Y output/hue adjust output INTERNAL CIRCUIT 0.7 mA YEXH = 1 26 0.7 mA colour bars MGE929 YEXH = 0; DC 0.8 V to 5.0 V + 0.7 mA ESD protection 26 MGE930 27 I2C-bus serial data input/acknowledge output outside acknowledge OB during acknowledge less than 0.1 V up to 4 mA due to external pull-up resistor + 10 µA 2 kΩ 27 acknowledge 27 ESD protection MGE931 28 I2C-bus serial clock input OB + 10 µA 2 kΩ 28 28 ESD protection MGE932 1997 Feb 06 39 1997 Feb 06 40 75 Ω 22 µH 75 Ω 75 Ω 220 µF 75 Ω 75 Ω (1) Insert link BR1 if average beam current is not applied. (2) R18 may be omitted. 75 Ω 75 Ω −(R − Y) 10 nF 3.9 kΩ 3.9 kΩ 10 nF 10 nF 10 nF 14 13 12 11 10 9 8 7 6 5 4 3 BR1(1) 1N4148 1N4148 TDA4780 15 16 17 18 19 20 21 22 23 24 25 26 27 28 10 kΩ BCL CPDL CL 100 Ω 100 Ω 22 µF MGE882 1 µF 330 nF 1 µF 220 nF 220 nF 220 nF CPDST CI BO CB GO CG RO CR YHUE SDA SCL Fig.12 Test and application circuit. SC FSW1 B1 G1 R1 GND Y −(B − Y) 10 nF 47 nF VP B2 10 nF 10 nF G2 10 nF 2 1 R18 (2) 1 MΩ 82 kΩ BZX79 C6V2 10 9 8 7 6 5 4 3 2 1 CON2 CI BO GO RO GND +12 V 200 V RGB video processor with automatic cut-off control and gamma adjust beam current information VP = 8 V SC FSW1 B1 G1 R1 75 Ω R2 10 nF FSW2 dbook, full pagewidth Y −(R − Y) −(B − Y) B2 G2 R2 FSW2 SCL SDA YHUE Philips Semiconductors Preliminary specification TDA4780 TEST AND APPLICATION INFORMATION Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 PACKAGE OUTLINE seating plane handbook, full pagewidthdual in-line package; 28 leads (600 mil) DIP28: plastic SOT117-1 ME D A2 L A A1 c e Z w M b1 (e 1) b MH 15 28 pin 1 index E 1 14 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 5.1 0.51 4.0 1.7 1.3 0.53 0.38 0.32 0.23 36.0 35.0 14.1 13.7 2.54 15.24 3.9 3.4 15.80 15.24 17.15 15.90 0.25 1.7 inches 0.20 0.020 0.16 0.066 0.051 0.020 0.014 0.013 0.009 1.41 1.34 0.56 0.54 0.10 0.60 0.15 0.13 0.62 0.60 0.68 0.63 0.01 0.067 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT117-1 051G05 MO-015AH 1997 Feb 06 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-01-14 41 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. 1997 Feb 06 42 Philips Semiconductors Preliminary specification RGB video processor with automatic cut-off control and gamma adjust TDA4780 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1997 Feb 06 43 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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No. 5, 80640 GÜLTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com © Philips Electronics N.V. 1997 SCA53 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547047/1200/02/pp44 Date of release: 1997 Feb 06 Document order number: 9397 750 01716