INTEGRATED CIRCUITS TDA3566A PAL/NTSC decoder Product specification Supersedes data of March 1991 File under Integrated Circuits, IC02 Philips Semiconductors February 1994 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A FEATURES APPLICATIONS • A black-current stabilizer which controls the black-currents of the three electron-guns to a level low enough to omit the black-level adjustment • Teletext/broadcast antiope • Contrast control of inserted RGB signals The TDA3566A is a decoder for the PAL and/or NTSC colour television standards. It combines all functions required for the identification and demodulation of PAL/NTSC signals. Furthermore it contains a luminance amplifier, an RGB-matrix and amplifier. These amplifiers supply output signals up to 4 V peak-to-peak (picture information) enabling direct drive of the discrete output stages. The circuit also contains separate inputs for data insertion, analog and digital, which can be used for text display systems. • Channel number display. GENERAL DESCRIPTION • No black-level disturbance when non-synchronized external RGB signals are available on the inputs • NTSC capability with hue control. QUICK REFERENCE DATA All voltages referenced to ground. SYMBOL PARAMETER MIN. TYP. MAX. UNIT Supply VP supply voltage (pin 1) − 12 − V IP supply current (pin 1) − 90 − mA Luminance amplifier (pin 8) V8(p-p) input voltage (peak-to-peak value) − 450 − mV CON contrast control − 16.5 − dB Chrominance amplifier (pin 4) V4(p-p) input voltage (peak-to-peak value) 40 − 1100 mV SAT saturation control − 50 − dB output voltage at nominal luminance and contrast (peak-to-peak value) − 3.8 − V input signals (peak-to-peak value) − 1 − V 0.9 − − V RGB matrix and amplifiers V13, 15, 17(p-p) Data insertion V12, 14, 16(p-p) Data blanking (pin 9) V9 input voltage for data insertion Sandcastle input (pin 7) V7 blanking input voltage − 1.5 − V V7 burst gating and clamping input voltage − 7 − V ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER PINS PIN POSITION MATERIAL CODE TDA3566A 28 DIL plastic SOT117 February 1994 2 February 1994 3 2 3 4 5 8 CLAMPED DETECTOR PEAK DETECTOR CONTROLLED CHROMINANCE AMPLIFIER LIN/LOG CONVERTER (4L) 7 H BURST GATING H/2 DETECTOR (R Y) (B Y) REFERENCE SWITCH PAL/NTSC MODE SWITCH IDENTIFICATION 12 V PHASE 22 25 1 24 26 9 TDA3566A 7.16 MHz crystal (PAL/NTSC) blanking (BL1) DELAYED SWITCH-ON clamp pulse (L1) clamp pulse (L1) clamp pulse (L2) clamp pulse (L3) blanking (BL3) BUFFER & BLANKING BLACK LEVEL CLAMPING AMPLIFIER blanking (BL1) (L0) LEAKAGE CURRENT CLAMPING isolation pulse (4L) BRIGHTNESS 11 brightness CONTRAST BRIGHTNESS LIN/LOG CONVERTOR 6 8.8 MHz crystal (PAL) DATA SWITCH STAGE 16 BLUE data insertion contrast blanking B MATRIX 8.8 MHz OSCILLATOR 2 90 o SHIFT (R Y) DEMODULATOR (G Y) MATRIX (B Y) DEMODULATOR 27 12 V Fig.1 Block diagram. GATED BURST DETECTOR 23 PAL SWITCH PAL FLIP-FLOP BUFFER I2 L LOGIC & BUFFER STAGES BLANKING V GATED CHROMINANCE AMPLIFIER H SANDCASTLE DETECTOR AMPLIFIER KILLER DETECTOR GATED SATURATION CONTROL BLACK LEVEL REFERENCE BLACK LEVEL INSERTION BLACK LEVEL CLAMPING AMPLIFIER 28 DELAY LINE MGA819 10 13 12 21 15 14 18 19 20 17 black current information (M) RED output RED insertion GREEN output GREEN insertion BLUE output PAL/NTSC decoder For explanation of pulse mnemonics see Fig. 7. chrominance input saturation luminance input sandcastle pulse Philips Semiconductors Product specification TDA3566A Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A PINNING SYMBOL PIN DESCRIPTION VP 1 supply voltage IDDET 2 identification detection level ACCDET 3 Automatic Chrominance Control detection level CHRIN 4 chrominance control input SAT 5 saturation control input CON 6 contrast control input SC 7 sandcastle input LUM 8 luminance control input DBL 9 data blanking input VP 1 28 CHR OUT IDDET 2 27 GND ACCDET 3 26 OSC CHR IN 4 25 RCEXT SAT 5 24 RCEXT CON 6 23 R Y SC 7 BCLR 10 black clamp level for RED output BRI 11 brightness input RIN 12 RED input ROUT 13 RED output GIN 14 GREEN input LUM 8 21 BCL G GOUT 15 GREEN output DBL 9 20 BCLB BIN 16 BLUE input BOUT 17 BLUE output BLA 18 black current input BCL 19 black clamp level; referenced to black level BCLB 20 black clamp level for BLUE output BCLG 21 black clamp level for GREEN output B−Y 22 demodulator input (BLUE) R−Y 23 demodulator input (RED) RCEXT 24 gated burst detector load network RCEXT 25 gated burst detector load network OSC 26 oscillator frequency input GND 27 ground CHROUT 28 chrominance signal output February 1994 22 B Y TDA3566A BCL R 10 19 BCL 11 18 BLA R IN 12 17 B OUT R OUT 13 16 B IN G IN 14 15 G OUT BRI MLA407 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification PAL/NTSC decoder FUNCTIONAL DESCRIPTION The TDA3566A is a further development of the TDA3562A. It has the same pinning and nearly the same application. The differences between the TDA3562A and the TDA3566A are as follows: • The NTSC-application has largely been simplified. In the event of NTSC the chrominance signal is now internally coupled to the demodulators, automatic chrominance control (ACC) and phase detectors. The chrominance output signal (pin 28) is thus suppressed. It follows that the external switches and filters which are required for the TDA3562A are not required for the TDA3566A. There is no difference between the amplitudes of the colour output signals in the PAL or NTSC mode. • The clamp capacitor at pins 10, 20 and 21 in the black-level stabilization loop can be reduced to 100 nF provided the stability of the loop is maintained. Loop stability depends on complete application. The clamp capacitors receive a pre-bias voltage to avoid coloured background during switch-on. • The crystal oscillator circuit has been changed to prevent parasitic oscillations on the third overtone of the crystal. Consequently the optimum tuning capacitance must be reduced to 10 pF. • The hue control has been improved (linear). Luminance amplifier The luminance amplifier is voltage driven and requires an input signal of 450 mV peak-to-peak (positive video). The luminance delay line must be connected between the IF amplifier and the decoder. The input signal is AC coupled to the input (pin 8). After amplification, the black level at the output of the February 1994 TDA3566A preamplifier is clamped to a fixed DC level by the black level clamping circuit. During three line periods after vertical blanking, the luminance signal is blanked out and the black level reference voltage is inserted by a switching circuit. are fed to the burst phase detector. In the event of NTSC the chrominance signal is internally coupled to the demodulators, ACC and phase detectors. This black level reference voltage is controlled via pin11 (brightness). At the same time the RGB signals are clamped. Noise and residual signals have no influence during clamping thus simple internal clamping circuitry is used. The burst phase detector is gated with the narrow part of the sandcastle pulse (pin 7). In the detector the (R−Y) and (B−Y) signals are added to provide the composite burst signal again. Chrominance amplifiers The chrominance amplifier has an asymmetrical input. The input signal must be AC coupled (pin 4) and have a minimum amplitude of 40 mV peak-to-peak. The gain control stage has a control range in excess of 30 dB, the maximum input signal must not exceed 1.1 V peak-to-peak, otherwise clipping of the input signal will occur. From the gain control stage the chrominance signal is fed to the saturation control stage. Saturation is linearly controlled via pin 5. The control voltage range is 2 to 4 V, the input impedance is high and the saturation control range is in excess of 50 dB. The burst signal is not affected by saturation control. The signal is then fed to a gated amplifier which has a 12 dB higher gain during the chrominance signal. As a result the signal at the output (pin 28) has a burst-to-chrominance ratio which is 6 dB lower than that of the input signal when the saturation control is set at −6 dB. The chrominance output signal is fed to the delay line and, after matrixing, is applied to the demodulator input pins (pins 22 and 23). These signals 5 Oscillator and identification circuit This composite signal is compared with the oscillator signal divided-by-2 (R−Y) reference signal. The control voltage is available at pins 24 and 25, and is also applied to the 8.8 MHz oscillator. The 4.4 MHz signal is obtained via the divide-by-2 circuit, which generates both the (B−Y) and (R−Y) reference signals and provides a 90° phase shift between them. The flip-flop is driven by pulses obtained from the sandcastle detector. For the identification of the phase at PAL mode, the (R−Y) reference signal coming from the PAL switch, is compared to the vertical signal (R−Y) of the PAL delay line. This is carried out in the H/2 detector, which is gated during burst. When the phase is incorrect, the flip-flop gets a reset from the identification circuit. When the phase is correct, the output voltage of the H/2 detector is directly related to the burst amplitude so that this voltage can be used for the ACC. To avoid 'blooming-up' of the picture under weak input signal conditions the ACC voltage is generated by peak detection of the H/2 detector output signal. The killer and identification circuits receive their information from a gated output signal of H/2 detector. Killing is obtained via the saturation control stage and the demodulators to obtain good suppression. Philips Semiconductors Product specification PAL/NTSC decoder The time constant of the saturation control (pin 5) provides a delayed switch-on after killing. Adjustment of the oscillator is achieved by variation of the burst phase detector load resistance between pins 24 and 25 (see Fig.8). With this application the trimmer capacitor in series with the 8.8 MHz crystal (pin 26) can be replaced by a fixed value capacitor to compensate for unbalance of the phase detector. Demodulator The (R−Y) and (B−Y) demodulators are driven by the colour difference signals from the delay-line matrix circuit and the reference signals from the 8.8 MHz divider circuit. The (R−Y) reference signal is fed via the PAL-switch. The output signals are fed to the R and B matrix circuits and to the (G−Y) matrix to provide the (G−Y) signal which is applied to the G-matrix. The demodulation circuits are killed and blanked by by-passing the input signals. NTSC mode The NTSC mode is switched on when the voltage at the burst phase detector outputs (pins 24 and 25) is adjusted below 9 V. To ensure reliable application the phase detector load resistors are external. When the TDA3566A is used only for PAL these two 33 kΩ resistors must be connected to +12 V (see Fig.8). For PAL/NTSC application the value of each resistor must be reduced to 20 kΩ (with a tolerance of 1%) and connected to the slider of a potentiometer (see Fig.9). The switching transistor brings the voltage at pins 24 and 25 below 9 V which switches the circuit tot the NTSC mode. February 1994 TDA3566A The position of the PAL flip-flop ensures that the correct phase of the (R−Y) reference signal is supplied to the (R−Y) demodulator. The drive to the H/2 detector is now provided by the (B−Y) reference signal. In the PAL mode it is driven by the (R−Y) reference signal. Hue control is realized by changing the phase of the reference drive to the burst phase detector. This is achieved by varying the voltage at pins 24 and 25 between 7.0 V and 8.5 V, nominal position 7.65 V. The hue control characteristic is shown in Fig.6. RGB matrix and amplifiers The three matrix and amplifier circuits are identical and only one circuit will be described. The luminance and the colour difference signals are added in the matrix circuit to obtain the colour signal, which is then fed to the contrast control stage. The contrast control voltage is supplied to pin 6 (high-input impedance). The control range is +5 dB to −11.5 dB nominal. The relationship between the control voltage and the gain is linear (see Fig.3). During the 3-line period after blanking a pulse is inserted at the output of the contrast control stage. The amplitude of this pulse is varied by a control voltage at pin 11. This applies a variable offset to the normal black level, thus providing brightness control. The brightness control range is 1 V to 3.6 V. While this offset level is present, the black-current input impedance (pin 18) is high and the internal clamp circuit is activated. The clamp circuit then compares the 6 reference voltage at pin 19 with the voltage developed across the external resistor network RA and RB (pin 18) which is provided by picture tube beam current. The output of the comparator is stored in capacitors connected from pins 10, 20 and 21 to ground which controls the black level at the output. The reference voltage is composed by the resistor divider network and the leakage current of the picture tube into this bleeder. During vertical blanking, this voltage is stored in the capacitor connected to pin 19, which ensures that the leakage current of the CRT does not influence the black current measurement. The RGB output signals can never exceed a level of 10.6 V. When the signal tends to exceed this level the output signal is clipped. The black level at the outputs (pins 13, 15 and 17) will be approximately 3 V. This level depends on the spread of the guns of the picture tube. If a beam current stabilizer is not used it is possible to stabilize the black levels at the outputs, which in this application must be connected to the black current measuring input (pin 18) via a resistor network. Philips Semiconductors Product specification PAL/NTSC decoder Data insertion Each colour amplifier has a separate input for data insertion. A 1 V peak-to-peak input signal provides a 3.8 V peak-to-peak output signal. To avoid the black-level of the inserted signal differing from the black level of the normal video signal, the data is clamped to the black level of the luminance signal. Therefore AC coupling is required for the data inputs. To avoid a disturbance of the blanking level due to the clamping circuit, the source impedance of the driver circuit must not exceed 150 Ω. The data insertion circuit is activated by the data blanking input (pin 9). When the TDA3566A voltage at this pin exceeds a level of 0.9 V, the RGB matrix circuits are switched off and the data amplifiers are switched on. To avoid coloured edges, the data blanking switching time is short. The amplitude of the data output signals is controlled by the contrast control at pin 6. The black level is equal to the video black level and can be varied between 2 and 4 V (nominal condition) by the brightness control voltage at pin 11. Blanking of RGB and data signals Both the RGB and data signals can be blanked via the sandcastle input (pin 7). A slicing level of 1.5 V is used for this blanking function, so that the wide part of the sandcastle pulse is separated from the remainder of the pulse. During blanking a level of +1 V is available at the output. To prevent parasitic oscillations on the third overtone of the crystal the optimum tuning capacitance should be 10 pF. Non-synchronized data signals do not disturb the black level of the internal signals. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VP supply voltage (pin 1) − 13.2 V Ptot total power dissipation − 1700 mW Tamb operating ambient temperature −25 +70 °C Tstg storage temperature −25 +150 °C THERMAL RESISTANCE SYMBOL Rth j-a February 1994 PARAMETER from junction to ambient in free air THERMAL RESISTANCE 40 K/W 7 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A CHARACTERISTICS VP = 12 V; Tamb = 25 °C; all voltages are referenced to pin 27; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage 10.8 12.0 13.2 V IP supply current − 90 120 mA Ptot total power dissipation − 1.1 1.6 W − 0.45 0.63 V Luminance input (pin 8) V8(p-p) input voltage (peak-to-peak value) V8 input voltage level before clipping occurs in the input stage − − 1.4 V I8 input current − 0.1 1 µA −11.5 − +5 dB − − 15 µA 40 390 1100 mV contrast control range I6 note 1 see Fig.3 input current contrast control Chrominance amplifier V4(p-p) input signal amplitude (peak-to-peak value) note 2 Z4 input impedance − 10 − kΩ C4 input capacitance − − 6.5 pF ACC control range 30 − − dB ∆V change of the burst signal at the output control range 100 mV to 1 V (p-p) − − 1 dB G amplification at nominal saturation (pin 4 to pin 28) note 3 34 − − dB − 7 − dB 4 5 − V chrominance to burst ratio at nominal saturation V28(p-p) maximum output voltage range (peak-to-peak value) d distortion of chrominance amplifier at 2 V (p-p) output signal up to an input signal of 1 V (p-p) − − 5 % α28-4 frequency response between 0 and 5 MHz − − −2 dB 50 − − dB − − 20 µA saturation control range I5 RL = 2 kΩ see Fig.4 input current saturation control cross-coupling between luminance and chrominance amplifier note 4 − − −46 dB S/N signal-to-noise ratio at nominal input signal note 5 56 − − dB ∆ϕ phase shift burst with respect to chrominance at nominal saturation − − ±5 deg Z 28 output impedance of chrominance amplifier − 10 − Ω February 1994 8 Philips Semiconductors Product specification PAL/NTSC decoder SYMBOL I28 PARAMETER TDA3566A CONDITIONS output current MIN. TYP. MAX. UNIT − − 15 mA Reference part ∆f phase-locked loop catching range note 6 500 − − Hz ∆ϕ phase shift for 400 Hz deviation of the oscillator frequency note 6 − − 5 deg TCosc oscillator temperature coefficient with respect to oscillator frequency note 6 − −2 −3 Hz/K ∆fosc frequency deviation when supply voltage increases from 10 to 13.2 V note 6 − 40 100 Hz R26 input resistance 280 400 520 Ω C26 input capacitance − − 10 pF ACC generation (pin 2; note )7 V2 control voltage at nominal input signal − 4.5 − V V2 control voltage without chrominance input − 2 − V ∆V2 colour-on/off voltage 175 300 425 mV V2 colour-on voltage 3.1 3.5 3.9 V ∆V2 colour-on identification voltage 1.2 1.5 1.8 V change in burst amplitude with temperature − 0.1 0.25 %/K voltage at pin 3 at nominal input signal − 4.7 − V 45 63 81 mV 1.0 1.3 kΩ 1.78 ± 10% − V3 Demodulator part V23(p-p) amplitude of burst signal (peak-to-peak value) between pins 23 and 27 note 8 |Z22, 23| input impedance between pins 22 or 23 and 27 0.7 RATIO OF DEMODULATED SIGNALS FOR EQUIVALENT INPUT SIGNALS AT PINS 22 AND 23 V 17 --------V 13 (B−Y)/(R−Y) − V 15 --------V 13 (G−Y)/(R−Y) no (B−Y) signal − −0.51 ± 10% − V 15 --------V 17 (G−Y)/(B−Y) no (R−Y) signal − −0.19 ± 25% − α17 frequency response between 0 and 1 MHz − − −3 dB αcr cross-talk between colour difference signals 40 − − dB ∆ϕ phase difference between (R−Y) and (B−Y) reference signals 85 90 95 deg February 1994 9 Philips Semiconductors Product specification PAL/NTSC decoder SYMBOL ∆ϕtot PARAMETER TDA3566A CONDITIONS total phase difference between chrominance input signals and demodulator output signals MIN. TYP. MAX. UNIT − − 8 deg 3.3 3.8 4.3 V RGB matrix and amplifiers V13, 15, 17(p-p) output voltage (peak-to-peak value) at nominal luminance/contrast (black-to-white) note 3 V13(p-p) output signal amplitude of the 'RED' channel (peak-to-peak value) at nominal contrast/saturation and no luminance signal to the input (R−Y signal) − 3.7 − V V13, 15, 17(m) maximum peak-white level 9.4 10.0 10.6 V I13, 15, 17 available output current 10 − − mA ∆V13, 15, 17 difference between black level and measuring level at the output for a brightness control voltage of 2 V − 0 − V ∆V difference in black level between the note 10 three channels for equal drive conditions for the three gains − − 100 mV control range of black-current stabilization at Vblack = 3 V; V11 = 2 V − − ±2 V black level shift with picture content − − 40 mV − − − V brightness control input current − − 5 µA slope of brightness control curve − 1.3 − V/V tracking of contrast control between the three channels over a control range at 10 dB − − 0.5 dB Vo output voltage during test pulse after switch-on 6.5 7.3 − V ∆V -------∆T variation of black level with temperature − 0 − mV/K ∆V variation of black level with contrast (+5 to −10 dB) − − 100 mV relative spread between the three output signals − − 10 % ∆V relative black level variation between the note 11 three channels during variation of contrast, brightness and supply voltage − 0 ± 10% 20 ± 10% mV Vblk blanking level at the RGB outputs − 0.85 1.1 V ∆Vblk difference in blanking level of the three channels − 0 10 mV dVblk differential drift of the blanking levels − 0 10 mV ∆V brightness control voltage range I11 February 1994 note 9 see Fig.5 note 11 ∆T = 40 °C 10 Philips Semiconductors Product specification PAL/NTSC decoder SYMBOL PARAMETER ∆V bl V Pl ------------ × -----------V bl ∆V Pl tracking of output black level with supply voltage S/N signal-to-noise ratio of output signals VR(p-p) TDA3566A CONDITIONS MIN. TYP. MAX. UNIT 0.9 1.0 1.1 62 − − dB residual 4.4 MHz signal at RGB outputs (peak-to-peak value) − − 100 mV VR(p-p) residual 8.8 MHz signal and higher harmonics at the RGB outputs (peak-to-peak value) − − 150 mV |Zo| output impedance (pins 13, 15 and 17) − 100 − Ω αtot frequency response of total luminance and RGB amplifier circuits for f = 0 MHz and 5 MHz − −1 −3 dB Io current source of output stage 2 3 − mA ∆V difference of black level at the three outputs at nominal brightness − − 10 mV − − 2 % V12, 14, 16(p-p) input signals (peak-to-peak value) for an note 4 RGB output voltage of 3.8 V (peak-to-peak) at nominal contrast 0.9 1.0 1.1 V ∆V difference between the black level of the note 12 RGB signals and the black level of the inserted signals at the outputs at nominal contrast − − 170 mV tr output rise time − 50 80 ns td difference delay for the three channels − 0 40 ns I12, 14, 16 input current − − 10 µA note 5 note 11 tracking of brightness control Data insertion Data blanking V9 input voltage for no data insertion − − 0.3 V V9 input voltage for data insertion 0.9 − − V V9 maximum input pulse voltage − − 3 V td delay of data blanking − − 20 ns R9 input resistance 7 10 13 kΩ suppression of the internal RGB signals when V9 > 0.9 V 46 − − dB suppression of external RGB signals when V9 < 0.3 V 46 − − dB Sandcastle input (note 13) V7 level at which the RGB blanking is activated 1.0 1.5 2.0 V V7 level at which the horizontal pulses are separated 3.0 3.5 4.0 V February 1994 11 Philips Semiconductors Product specification PAL/NTSC decoder SYMBOL PARAMETER TDA3566A CONDITIONS MIN. TYP. MAX. UNIT V7 level at which the burst gate and clamping pulse are separated 6.5 7.0 7.5 V td delay between black level clamping and burst gating pulse − 0.6 − µs Ii input current Vi = 0 to 1 V − − −1 mA Vi = 1 to 8 V − − 50 µA Vi = 8 to 12 V − − 2 mA Black current stabilization V18 DC bias voltage 3.5 5.0 7.0 V ∆V difference between input voltage for black current and leakage current 0.35 0.5 0.65 V I18 input current during black current − − 1 µA I18 input current during scan − − 10 mA V18 internal limiting at pin 18 8.5 9.0 9.5 V V18 switching threshold for black current control on 7.6 8.0 8.4 V R18 input resistance during scan 1.0 1.5 2.0 kΩ I10, 20, 21 DC input current during scan at pins 10, 20 and 21 − − 30 nA maximum charge or discharge current during measuring time (pins 10, 20 and 21) − 1 − mA 0 20 mV − 8.8 9.2 V µA difference in drift of the blank level note 11; ∆T = 40 °C NTSC V24-25 level at which the PAL/NTSC switch is activated (pins 24 and 25) I24+25 (AV) average output current (pin 24 plus pin 25) note 14 62 82.5 103 HUE hue control see Fig.6 − − − Notes to the characteristics 1. Signal with the negative-going sync; amplitude includes sync pulse amplitude. 2. Indicated is a signal with 75% colour bar, so the chrominance-to-burst ratio is 2.2 : 1. 3. Nominal contrast is specified as the maximum contrast −5 dB and nominal saturation as maximum −6 dB. This figure is valid in the PAL-condition. In the NTSC-condition no output signal is available at pin 28. 4. Cross coupling is measured under the following condition: input signal nominal, contrast and saturation such that nominal output signals are obtained. The signals at the output at which no signal should be available must be compared with the nominal output signal at that output. 5. The signal-to-noise ratio is defined as peak-to-peak signal with respect to RMS noise. 6. All frequency variations are referenced to the 4.4 MHz carrier frequency. All oscillator specifications have been measured with the Philips crystal 4322 143 ... or 4322 144 ... series. 7. The change in burst with VP is proportional. February 1994 12 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A 8. These signal amplitudes are determined by the ACC circuit of the reference part. 9. This value depends on the gain setting of the RGB output amplifiers and the drift of the picture tube guns. Higher black level values are possible (up to 5 V) however, in that condition the amplitude of the available output signal is reduced. 10. The variation of the black-level during brightness control in the three different channels is directly dependent on the gain of each channel. Discolouration during adjustments of contrast and brightness does not occur because amplitude and the black-level change with brightness control are directly related. 11. With respect to the measuring pulse. 12. This difference occurs when the source impedance of the data signals is 150 Ω and the black level clamp pulse width is 4 µs (sandcastle pulse). For a lower impedance the difference will be lower. 13. For correct operating of the black level stabilization loop, the leading and trailing edges of the sandcastle pulse (measured between 1.5 V and 3.5 V) must be within 200 ns and 600 ns respectively. 14. The voltage at pins 24 and 25 can be changed by connecting the load resistors (20 kΩ, 1%, in this condition) to the slider bar of the hue control potentiometer (see Fig.6). When the transistor is switched on, the voltage at pins 24 and 25 is reduced below 9 V, and the circuit is switched to NTSC mode. The width of the burst gate is assumed to be 4 µs typical. February 1994 13 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A MBA967 MLA408 100 100 G (%) G (%) 80 80 60 60 40 40 20 20 0 0 0 1 2 3 4 0 5 1 2 3 V6-27 (V) Fig.3 Contrast control voltage range. 4 V5-27 (V) Fig.4 Saturation control voltage range. MLA409 ϕ 2 MLA410 60 (deg) 40 ∆V (V) 1 20 0 0 –20 1 –40 2 –60 0 Fig.5 1 2 3 7 4 V11-27 (V) Difference between black level and measuring level at the RGB outputs (∆V) as a function of the brightness control input voltage (V11). February 1994 5 7.5 8 V25-27 (V) Fig.6 Hue control voltage range. 14 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A 1 2 21 22 23 24 lines vertical blanking (V) blanking pulse (BL1) blanking pulse (BL2) blanking pulse (BL3) insertion pulse (4L) (control via pin 11) black current information pulse (M) (pin 18) clamp pulse (L0) clamp pulse (L1) clamp pulse (L2) clamp pulse (L3) retrace must be completed end of vertical sync Fig.7 Timing diagram for black-current stabilization. February 1994 15 MLA411 February 1994 16 100 µF 12 V 390 Ω 120 pF 4 1 22 nF 3 28 4.7 µF 2 25 1 kΩ 330 nF 1 3.3 µF k Ω 4.7 k Ω 33 k Ω fosc adjust 12 V 33 nF 33 k Ω 1 µF 1 kΩ 19 23 470 Ω 470 nF 26 20 1 kΩ 470 nF 21 8.8 MHz 10 pF RA 27 pF 46 µ H 470 nF TDA3566A 7 luminance delay 330 ns 10 22 3-level sandcastle pulse 130 kΩ 12 V 8 18 9 13 RED blanking 10 nF RB 82 k Ω black current information 75 Ω R 12 15 G 75 Ω 100 nF data inputs 75 Ω 14 17 BLUE 100 nF GREEN B 16 11 MGA821 75 Ω 100 nF 5 6 12 V 2.2 µF 15 k Ω 47 k Ω 68 k Ω 2.2 µF 15 k Ω 47 k Ω 68 k Ω BAW62 2.2 µF 10 k Ω 47 k Ω 120 k Ω 12 V unkilled normal killed 10 k Ω saturation 12 V 10 k Ω contrast 12 V average beam current 10 k Ω brightness PAL/NTSC decoder Fig.8 Application diagram showing the TDA3566A for a PAL decoder. composite video (1 V p-p) 27 24 10 nF 1 kΩ 10.7 µH 10 nF 33 nF 1.2 k Ω DL700 APPLICATION INFORMATION Philips Semiconductors Product specification TDA3566A February 1994 17 B 22 k Ω 120 pF 56 pF 4 1 2 25 27 24 B 19 23 1 µF 470 Ω 10 22 26 20 56 pF 46 µ H 470 nF 8.8 MHz 22 pF 8 18 27 pF 9 13 RED blanking 10 nF RB 82 k Ω 75 Ω R 12 15 G 75 Ω 100 nF data inputs 75 Ω 14 17 BLUE 100 nF GREEN B 16 11 MGA820 75 Ω 100 nF 5 6 12 V 2.2 µF 15 k Ω 47 k Ω 68 k Ω 2.2 µF 15 k Ω 47 k Ω 68 k Ω BAW62 2.2 µF 10 k Ω 47 k Ω 120 k Ω 12 V unkilled normal killed 10 k Ω saturation 12 V 10 k Ω contrast 12 V average beam current 10 k Ω brightness PAL/NTSC decoder Fig.9 Application diagram showing the TDA3566A for a PAL/NTSC decoder. 22 k Ω 10 k Ω 470 nF 21 TDA3566A 7 12 V 1 kΩ 470 nF B 7.16 MHz 22 pF 22 kΩ RA 12 V 130 kΩ A ( PAL) 3-level sandcastle pulse 22 kΩ B ( NTSC) luminance delay 330 ns 1 kΩ 100 nF 20 k Ω (1%) composite video (1 V p-p) 1 kΩ 330 nF 2.2 1 µF k Ω 20 k Ω (1%) 22 kΩ 12 V 10 nF 1 kΩ 10.7 µH 10 nF 100 nF 12 k Ω 2.2 k Ω 3 22 nF 4.7 µF 22 kΩ DL700 2.2 k Ω hue control 1.2 k Ω 28 10 k Ω 100 µF 12 V 12 V B 22 k Ω 390 Ω black current information Philips Semiconductors Product specification TDA3566A Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A MLA412 28 27 26 I 1 100Ω 2V 2 kΩ 290 Ω 1 mA 2 2 kΩ 2 kΩ 9.2 V 25 3 mA 3 kΩ 0.5 mA 0.5 mA 24 TDA3566A 50 Ω 23 3 kΩ 3 5.4 kΩ 7 kΩ 1 kΩ 1 kΩ 8.2 kΩ 10 kΩ 2.9 V 400 Ω 400 Ω 10 kΩ 0.5 mA 4 5.4 kΩ 1.75 mA 2 kΩ 5 2 kΩ 22 5.4 kΩ 1 kΩ 4V 1 kΩ 1 kΩ 2 kΩ 6 1 kΩ 4V 0.5 mA 0.3 mA Fig.10 Internal pin circuitry (first part). February 1994 18 5.4 kΩ 8.2 kΩ Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A see pin 10 see pin 10 1.2 V 0.4 mA 0.25 mA 21 20 0.5 mA 7 6.3 V 2 kΩ 19 1.5 V 2 kΩ 10 kΩ 2 kΩ L0 2 kΩ TDA3566A 8 1.5 V I 10 kΩ 2.5 V 1 kΩ 1.5 kΩ 18 4L 10 kΩ see pin 19 9 see pin 12 10 kΩ see pin 19 see pin 12 17 16 15 14 100 Ω 1 kΩ 10 2 kΩ 1.5 kΩ 2.2 V 8.5 kΩ 8.5 kΩ 2 kΩ 13 2V 4L I 1 mA 3 mA 12 11 MLA413 Fig.11 Internal pin circuitry (second part). February 1994 19 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A PACKAGE OUTLINE 15.80 15.24 seating plane 36.0 35.0 handbook, full pagewidth 4.0 5.1 max max 3.9 3.4 0.51 min 1.7 max 0.53 max 2.54 (13x) 0.254 M 0.32 max 15.24 1.7 max 17.15 15.90 28 15 14.1 13.7 1 14 Dimensions in mm. Fig.12 28-lead dual in-line; plastic with internal heat spreader (SOT117). February 1994 20 MSA264 Philips Semiconductors Product specification PAL/NTSC decoder SOLDERING Plastic dual in-line packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 °C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. TDA3566A The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply the soldering iron below the seating plane (or not more than 2 mm above it. If its temperature is below 300 °C, it must not be in contact for more than 10 s; if between 300 and 400 °C, for not more than 5 s. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. February 1994 21 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A NOTES February 1994 22 Philips Semiconductors Product specification PAL/NTSC decoder TDA3566A NOTES February 1994 23 Philips Semiconductors – a worldwide company Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40 783 749, Fax. (31)40 788 399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SÃO PAULO-SP, Brazil. P.O. Box 7383 (01064-970). Tel. (011)829-1166, Fax. (011)829-1849 Canada: INTEGRATED CIRCUITS: Tel. (800)234-7381, Fax. (708)296-8556 DISCRETE SEMICONDUCTORS: 601 Milner Ave, SCARBOROUGH, ONTARIO, M1B 1M8, Tel. (0416)292 5161 ext. 2336, Fax. (0416)292 4477 Chile: Av. Santa Maria 0760, SANTIAGO, Tel. (02)773 816, Fax. (02)777 6730 Colombia: Carrera 21 No. 56-17, BOGOTA, D.E., P.O. Box 77621, Tel. (571)217 4609, Fax. (01)217 4549 Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (032)88 2636, Fax. (031)57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (9)0-50261, Fax. (9)0-520971 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01)4099 6161, Fax. (01)4099 6427 Germany: P.O. Box 10 63 23, 20095 HAMBURG , Tel. (040)3296-0, Fax. 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(03)757 4880 Mexico: Philips Components, 5900 Gateway East, Suite 200, EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556 Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Tel. (040)78 37 49, Fax. (040)78 83 99 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09)849-4160, Fax. (09)849-7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. (22)74 8000, Fax. (22)74 8341 Philips Semiconductors Pakistan: Philips Markaz, M.A. Jinnah Rd., KARACHI 3, Tel. (021)577 039, Fax. (021)569 1832 Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc, 106 Valero St. Salcedo Village, P.O. Box 911, MAKATI, Metro MANILA, Tel. (02)810 0161, Fax. (02)817 3474 Portugal: Av. Eng. Duarte Pacheco 6, 1009 LISBOA Codex, Tel. (01)683 121, Fax. (01)658 013 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65)350 2000, Fax. (65)251 6500 South Africa: 195-215 Main Road, Martindale, P.O. Box 7430,JOHANNESBURG 2000, Tel. (011)470-5433, Fax. (011)470-5494 Spain: Balmes 22, 08007 BARCELONA, Tel. (03)301 6312, Fax. (03)301 42 43 Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM, Tel. (0)8-632 2000, Fax. (0)8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. (01)488 2211, Fax. (01)481 7730 Taiwan: 69, Min Sheng East Road, Sec 3, P.O. Box 22978, TAIPEI 10446, Tel. (2)509 7666, Fax. (2)500 5899 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 60/14 MOO 11, Bangna - Trad Road Km. 3 Prakanong, BANGKOK 10260, Tel. (2)399-3280 to 9, (2)398-2083, Fax. (2)398-2080 Turkey: Talatpasa Cad. No. 5, 80640 LEVENT/ISTANBUL, Tel. (0212)279 2770, Fax. (0212)269 3094 United Kingdom: Philips Semiconductors Limited, P.O. Box 65, Philips House, Torrington Place, LONDON, WC1E 7HD, Tel. (071)436 41 44, Fax. (071)323 03 42 United States: INTEGRATED CIRCUITS: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 DISCRETE SEMICONDUCTORS: 2001 West Blue Heron Blvd., P.O. Box 10330, RIVIERA BEACH, FLORIDA 33404, Tel. (800)447-3762 and (407)881-3200, Fax. (407)881-3300 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601 For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BAF-1, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD28 © Philips Electronics N.V. 1994 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 9397 723 30011