Freescale Semiconductor, Inc.
User’s Guide
Document Number: KT33907-33908LUG
Rev. 1.0, 2/2015
KIT33907LAEEVB and KIT33908LAEEVB
Evaluation Board
Figure 1. KIT33907LAEEVB and KIT33908LAEEVB Board
© Freescale Semiconductor, Inc., 2015. All rights reserved.
Contents
1 Important Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2 Getting Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
4 Getting to Know the Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
5 Accessory Interface Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
6 Installing the Software and Setting up the Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
8 Graphical User Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
9 Schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
10 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
11 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
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Important Notice
1
Important Notice
Freescale provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES
ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs,
outputs, and supply terminals. This evaluation kit may be used with any development system or other source
of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. Final device
in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as
well as attention to supply filtering, transient suppression, and I/O signal quality.
The goods provided may not be complete in terms of required design, marketing, and or manufacturing related
protective considerations, including product safety measures typically found in the end product incorporating
the goods. Due to the open construction of the product, it is the user's responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the
customers applications, adequate design and operating safeguards must be provided by the customer to
minimize inherent or procedural hazards. For any safety concerns, contact Freescale sales and technical
support services.
Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from
the date of delivery and will be replaced by a new kit.
Freescale reserves the right to make changes without further notice to any products herein. Freescale makes
no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor
does Freescale assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages.
“Typical” parameters can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typical”, must be validated for each customer application by customer’s
technical experts.
Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the
body, or other applications intended to support or sustain life, or for any other application in which the failure
of the Freescale product could create a situation where personal injury or death may occur.
Should the Buyer purchase or use Freescale products for any such unintended or unauthorized application,
the Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising
out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Freescale was negligent regarding the design or manufacture
of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other
product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2015
KT33907-33908LUG User’s Guide Rev. 1.0 2/2015
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3
Getting Started
2
Getting Started
2.1
Kit Contents/Packing List
The KIT33907LAEEVB and KIT33908LAEEVB contents include:
•
Assembled and tested evaluation board/module in anti-static bag
•
Warranty card
2.2
Jump Start
Freescale’s analog product development boards help to easily evaluate Freescale products. These tools support analog mixed signal and
power solutions including monolithic ICs using proven high-volume SMARTMOS mixed signal technology, and system-in-package devices
utilizing power, SMARTMOS and MCU dies. Freescale products enable longer battery life, smaller form factor, component count reduction,
ease of design, lower system cost and improved performance in powering state of the art systems.
•
Go to www.freescale.com/analogtools
•
Locate your kit
•
Review your Tool Summary Page
•
Look for
Jump Start Your Design
•
Download documents, software, and other information
Once the files are downloaded, review the user guide in the bundle. The user guide includes setup instructions, BOM and schematics.
Jump start bundles are available on each tool summary page with the most relevant and current information. The information includes
everything needed for design.
2.3
Required Equipment and Software
To use this kit, you need
•
2.7 V to 40 V power supply, 3.0 A capability
Notes: When not connected to an MCU, the KITUSBSPIDGLVME can be used for register setting. In this case, the SPIGen dongle and
USB cable are required. For more information, see the “SPIGen 7 User Guide”.
2.4
System Requirements
The kit requires the following:
•
USB-enabled PC with Windows® XP or higher
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Terms
3
Terms
Part Number or
Parameter
CAN_5V
EVB
Definition
5.0 V CAN voltage
Evaluation Board
FCCU
Fault Collection and Control Unit
FS0B
Fail-safe Output Number 0
INTB
Interrupt
IO
LDO
Input/Output
Low-dropout Regulator
RSTB
Reset
SMPS
Switching Mode Power Supply
SPIGen
Software utility (installed on a PC) provides communication functions between the PC and a Freescale evaluation board
VAUX
Auxiliary power supply
VCCA
Power supply for ADC
VPRE
Pre-regulator voltage
WD
Watchdog
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5
Getting to Know the Hardware
4
Getting to Know the Hardware
4.1
Board Overview
KIT33907LAEEVB and KIT33908LAEEVB evaluation boards demonstrate the functionality of the SMARTMOS MC33907 and MC33908
power system basis chips, respectively. These ICs are equipped with an intelligent power management system including safety features
targeting the latest ISO26262 automotive functional safety standard. The EVB is a standalone board that can be used either with a
compatible microcontroller or with a PC. In the latter case, it is necessary to use an KITUSBSPIDGLEVME accessory interface board. See
section “Required Equipment and Software”.
4.2
Board Features
This EVB comes mounted with either an MC33907or an MC33908 IC. The main features of the board are as follows:
•
VBAT power supply either through power jack (2.0 mm) or phoenix connector
•
VCORE configuration:1.23 V or 3.3 V
•
VCCA configuration:
•
5.0 V/3.3 V
•
Internal transistor or external PNP
•
VAUX configuration:
•
3.3 V or 5.0 V
•
Enabled or disabled at startup
•
Ignition key switch
•
LIN bus
•
CAN bus
•
IO connector (IO_0 to IO_5)
•
Debug connector (SPI bus, CAN digital, LIN digital, RSTB, FS0B, INTB, Debug, MUX_OUT)
•
Signalling LED to give state of signals or regulators
4.3
MC33907 and MC33908 Device Features
The MC33907 and the MC33908 are multi-output ICs, with power supply and HSCAN transceiver. These devices have been designed
specifically with the automotive market in mind. The MC33907 is designed to support up 800 mA on VCORE, while MC33908 supports up
to 1.5 A on VCORE. All other features are the same. Both devices support following functions:
Table 1. Device Features
Device
Description
MC33907/ MC33908 Power system
basis chip with
high-speed CAN
and LIN
transceivers
Features
• Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost or
standard buck
• Switching mode power supply (SMPS) dedicated to MCU core supply: 1.2 V or 3.3 V,
delivering up to 1.5 A for the MC33908 and up to 800 mA for the MC33907
• Linear voltage regulator dedicated to MCU A/D reference voltage or I/Os supply (VCCA):
5.0 V or 3.3 V
• Linear voltage regulator dedicated to auxiliary functions or to a sensor supply (VCCA
tracker or independent 5.0 V/3.3 V)
• Multiple wake-up sources in Low-power mode: CAN and/or IOs
• Battery voltage sensing and multiplexer output terminal (various signal monitoring)
• Enhanced safety block associated with fail-safe outputs
• Six configurable I/Os
• ISO11898 high-speed CAN interface compatibility for baud rates of 40 kB/s to 1.0 MB/s
• High EMC immunity and ESD robustness
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Getting to Know the Hardware
4.4
Board Description
The EVB comes with either a Freescale MC33907 or MC33908 IC mounted on it. Below is a board-level logic diagram.
Buck/Buck-Boost Section
Power Supplies
LEDs for
Power
Supplies
Battery
Connection
Compensation
Network
Main Switch
VCORE
Selection
Ignition Key
Switch
DBG Mode
Select
LIN Bus
(only for
MC33907LAE
and
MC33908LAE)
SPI Dongle
Connector
CAN Bus
Second Resistor Bridge
- VDRIFT Selection
I/Os of
MC33907/MC339078
VCCA and VAUX
Selection
Main Signals of
MC33907/MC339078
FS Output Circuitry
Figure 2. Block Diagram for KIT33907LAEEVB and KIT33908LAEEVB
Table 2. Board Description
Name
Buck/Buck-Boost Section
Battery Connection
Main Switch
Ignition Key Switch
Description
• VPRE DC/DC selection mode, either Boost or Buck
• Battery voltage input, either on Jack (black connector) or Phoenix (green) connector
• Battery voltage ON/OFF
• Simulate ignition key. Connected to IO_0
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Getting to Know the Hardware
Table 2. Board Description (continued)
Name
LIN Bus
• LIN bus as a master
CAN Bus
• CANH and CANL differential pair
I/Os of MC33907_8
Second Resistor Bridge - VDRIFT Selection
Main Signals of MC33907_8
VCCA and VAUX Selection
FS Output Circuitry
SPI Dongel Connector
DBG Mode Select
VCORE Selection
Compensation Network
LEDs for Power Supplies
Power Supplies
4.5
Description
• All IOs, VDDIO and GND available
• Bridge resistor for VCORE redundant check
• SPI, VDDIO, fail-safe pin, CAN and LIN digital, MUXOUT, INTB and RSTB available
• VCCA and VAUX voltage selection
• FS0B configuration
• Connector with SPI bus. Compliant to SPIGen Freescale board
• Controls Debug or Normal mode entering at boot up
• VCORE voltage selection
• Compensation network selection
• Switches for ON/OFF on LEDs
• MC33907LAE or MC33908LAE output power supply (VPRE, VCORE, VAUX, VCCA)
(only for MC33907LAE and MC33908LAE)
Evaluation Board Configuration
Figure 3 shows a configuration example for the EVB, which enables:
•
VCORE 3.3 V
•
Compensation network for MPC5643L
•
VCCA and VAUX = 5.0 V
•
VCCA with external PNP
•
Debug mode
•
VPRE in Buck mode
•
VDDIO tied to VCCA
•
Various signalling LEDs enabled
•
IO1 configured as IN/OUT
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Getting to Know the Hardware
Figure 3. Default Board Configuration
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Getting to Know the Hardware
4.6
LED Definitions
The following table lists the LEDs used as visual output devices on the EVB:
Table 3. LEDs
Schematic
Label
Name
D6
VPRE
Indicator of pre-regulator voltage
D7
VAUX
Indicator of auxiliary power supply
D8
VCCA
Indicator of ADC power supply
D9
CAN_5V
Indicator of 5.0 V CAN voltage
D10
IO_5
Indicator of IO_5 state
D11
IO_4
Indicator of IO_4 state
D12
FS0B
Indicator for fail-safe output number 0
D13
VBAT_P
Indicator of battery voltage after protection diode
D14
RSTB
Indicator of a reset
D15
INTB
Indicator of an interrupt
D17
VCORE
4.7
Description
Indicator of VCORE power supply
Test Point Definitions
The following test-point jumpers provide access to signals on the MC33907 or MC33908 IC:
Table 4. Test Points
Schematic Label
Signal Name
Description
TP2
J24.3
-
TP3
J24.5
-
TP4
J24.7
-
TP5
J20.16
-
TP6
PGND
Power ground
TP7
PGND
Power ground
TP8
GND
Ground
TP9
GND
Ground
TP10
GND
Ground
TP11
GND
Ground
TP12
GND
Ground
TP13
GND
Ground
TP14
GND
Ground
TP15
GND
Ground
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Getting to Know the Hardware
Table 4. Test Points (continued)
Schematic Label
Signal Name
Description
TP16
GND
Ground
TP17
GND
Ground
TP18
J24.2
-
TP19
J24.4
-
TP20
J24.6
-
TP21
J24.8
-
TP22
J24.10
-
TP23
J24.12
-
TP24
J24.14
-
TP25
J24.16
-
TP26
VPRE
TP27
VCORE
Core voltage for the MCU
TP28
CANH
-
TP29
CANL
-
TP30
LIN
TP31
MUX_OUT
TP32
FS0B
Fail-safe output
TP33
RSTB
Reset signal
TP34
INTB
Interrupt output
TP35
VSW
VPRE Switching voltage
TP36
VAUX
Auxiliary power supply
TP37
VCCA
ADC power supply
TP38
CAN_5V
CAN power supply
TP39
VSUP3
TP40
VSW_Core
Pre-regulator voltage
LIN bus
Output from the analog multiplexer
Supply voltage
VCORE supply voltage
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Getting to Know the Hardware
4.8
Connector and Jumper Definitions
Table 5. Main Power Supply Connector
JP1 Pin Number
Name of Power Rail
Description
1
VCORE
Core voltage for the MCU
2
PGND
Power ground
3
VCCA
ADC power supply
4
GND
Ground
5
VAUX
Auxiliary power supply
6
GND
Ground
7
CAN_5V
8
GND
Ground
9
VPRE
Pre-regulator voltage
10
PGND
Power ground
CAN power supply
Table 6. Jumpers J1 through J31 (Including Connectors)
Schematic
Label
J1
J2
Pin Number
Pin Name
Jumper/Pin Function
Compensation network for FB_core – part 1
1-2
VCORE = 1.23 V
3-4
VCORE = 3.3 V
C_OUT – selection of output capacitance for VCORE
If connected, output capacitance is 40 µF, 20 µF otherwise
No jumper
COUT = 20 µF
1-2
COUT = 40 µF
J3
Power supply DC 12 V
J4
Buck-boost/standard buck mode configuration
1-2
3-4
No jumper
J5
Buck-boost configuration
Buck only configuration
VCORE selection
1-2
VCORE = 1.23 V
3-4
VCORE = 3.3 V
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Table 6. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
J6
J7
J8
J9
Pin Number
Pin Name
Jumper/Pin Function
Configuration for Boots_core pin
1-2
Boots_core pin connected to GND – used for devices with linear voltage regulator on
VCORE
2-3
Boots_core pin connected to SW_core – used for devices with switching mode power
supply on VCORE
Power supply (max. voltage = 40 V)
This connector should be used to supply EVB from protected voltage source
1
VBAT
Positive supply
2
GND
Ground
Power supply for EVB
Allows disconnecting of all three supply pins for current measurements
Normally (no measurement), jumpers should be connected
1-2
Enables power supply (VBAT_P) for VSUP3 pin of MC33907 (or MC33908)
3-4
Enables power supply (VSUP) for VSUP1 and VSUP2 pins of MC33907 (or MC33908)
Compensation network for FB_core – part 2
1-2
VCORE = 1.23 V
3-4
VCORE = 3.3 V
J10
VSNS_EN – connects battery voltage before filter to VSENSE
J11
External transistor for VCCA
1-2
Emitter of Q2 connected to VCCA_E
2-3
External transistor Q2 is not used
J12
IO_0_PD – pulls down IO_0
J13
FS0B pull-up connection
1-2
FS0B pull-up is supplied from VSUP3
2-3
FS0B pull-up is supplied from VDDIO
J14
Connects base of the transistor Q2 to the VCCA_B pin
J15
External resistor bridge monitoring (for future use)
Used in conjunction with J18
Resistor bridge has to be in same configuration as J5
Voltage on this voltage divider has to be adjusted to same level as for first bridge using potentiometer R17
J16
1-2
VCORE = 1.23 V
3-4
VCORE = 3.3 V
VDDIO tracking
1-2
VDDIO tracks VCCA
2-3
VDDIO tracks VCORE
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Table 6. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
J17
J18
J19
J20
Pin Number
Pin Name
Jumper/Pin Function
DBG_EN - enables debug mode
No jumper
Normal mode
1-2
Debug mode
DRIFT_MONIT – External resistor bridge monitoring
1-2
Second resistor bridge on IO_1 is disabled
2-3
Reserved for future use
VCCA/VAUX regulator selection
1-3 and 2-4
VAUX is disabled
3-5 and 4-6
VAUX is enabled
Additional Inputs/Output
Fail-safe output
1
FS0B
2
VDDIO
3
MISO
SPI – Master Input Slave Output
4
RSTB
Reset pin – connect to the reset line of the MCU
5
MOSI
SPI – Master Output Slave Input
6
GND
Ground
7
SCLK
SPI – clock
8
GND
Ground
9
NCS
SPI – Chip Select
10
GND
Ground
11
MUX_OUT
12
INTB
13
RXD_L
LIN receive pin – connect to the MCU
14
TXD_L
LIN transmit pin – connect to the MCU
15
GND
Ground
16
TP5
-
17
RXD
CAN receive pin – connect to the MCU
18
TXD
CAN transmit pin – connect to the MCU
19
DBG
Debug pin
20
GND
Ground
VDDIO voltage
Output from the multiplexer – connect to the MCU's ADC
Interrupt pin – connect to the MCU IO with an interrupt capability
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Table 6. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
J21
J22
J23
Pin Number
Pin Name
Jumper/Pin Function
LIN connector
1
LIN
2
GND
LIN after transceiver (NOT the MCU side)
Ground
CAN connector
1
CANH
CANH signal after transceiver (NOT the MCU side)
2
CANL
CANL signal after transceiver (NOT the MCU side)
General Inputs/Outputs
pin1
IO_1
-
pin2
IO_0
-
pin3
IO_3
-
pin4
IO_2
-
pin5
IO_5
-
pin6
IO_4
-
pin7
VDDIO
-
pin8
NC
-
pin9
VBAT
-
pin10
GND
-
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Table 6. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
J24
J25
Pin Number
Pin Name
Jumper/Pin Function
SPI/USB dongle or MCU connection
SPI/USB dongle should be directly connected to this port
pin1
GND
Ground
pin2
TP18
-
pin3
TP2
-
pin4
TP19
-
pin5
TP3
-
pin6
TP20
-
pin7
TP4
-
pin8
TP21
-
pin9
SCLK
SPI – clock
pin10
TP22
Not connected
pin11
MOSI
SPI – Master Output Slave Input
pin12
TP23
-
pin13
MISO
SPI – Master Input Slave Output
pin14
TP24
-
pin15
NCS
SPI – Chip Select
pin16
TP25
-
Power supply for LEDs on IO_4 and IO_5 (D11, D10)
1-2
Enables power supply for IO_4 (D11)
3-4
Enables power supply for IO_5 (D10)
J26
RSTB_LED_EN – enables LED D14 for RSTB output
J27
INTB_LED_EN – enables LED D15 for INTB output
J28
IO5_OUT – IO_5 output configuration
J29
1-2
IO_5 connected to LED D10 via transistor Q5
2-3
IO_5 pulled down
IO4_OUT – IO_4 output configuration
1-2
IO_4 pulled down
2-3
IO_4 connected to LED D11 via transistor Q6
J30
Enable LED D12 for fail-safe.
J31
Enables LED D13 as indicator of power supply
J32
Enables LED D17 as indicator for VCORE power supply
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4.8.1
Compensation Network
Voltage regulator needs a feedback from the VCORE voltage to be able to adjust (control) output voltage. For this reason, two bridges are
implemented in the external MC33907 or MC33908 circuitry. Static feedback (steady-state) voltage is defined by a simple resistor bridge
(given by RA3/RB3 and RA4). Dynamic behavior of the regulator is controlled by another bridge that is an RC divider (defined by RBx,
CBx, R1, C1, R2, C2). Compensation network is shown in the Figure 4. Steady-state voltage can be either 1.23 V or 3.3 V. To tune the
dynamic performance, the board is equipped by two different bridges (possible combinations of the jumpers J1 and J9 are shown in
Table 7). The combinations shown in Table 7 are chosen to provide an optimal performance for the given output voltage. The real dynamic
performance can differ for different applications and can be tuned by changing the compensation network and by adding output capacitors
(J2).
Table 7. Compensation Network and VCORE Settings
VCORE
(V)
Jumper Settings
Static Behavior
Dynamic Behavior
J5
J1
J9
1.23
3-4
3-4
3-4
3.3
1-2
1-2
1-2
VCORE _sense
VCORE
Figure 4. Compensation Network and VCORE Setup Schematic
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Getting to Know the Hardware
4.8.2
Second Resistor Bridge - VDRIFT Monitoring
To increase safety level of an application, a second resistor bridge has been added. This bridge generates the same voltage as the bridge
connected to FB_core pin. If difference between voltages is greater than VDRIFT, then the FS state machine is impacted.
Table 8. VDRIFT Monitoring Settings
VCORE
(V)
Hardware Settings
J15
J18
1.23
1+2
3+4
3.3
3+4
1+2
To use this functionality, few settings have to be done in the hardware as well as in the software configuration. For the hardware part, the
second resistor bridge has to be configured by jumper J18, as shown in the Figure 5, and adjusted by the potentiometer R17 to set the
same voltage as on the first bridge. Software sets registers INIT_Vreg1 (bit Vcore_FB to 1) and register INIT_FSSM1 (bit IO_1_FS to 1).
VCORE
J15
IO _ 1 V C OR E FB Drift E n a ble
V COR E
V COR E
Figure 5. Second Resistor Bridge
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Getting to Know the Hardware
4.9
Switch Definitions
Table 9. Switches
Switch Number
SW1
SW2
SW3
SW4
Position
Function
Description
Power supply select
1-2
Supply from J7 selected
2-3
Power jack on J3 selected
VCCA/VAUX switch
Only one choice is possible at the same time
1
3.3 V / 3.3 V
2
5.0 V / 5.0 V
3
3.3 V / 5.0 V
4
5.0 V / 3.3 V
This setting is not allowed if VAUX is not used - option
VCCA only (selected by J19)
LEDs - indicators for power supplies
1
VPRE
Enables LED indicator for pre-regulator
2
VAUX
Enables LED indicator for auxiliary power supply
3
VCCA
Enables LED indicator for VCCA regulator
4
CAN_5 V
Enables LED indicator for CAN regulator
Ignition switch
1-2
IO_0 connected to VBAT
(ignition key active)
2-3
No voltage on the IO_0
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Accessory Interface Board
5
Accessory Interface Board
The KIT33907LAEEVB or KIT33908LAEEVB is generally used with the KITUSBSPIDGLEVME interface dongle (see Figure 6), which
provides a bidirectional SPI/USB conversion. This small board makes use of the USB, SPI, and parallel ports built into Freescale’s
MC68HC908JW32 microcontroller. The main function provided by this dongle is to allow Freescale evaluation kits that have a parallel port
to communicate via a USB port to a PC. For more information regarding KITUSBSPIDGLEVME interface dongle, go to
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITUSBSPIDGLEVME.
Figure 6. KITUSBSPIDGLEVME Interface Dongle
For information on setting up the dongle with the EVB, see “Connecting the KITUSBSPIDGLEVME Interface Dongle”.
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Accessory Interface Board
5.1
Connecting the KITUSBSPIDGLEVME Interface Dongle
A typical connection of KITUSBSPIDGLEVME Interface Dongle (section “Accessory Interface Board”) to the KIT33907LAEEVB or
KIT33908LAEEVB evaluation board is done through connector J24 (see Figure 7). In this configuration, it is recommended to use the EVB
in a debug mode (J17 configured as Debug). In this mode there is no timeout used for the INIT phase, so the initialization commands can
be sent anytime. WD refresh is also not mandatory in the debug mode. This means that no action is taken if WD refresh fails (WD window
expires, WD refreshed during closed window, wrong WD answer).
SPI/USB Dongle
(KITUSBSPIDGLEVME)
KIT33907LAEEVB/KIT33908LAEEVB
Figure 7. Connecting KITUSBSPIDGLEVME to the Evaluation Board
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Installing the Software and Setting up the Hardware
6
Installing the Software and Setting up the Hardware
6.1
Configuring the Hardware
Figure 8 shows the setup required to use KIT33907LAEEVB or KIT33908LAEEVB.
Power Supply
PC with SPIGen/GUI Installed
USB A-B Cable
SPI/USB Dongle
KITUSBSPIDGLEVME
KIT33907LAEEVB/KIT33908LAEEVB
Figure 8. Evaluation Board Setup
6.2
Step-by-step Instructions for Setting Up the Hardware Using SPIGen
In order to perform the demonstration examples, first set up the EVB hardware and software as follows:
1.
Ready the computer, install SPIGen.
2.
Connect SPIGen on J24.
3.
Connect SPIGen USB cable to the PC.
4.
Set the EVB jumpers and switches as needed. Refer to Figure 3 for an example.
5.
Select Debug or Normal mode with J17 (1).
6.
Attach loads to JP1 as needed.
7.
Attach DC power supply on J3 or J7 (maximum voltage: 40 V).
8.
Switch SW1 to supply the board.
9.
If SW2 switches are ON and VBAT is set correctly, then VPRE, VCCA, VAUX, CAN_5 V LEDs should turn ON. VBAT value
is dependent on VPRE configuration. In Buck mode, it must be 8.2 V min. FS0B LED should turn ON (J13 / J30 must be
plugged).
10. Launch SPIGen.
11. Open the SPIGen configuration file.
12. In Debug mode, use the SPIGen batch RST_counter_to_0.spi to reset the error counter. FS0B should turn off (LED
D12 turned off).
Note: At this stage, EVB is powered and SPIGen is working. When Normal mode is selected with J17, valid WD must be sent, otherwise
the device goes into deep fail-safe.
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Initialization and Configuration Mode
7
Initialization and Configuration Mode
7.1
INIT Phase
INIT registers are set after POR (power-on reset) condition with their default values. This default configuration is compatible with the
default EVB settings excluding one register - INIT FSSM2. Bit IO_23_FS in this register is set by default, which means the fail-safe outputs
(FCCU_x of the MPC5643L or similar device) have to be connected to the IOs 2 and 3 of the MC33907 or MC33908. If MPC5643L (or
similar device) is not used, the bit IO_23_FS has to be cleared during INIT phase (setting shown in Table 10). INIT phase of the main part
is finished after writing to the INIT_INT register. This command closes access to the INIT registers and device goes in Normal mode. This
sequence (INIT_FSSM2, INIT_INT) has to be done in the same manner in Debug and also in Standard mode. The only difference is in the
timeout constraints used for the Standard mode. In the Standard mode, INIT commands have to be sent before the 256 ms timer (starting
from the RST pin release) expires.
Table 10. INIT FSSM2 Setting
MOSI
MOSI
7.2
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
1
1
0
0
1
0
1
P
RSTB_
err_FS
IO_23_
FS
PS
F_FS1
Secure
_3
Secure
_2
Secure
_1
Secure
_0
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
1
1
0
0
1
0
1
1
0
0
0
1
1
0
0
0
Normal Operation
During normal operation (after INIT phase), in both modes it is possible to send a WD refresh command. In the Debug mode, no action is
performed on a bad WD answer. In Normal mode, the KITUSBSPIDGLEVMESPI interface dongle is not able to guarantee WD refresh
period (Windows XP, 7 are not real-time operating systems); nevertheless, WD refresh was successfully tested in Standard mode using
WD window duration 512 ms (reconfigured in the INIT phase).
7.3
Debug Mode
The KIT33907LAEEVB or KIT33908LAEEVB is mainly intended to be used in Debug mode. Use in normal mode requires an MCU to be
able to manage the WD. To use the part in Normal mode, it is required to send a good WD answer at startup, in the 256 ms windows after
reset release, then to update the WD at the right time. With KIT33907LAEEVB or KIT33908LAEEVB attached to the
KITUSBSPIDGLEVME, this can be done only manually, which is not feasible.
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Graphical User Interface
8
Graphical User Interface
There are two possible interfaces to configure registers:
•
SPI generator (SPIGen) allows easy and simple drive, setting registers individually or sending batch of commands.
•
MC33907_8 GUI provides friendly access to registers with a visual environment.
8.1
SPIGen
The latest version of SPIGen is designed to run on any Windows 8, Windows 7, Vista or XP-based operating system. To install the
software, go to www.freescale.com/analogtools and select your kit. Click on that link to open the corresponding Tool Summary Page. Look
for “Jump Start Your Design”. Download to your computer desktop the SPIGen software as well as the associated configuration file.
Run the install program from the desktop. The Installation Wizard guides you through the rest of the process.
To use SPIGen, go to the Windows Start menu, then Programs, then SPIGen, and click on the SPIGen icon. The SPIGen Graphic User
Interface (GUI) appears. Go to the file menu in the upper left hand corner of the GUI, and select “Open”. In the file selection window that
appears, set the “Files of type:” drop-down menu to “SPIGen Files (*.spi)”. (In an exceptional case, the file name may have a .txt extension,
in which case you should set the menu to “All Files (*.*)”.) Next, browse for the configuration file you saved on your desktop earlier and
select it. Click “Open”, and SPIGen creates a specially configured SPI command generator for your EVB.
In order to fill specific need, it is also possible to edit registers with another value and to save it for further use, either as standalone or
inside a batch.
Figure 9 shows a batch called “RST_counter_to_0”, as an example.
Figure 9. RST_counter_to_0 Batch
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Graphical User Interface
At startup or when resuming from LPOFF mode the reset error counter starts at level 1 and FS0B is asserted low. To remove activation of
FS0B, the RST error counter must go back to value “0” (seven consecutive good WD refresh decreases the reset error counter down to
0) and a right command is sent to FS_OUT register. This can be demonstrated with this batch running in debug mode.
The batch shown in Figure 9 executes the following action:
– WD_Window_DIS_xCD0C:
•
Disables normal WD
– INIT_FSSM2_xCB0C:
•
IO_23_FS bits configured in “NOT SAFETY” mode
– WD_answer1 to WD_answer7:
•
If the part is in debug mode, this sends the right first WD answer and allows the reset counter to change to 0
– FS_OUT_xD327:
•
Disables FS0B pin, coming back to high level (D12 turned off)
– INIT_INT_x8C00:
•
Closes the init phase of the main state machine
– CAN_MODE_B0C0:
•
Enables CAN transceiver
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Graphical User Interface
8.2
Working with KIT33907_8 GUI
The GUI allows the user to program all SPI features by using a friendly interface as well as modifying the register table manually for
advance users. Refer to KTMPC5643DBEMOUG for a complete description of the GUI.
1.
To launch the MC33907_8 GUI application, select the application icon from the Freescale folder in the Start menu as it
is shown in Figure 10.
Figure 10. Launching MC33907_8 GUI application
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Graphical User Interface
2.
Figure 11 shows the status of several registers at startup. In this example, register INIT_FSSM2 has bit IO_23_FS
configured as SAFETY CRITICAL.
Figure 11. MC33907_8 GUI Main Screen
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Graphical User Interface
3.
In the right side of the GUI, select NOT SAFETY and send command as shown in Figure 12.
Figure 12. MC33907_8 GUI Register
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A
B
A
J10
R13
4.32K
R24
5.1K
IO_1
R52
510K
GND
1
2
3
2
GND
R15
24.9K
J15
R25
5.6K
R17
5.0K
1 3
2 4
Vcore
1
2
2K
D2
2K
LIN
A
1N4148WS
C37
1000PF
R50
GND
R141
C
1
Vsup3
GND
C89
2.2UF
CAN_5V
C44
10nF
Vsense
DNP
1uH
J26
INTb
RSTb
2
1
R39
1.5K
RED
D14
VDDIO
2
1
J27
R40
1.5K
RED
D15
5
LED Signalling
GND
R43
5.1K
IO_5
J28
R53
5.1K
R45
510K
R41
5.1K
J12
1
2
FS0_b
J22
1
4
2
Q5
3
1
ON
OFF
CANH
CAN
4 2
J25
PGND
LED/GRN
D10
R33
1.5K
3 1
Vpre
CANL
R51
60.4
10K
J17
GND
CB31
10nF
DNP
IO_1
IO_3
IO_5
1
R46
510K
LED/GRN
D11
R42
Q6
5.1K
R34
1.5K
VDDIO
Vbat
DEBUG
NORMAL
VSUP1
VSUP2
VSENSE
VSUP3
LIN
GND_COM
CAN_5V
CANH
CANL
IO_4
IO_5
IO_0
U2
J29
4
1
3
5
7
9
C30
10nF
PGND
VSW
C4
0.1UF
R30
11.0K
GND
GND
R44
5.1K
IO_4
2
4
6
8
10
I/O
GND
J23
IO_1
DBG
FS0b
J17-DEBUG MODE
R28
VDDIO
FS0b_PU
R63
5.1K
GND
C31
10nF
Vpre
R29
5.1K
Vsup3
J13
CANH
CANL
IO_4
IO_5
IO_0
Vsense
1
2
3
4
5
6
7
8
9
10
11
12
DNP
C46
10nF
DNP
PGND
C45
10nF
GND
IO_0
CAN_5V
C49
0.1UF
GND
J8
GND
GND
PLUG_1X2
GND
R11
5.1K
C47
220PF
DNP
LIN
C27
4.7uF
Vsup
Contact KEY
PGND
2
GND
Vbat
Feature supported only with with MC33FS640x
PLUG_1X2
J21
LIN
1
L4
S1
C28
4.7uF
GND
GND
C22
1uF
GND
GND GND
J18-IO_1 Configuration
1 - 2 IN / OUT
2 - 3 VcoreFB drift
J18
1 - 2 Vcore = 1.23V
3 - 4 Vcore = 3.3V
Vsup3
S2
GND
Vsup3
CB20
C20 10nF
47uF DNP
+
C
D4
SBRS81100T3G
Vbat
J15
IO_1 VcoreFB Drift Enable
GND
GND
A
C
C
1
2
PLUG_1X2
J7
Vbat
S1
S2
3
00
00 2
00
00
00 1
GND
SW1
500SSP3S1M6QEA
A
C
D
1
2
GND
3
1
J3
3
1
00 3
0000
00 2
00
00
2
3
PGND
R67
4.7
Vcca
Vaux
Vpre
IO_2
IO_3
TXD
RXD
TXD_L
RXD_L
CAN_5V
{2}
GND
IO_0
IO_2
IO_4
36
35
34
33
32
31
30
29
28
27
26
25
49
Vbat
Vcore
TP2
TP3
TP4
1
2
3
4
PGND
D3
A
J4
PGND
1 3
2 4
MBRS340T3G
C
0
GND
J31
J32
SW3
5.1K
RSTb
VDDIO
8
7
6
5
D9
R47
1.2K
A
3
GND
C
C
C R37
C R36
C R32
C R31
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
Vcca
LED/GRN
D13
GND
VDDIO
Vcore
DNP
C43
1000PF
LED/GRN
D17
D8
LED/GRN
A
D7
LED/GRN
A
LED/GRN
A
D6
2
4
6
8
10
12
14
16
GND
LED/GRN
A
J24
R142 560 A
1
3
5
7
9
11
13
15
SPI
MUX_OUT
C32
1000PF
SCLK
MOSI
MISO
NCSb
R26
GND
R64
NCSb
SCLK
MOSI
MISO
VDDIO
560
560
560
1.5K
GND
PGND
RXD
DBG
FS0_b
MISO
MOSI
SCLK
NCSb
MUX_OUT
RXD_L
GND
D16
FS0b
J30
MMSZ5248ET1
1
3
5
7
9
11
13
15
17
19
J20
2
1
R38
5.6K
2
4
6
8
10
12
14
16
18
20
DEBUG
1
GND
R35
510K
FS0b_PU
GND
R48
10K
RED
D12
Q7
TXD
INTb
TXD_L
GND
RSTb
VDDIO
GND
PGND
C24
0.22uF
GNDGND
C48
0.1UF
Vpre
Vaux
Vcca
Vcore
2
1
33906
33907_8
2 - 3
J6
C14
0.1UF
J6
1 - 2
C5
0.1UF
Boost_core
VSW_Core
1
JP1
TP5
2
PLUG_1X10
1
2
3
4
5
6
7
8
9
10
Power Supply
GND
Vcore
CAN_5V
J16
PGND PGND
CB29
10nF
DNP
Vpre
3
GND
PGND
C6
1000PF
INTb
10uF 10uF
10uF
10uF
CB21 CC21 C29
C21
PGND
J4-Vpre mode
Buck only
1-2 & 3-4
Jumpers off Buck or Boost
Boost_core
VSW_Core
Vcore_sense
Comp_core
FB_core
SELECT
GND
C36
10nF
GND
MC33907LAE
BOOT_CORE
SW_CORE
VCORE_SNS
COMP_CORE
FB_CORE
SELECT
VDDIO
INT
CS
SCLK
MOSI
MISO
EP
{2}
1
BUK9832-55A
Q1
D1
MBRS340T3G
PGND
Vpre
C11
4700PF
C
A
22uH
2
4
3
L3
2
MTG1
BH3
L5
J14
J2
COUT4
1
2
10uF
PGND
10uF
1
2
3
4
SW2
C33
4.7uF
1
J11
1
2
3
Vcca
8
7
6
5
GND
Vpre
51K
R49
GND
MTG1
BH4
1
Date:
Size
C
2 4
Vcore
GND
GND
1
3
5
Vaux_B
1 3
2 4
J19
1
2
4
6
C23
4.7uF
Vaux_Emitter
GND
Vaux_E
Vaux_Emitter
Vaux
Q3
NJT4030P
C2
150pF
R2
18K
C1
680PF
R1
510
Vcore
TP40
TP35
TP34
TP33
TP32
TP31
TP30
TP29
TP28
Thursday, October 09, 2014
1
Sheet
2
SCH-28601 PDF: SPF-28601
EVB
of
PUBI: ___
KIT33907LAEEVB
FIUO: X
VSW_Core
VSW
INTb
RSTb
FS0b
MUX_OUT
LIN
CANL
CANH
Regulator
VCCA only
VAUX & VCCA
Jumper
1-3 & 2-4
3-5 & 4-6
FCP: ___
GND
GND
GND
Vsup3
GND
Vaux
PGND
J9
RB2
39K
Vaux
Comp_core
CB2
1000PF
1 3
2 4
CB1
220PF
RB1
200
J1
2
J19
Vcca/Vaux regulator select.
Vpre
GND
RA4
8.06K
1 3
Document Number
Page Title:
ICAP Classification:
Drawing Title:
TP17
GND
TP16
MTG1
TP15
GND
TP11
TP39
TP9
TP14
BH2
TP7
TP36
TP13
GND
CAN_5V
GND
Vcca
PGND
TP27
GND
1
1
1
{2}
1
24K
R27
TP12
GND
TP10
TP38
TP8
TP37
TP6
Vpre
{2}
5.1K
R23 12K
Test Points
J5
RA3
1
RB3
FB_Core
Vcca
R22
Q2
NJT4030P
Vcca_E
SWITCH Vcca / Vaux Vcca only
1-8
3.3
3.3
3.3
2-7
5
5
5
3-6
3.3
5
NA
4-5
5
3.3
5
TP26
C8
10nF
PGND
J1 / J5 / J9
1 - 2 Vcore = 1.23V
3 - 4 Vcore = 3.3V
PGND
10uF
SW2
Vcca/Vaux Voltages config.
SELECT
VCCA_B
Vcore_sense
COUT2 COUT3
COUT1 10uF
2.2uH
2
D5
SS22T3G
1
PGND
MTG1
BH1
R140
4.7
C88
4700PF
C
A
3
2
1
3
2
1
13
14
15
16
17
18
19
20
21
22
23
24
1
2
A
C
3
2
1
2
VCCA
VCCA_B
VCCA_E
VAUX_E
VAUX_B
VAUX
48
47
46
45
44
43
42
41
40
39
38
37
SW_PRE1
SW_PRE2
BOOT_PRE
DGND
GATE_LS
VCCA
VCCA_B
VCCA_E
VAUX_E
VAUX_B
VAUX
VPRE
IO_1
FS0
DEBUG
AGND
MUX_OUT
IO_2
IO_3
TXD
RXD
TXDL
RXDL
RST
3
4.32K
GND
3
1
2
SW4
500SSP3S1M6QEA
2
3
24.9K
Vbat Jack
1
2
A
C3
2
C
A
3
4
1
2
1
2
2
B
A
3
E
C
C
B
2
4
E
C
Freescale Semiconductor, Inc.
2
4
A
Rev
A
B
C
D
9
LSF
5
Schematic
Schematic
Figure 13. Evaluation Board Schematic
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Board Layout
10
Board Layout
10.1
Assembly Layer Top
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Board Layout
10.2
Assembly Layer Bottom
.
Note: This image is an exception to the standard top-view mode of representation used in this document. It has been flipped to show a
bottom view.
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31
Board Layout
10.3
Bill of Materials
Table 11. Bill of Materials (1)
Item
Qty
Schematic Label
Value
Manufacturer
Part Number
Assy Opt
Active Components
1
1
U1
Freescale Semiconductor
MC33907LAE or MC33908LAE
(3)
Capacitors
2
1
C1
680 pF
KEMET
C0603C681J5GAC
3
1
C2
150 pF
KEMET
C0603C151J5GAC
4
5
C4, C5, C14, C48, C49
0.1 μF
KEMET
C0603C104K3RAC
5
4
C6, C32, C37, CB2
1000 pF
AVX
06035U102KAT2A
6
4
C8, C30, C31, C36
10 nF
AVX
06035C103JAT2A
7
2
C11, C88
4700 pF
Yageo America
CC0603KRX7R9BB472
8
1
C20
47 μF
Nippon Chemi-Con Corporation EMVH500ADA470MJA0G
9
4
C21, C29, CB21, CC21
10 μF
TDK
CGA6M3X7R1C106K
10
1
C22
1.0 μF
TDK
CGA5L3X7R1H105K160AB
11
2
C23, C33
4.7 μF
Murata
GCM31CR71C475KA37
12
1
C24
0.22 μF
KEMET
C0603C224K3RACTU
13
2
C27, C28
4.7 μF
Murata
GCM32ER71H475KA55L
14
1
C43
1000 pF
AVX
06035U102KAT2A
(2)
15
6
C44, C45, C46, CB20, CB29, CB31 10 nF
AVX
06035C103JAT2A
(2)
16
1
C47
220 pF
KEMET
C0603C221K5GACTU
(2)
17
1
C89
2.2 μF
AVX
08053C225KAT2A
18
1
CB1
220 pF
KEMET
C0603C221K5GACTU
19
4
COUT1, COUT2, COUT3, COUT4
10 μF
Murata
GCM32ER71E106KA57
(3)
20
2
D1, D3
MBRS340T3G
ON Semiconductor
MBRS340T3G
(3)
21
1
D2
1N4148WS
Diodes Inc
1N4148WS-7-F
22
1
D4
SBRS81100T3G
ON Semiconductor
SBRS81100T3G
23
1
D5
SS22T3G
ON Semiconductor
SS22T3G
24
8
D6, D7, D8, D9, D10, D11, D13,
D17
LED/GRN
OSRAM
LP M67K-E2G1-25
25
3
D12, D14, D15
RED
OSRAM
LS M67K-H2L1-1-0-2-R18-Z
26
1
D16
MMSZ5248ET1
ON Semiconductor
MMSZ5248BT1G
(3)
Diodes
(3)
KT33907-33908LUG User’s Guide Rev. 1.0 2/2015
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Freescale Semiconductor, Inc.
Board Layout
Table 11. Bill of Materials (1) (continued)
Item
Qty
Schematic Label
Value
Manufacturer
Part Number
Assy Opt
Connectors
27
7
J1, J4, J5, J8, J9, J15, J25
HDR 2X2
Samtec
TSW-102-07-G-D
28
10
J2, J10, J12, J14, J17, J26, J27,
J30, J31, J32
HDR 1X2
Samtec
TSW-102-07-T-S
29
1
J3
CON_1_PWR
CUI Stack
PJ-102AH
30
7
J6, J11, J13, J16, J18, J28, J29
HDR_1X3
Tyco Electronics
826629-3
31
3
J7, J21, J22
PLUG_1X2
Phoenix contact
1803277
32
1
J19
HDR 2X3
Tyco Electronics
1-87215-2
33
1
J20
HDR_10X2
Samtec
TSW-110-07-S-D
34
1
J23
HDR 2X5
Samtec
TSW-105-07-G-D
35
1
J24
NPPC082KFMS-R Sullins Electronics Corp
C
NPPC082KFMS-RC
36
1
JP1
PLUG_1X10
Phoenix contact
1803358
Inductors
37
1
L3
22μH
EPCOS
B82479G1223M000
(3)
38
1
L4
1.0 μH
EPCOS
B82472G6102M000
(3)
39
1
L5
2.2 μH
EPCOS
B82472G6222M000
Transistors
40
1
Q1
BUK9832-55A
NXP Semiconductors
BUK9832-55A,115
(3)
41
2
Q2, Q3
NJT4030P
ON Semiconductor
NJT4030PT3G
(3)
42
2
Q5, Q6
MMBF0201NLT1
G
ON Semiconductor
MMBF0201NLT1G
43
1
Q7
BSS84LT1
ON Semiconductor
BSS84LT1G
Resistors
44
1
R1
510 K
Bourns
CR0603-JW-511ELF
45
1
R2
18 K
KOA Speer
RK73H1JTTD1802F
46
10
R11, R24, R29, R41, R42, R43,
R44, R53, R63, R64
5.1 K
Vishay Intertechnology
CRCW06035K10JNEA
47
2
R13, RB3
4.32 K
KOA Speer
RK73H1JTTD4321F
48
2
R15, RA3
24.9 K
KOA Speer
RK73H1JTTD2492F
49
1
R17
5.0 K
Bourns
3224W-1-502E
50
1
R22
5.1 K
KOA Speer
RK73H1JTTD5101F
51
1
R23
12 K
Bourns
CR0603-JW-123ELF
52
1
R25
5.6 K
KOA Speer
RK73H1JTTD7151F
53
1
R26
0
Vishay Intertechnology
CRCW06030000Z0EA
54
1
R27
24 K
Panasonic
ERJ-3GEYJ243V
55
2
R28, R48
10 K
KOA Speer
RK73B1JTTD103J
KT33907-33908LUG User’s Guide Rev. 1.0 2/2015
Freescale Semiconductor, Inc.
33
Board Layout
Table 11. Bill of Materials (1) (continued)
Item
Qty
Schematic Label
Value
Manufacturer
Part Number
56
1
R30
11 K
KOA Speer
RK73H1JTTD1102F
57
5
R31, R33, R34, R39, R40
1.5 K
Bourns
CR0603-JW-152ELF
R32, R36, R37, R142
560 K
KOA Speer
RK73B1JTTD561J
58
59
3
R35, R45, R46, R52
510 K
KOA Speer
RC0603JR-07510KL
60
1
R38
5.6 K
KOA Speer
RK73B1JTTD562J
61
1
R47
1.2 K
KOA Speer
RK73H1JTTD1201F
62
1
R49
51 K
Vishay Intertechnology
CRCW060351K0JNEA
63
2
R50, R141
2.0 K
Yageo
RC1206JR-072KL
64
1
R51
60.4
KOA Speer
RK73H1JTTD60R4F
65
2
R67, R140
4.7
Bourns
CR0603-JW-4R7ELF
66
1
RA4
8.06 K
KOA Speer
RK73H1JTTD8061F
67
1
RB1
200 K
KOA Speer
RK73B1JTTD201J
68
1
RB2
39 K
KOA Speer
RK73H1JTTD3902F
Assy Opt
Switches
69
2
SW1, SW4
500SSP3S1M6QE E Switch
A
500SSP3S1M6QEA
70
2
SW2, SW3
SW_DIP-4_SM
Grayhill
78RB04ST
Test Points
71
12
TP2, TP3, TP4, TP5, TP18, TP19,
TP20, TP21, TP22, TP23, TP24,
TP25
TP_PTH
NOT A COMPONENT
NOT A COMPONENT
72
5
TP6, TP7, TP8, TP9, TP10
5006
Keystone Electronics
5006
73
7
TP11, TP12, TP13, TP14, TP15,
TP16, TP17
TESTLOOP_BLA
CK
Keystone Electronics
5011
74
15
TP26, TP27, TP28, TP29, TP30,
TP31, TP32, TP33, TP34, TP35,
TP36, TP37, TP38, TP39, TP40
TESTLOOP_RED Keystone Electronics
5010
(2)
Notes
1. Freescale does not assume liability, endorse, or warrant components from external manufacturers that are referenced in circuit drawings or tables.
While Freescale offers component recommendations in this configuration, it is the customer’s responsibility to validate their application.
2. Do not populate.
3. Critical components. For critical components, it is vital to use the manufacturer listed.
KT33907-33908LUG User’s Guide Rev. 1.0 2/2015
34
Freescale Semiconductor, Inc.
References
11
References
Following are URLs where you can obtain information on related Freescale products and application solutions:
Freescale.com Support
Pages
Description
URL
KIT33907LAEEVB
Tool Summary
Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KIT33907LAEEVB
MC33907
Product
Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC33907
KIT33908LAEEVB
Tool Summary
Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KIT33908LAEEVB
MC33908
Product
Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC33908
SPIGen
Software
http://www.freescale.com/files/soft_dev_tools/software/device_drivers/SPIGen.html
KITUSBSPIDGLEVME Interface Dongle http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITUSBSPIDGLEVME
11.1
Support
Visit www.freescale.com/support for a list of phone numbers within your region.
11.2
Warranty
Visit www.freescale.com/warranty for a list of phone numbers within your region.
KT33907-33908LUG User’s Guide Rev. 1.0 2/2015
Freescale Semiconductor, Inc.
35
Revision History
12
Revision History
Revision
Date
1.0
2/2015
Description of Changes
• Initial Release
KT33907-33908LUG User’s Guide Rev. 1.0 2/2015
36
Freescale Semiconductor, Inc.
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© 2015 Freescale Semiconductor, Inc.
Document Number: KT33907-33908LUG
Rev. 1.0
2/2015