INTEGRATED CIRCUITS DATA SHEET TDA6404; TDA6405; TDA6405A 5 V mixer/oscillator-PLL synthesizers for hyperband tuners Product specification Supersedes data of 1998 Jan 19 File under Integrated Circuits, IC02 1999 Jan 13 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A FEATURES • Single chip 5 V mixer/oscillator-PLL synthesizer for hyperband tuners • I2C-bus protocol • 3 PNP band switch buffers (25 mA) • 33 V tuning voltage output The PLL synthesizer consists of a divide-by-eight prescaler, a 15-bit programmable divider, a 4 MHz crystal oscillator and its programmable reference divider and a phase comparator combined with a charge pump which drives the tuning amplifier, including 33 V output. • In-lock detector • 5-level Analog-to-Digital Converter (ADC) • 15-bit programmable divider • Programmable reference divider ratio (512, 640 or 1024) Depending on the reference divider ratio (512, 640 or 1024), the phase comparator operates at 7.8125 kHz, 6.25 kHz or 3.90625 kHz. • Programmable charge pump current • Balanced mixer with a common emitter input for VHF (single input) The devices are controlled according to the I2C-bus format. The in-lock detector bit FL is set to logic 1 when the loop is locked and is read on the SDA line (status byte) during a read operation. The ADC input is available for digital Automatic Frequency Control (AFC). The ADC code is read during a read operation on the I2C-bus (see Table 9). In test mode, pin ADC is used as a test output for fREF and 1⁄2fDIV. • Balanced mixer with a common base input for UHF (double input) • 4-pin common emitter oscillator for VHF • 4-pin common emitter oscillator for UHF • IF amplifier with a low output impedance to drive a SAW filter directly (≈2 kΩ load) When the charge pump current switch mode is activated and the loop is phase-locked the charge pump current value is automatically switched to LOW. This is to improve carrier-to-noise ratio. The status of this feature can be read in the ACPS flag during a read operation on the I2C-bus (see Table 7). • Low power, low radiation, small size APPLICATIONS • Hyperband tuners for Europe using a 2-band mixer/oscillator in a switched concept. Five serial bytes (including address byte) are required for the I2C-bus format to address the devices, select the VCO frequency, program the three PNP ports, set the charge pump current and to set the reference divider ratio. The devices have four independent I2C-bus addresses which can be selected by applying a specific voltage on the AS input (see Table 4). GENERAL DESCRIPTION The TDA6404, TDA6405 and TDA6405A are programmable 2-band mixer/oscillator-PLL synthesizers intended for VHF/UHF and hyperband tuners (see Fig.1). The devices include two double balanced mixers and two oscillators for the VHF and UHF band, an IF amplifier and a PLL synthesizer. With proper oscillator application and by using a switchable inductor to split the VHF band into two sub-bands (the full VHF/UHF and hyperband) the TV bands can be covered. Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling. Three PNP ports are provided for band switching. Band selection is made according to the band switch bits VHFL, VHFH and UHF. 1999 Jan 13 2 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage operating 4.5 5 5.5 V ICC supply current all PNP ports are ‘OFF’ − 78 − mA fXTAL crystal oscillator frequency RXTAL = 25 to 150 Ω 3.2 4.0 4.48 MHz Io(PNP) PNP port output current − − 25 mA Tstg IC storage temperature −40 − +150 °C Tamb operating ambient temperature −20 − +85 °C f(i)RF RF input frequency VHF band 45.25 − 399.25 MHz UHF band 407.25 − 855.25 MHz GV voltage gain VHF band − 27 − dB UHF band − 38 − dB F noise figure Vo output voltage causing 1% cross modulation in channel VHF band − 8 − dB UHF band − 8.5 − dB VHF band − 119 − dBµV UHF band − 118 − dBµV ORDERING INFORMATION TYPE NUMBER TDA6404TS; TDA6405TS; TDA6405ATS 1999 Jan 13 PACKAGE NAME SSOP28 DESCRIPTION plastic shrink small outline package; 28 leads; body width 5.3 mm 3 VERSION SOT341-1 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A BLOCK DIAGRAM IFFIL1 handbook, full pagewidth VCC IFFIL2 5 (24) 6 (23) 17 (12) (4) 25 BSVHF (3) 26 VHFIN RF INPUT VHF 3 (26) VHF MIXER VHF OSCILLATOR (2) 27 (1) 28 RFGND 4 (25) VHFOSCOC1 VHFOSCOC2 VHFOSCIB2 BSVHF (11) 18 BS VHFOSCIB1 IF AMPLIFIER ELECTRONIC BAND SWITCH (10) 19 IFOUT1 IFOUT2 BSUHF (5) 24 BSUHF UHFIN1 UHFIN2 (6) 23 1 (28) RF INPUT UHF 2 (27) UHF MIXER UHF OSCILLATOR (7) 22 (8) 21 (15) 14 UHFOSCIB2 UHFOSCOC2 UHFOSCOC1 UHFOSCIB1 CP (14) 15 XTAL 16 (13) XTAL OSCILLATOR 4 MHz fREF REFERENCE DIVIDER 512, 640, 1024 TUNING AMPLIFIER CHARGE PUMP fDIV RSB RSA VT DIGITAL PHASE COMPARATOR T2, T1, T0 CHP PRESCALER DIVIDE BY 8 15-BIT PROGRAMMABLE DIVIDER POWER-ON RESET 15-BIT FREQUENCY REGISTER OS IN-LOCK DETECTOR TDA6404 TDA6405 TDA6405A FL 1/2fDIV LOGIC 7-BIT CONTROL REGISTER FL CHP SCL SDA AS 12 (17) 11 (18) 10 (19) SCL SDA T1 VHFL FL T0 RSA RSB OS 3-BIT BAND SWITCH REGISTER I2C-BUS TRANSCEIVER AS 5-LEVEL A/D CONVERTER T2 VHFH UHF (9) 20 fREF 1/2fDIV GATE VCC BS T2, T1, T0 13 (16) 7 (22) ADC PVHFL The pin numbers in parenthesis represent the TDA6405 and TDA6405A. Fig.1 Block diagram. 1999 Jan 13 4 8 (21) PVHFH 9 (20) PUHF MGK813 GND Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A PINNING PIN SYMBOL DESCRIPTION TDA6404 TDA6405; TDA6405A UHFIN1 1 28 UHF input 1 UHFIN2 2 27 UHF input 2 VHFIN 3 26 VHF input RFGND 4 25 RF ground IFFIL1 5 24 IF filter output 1 IFFIL2 6 23 IF filter output 2 PVHFL 7 22 PNP port output for VHF low band PVHFH 8 21 PNP port output for VHF high band PUHF 9 20 PNP port output for UHF band AS 10 19 address selection input SDA 11 18 serial data input/output (I2C-bus) SCL 12 17 serial clock input (I2C-bus) ADC 13 16 Analog-to-Digital Converter input/output CP 14 15 charge pump output VT 15 14 tuning output XTAL 16 13 crystal oscillator input VCC 17 12 supply voltage IFOUT1 18 11 IF amplifier output 1 IFOUT2 19 10 IF amplifier output 2 GND 20 9 ground UHFOSCIB1 21 8 UHF oscillator base input 1 UHFOSCOC1 22 7 UHF oscillator collector output 1 UHFOSCOC2 23 6 UHF oscillator collector output 2 UHFOSCIB2 24 5 UHF oscillator base input 2 VHFOSCIB1 25 4 VHF oscillator base input 1 VHFOSCOC1 26 3 VHF oscillator collector output 1 VHFOSCOC2 27 2 VHF oscillator collector output 2 VHFOSCIB2 28 1 VHF oscillator base input 2 1999 Jan 13 5 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners handbook, halfpage TDA6404; TDA6405; TDA6405A handbook, halfpage UHFIN1 1 28 VHFOSCIB2 VHFOSCIB2 1 28 UHFIN1 UHFIN2 2 27 VHFOSCOC2 VHFOSCOC2 2 27 UHFIN2 VHFIN 3 26 VHFOSCOC1 VHFOSCOC1 3 26 VHFIN RFGND 4 25 VHFOSCIB1 VHFOSCIB1 4 25 RFGND IFFIL1 5 24 UHFOSCIB2 UHFOSCIB2 5 24 IFFIL1 IFFIL2 6 23 UHFOSCOC2 UHFOSCOC2 6 23 IFFIL2 22 UHFOSCOC1 UHFOSCOC1 7 21 UHFOSCIB1 UHFOSCIB1 8 PVHFL 7 TDA6404 PVHFH 8 PUHF 9 20 PUHF GND 9 20 GND AS 10 19 IFOUT2 IFOUT2 10 19 AS SDA 11 18 IFOUT1 IFOUT1 11 18 SDA SCL 12 17 VCC VCC 12 17 SCL ADC 13 16 XTAL XTAL 13 16 ADC CP 14 VT 14 15 VT 15 CP MGK831 MGK830 Fig.2 Pin configuration for TDA6404. Fig.3 Pin configuration for TDA6405(A) The first bit of the data byte transmitted indicates whether frequency data (first bit = 0) or control and band switch data (first bit = 1) will follow. Until an I2C-bus STOP condition is sent by the controller, additional data bytes can be entered without the need to re-address the devices. The frequency register is loaded after the 8th clock pulse of the second divider byte (DB2). The control register is loaded after the 8th clock pulse of the CB. The band switch register is loaded after the 8th clock pulse of the band switch byte (BB). FUNCTIONAL DESCRIPTION The devices are controlled via the I2C-bus. For programming, there is one module address (7 bits) and the R/W bit for selecting the read or write mode. Write mode Data bytes can be sent to the devices after the address transmission (first byte) by setting the R/W bit to logic 0. Four data bytes are needed to fully program the devices. The I2C-bus transceiver has an auto-increment facility which permits the programming of the devices within one single transmission (address + 4 data bytes). The devices can also be partially programmed, providing that the first data byte following the address is divider byte 1 (DB1) or control byte (CB). The bits in the data bytes are defined in Tables 1 and 2. 1999 Jan 13 TDA6405 22 PVHFL TDA6405A 21 PVHFH 6 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners Table 1 TDA6404; TDA6405; TDA6405A I2C-bus mode, write data format for the TDA6404 and TDA6405 BITS NAME BYTE ACK MSB LSB Address byte ADB 1 1 0 0 0 MA1 MA0 R/W = 0 A Divider byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A Divider byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A Control byte CB 1 CHP T2 T1 T0 RSA RSB OS A Band-switch byte BB X X X X X UHF VHFH VHFL A Table 2 I2C-bus mode, write data format for the TDA6405A BITS NAME BYTE ACK MSB Address byte ADB Divider byte 1 Divider byte 2 LSB 1 1 0 0 0 MA1 MA0 R/W = 0 DB1 0 N14 N13 N12 N11 N10 N9 N8 A DB2 N7 N6 N5 N4 N3 N2 N1 N0 A Control byte CB 1 CHP T2 T1 T0 RSA RSB OS A Band-switch byte BB X X X X UHF X VHFH VHFL A A I2C-bus address selection The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several synthesizers (up to 4) in one system by applying a specific voltage on the AS input. The relationship between MA1 and MA0 and the input voltage applied to the AS input is given in Table 4. Table 3 Description of symbols used in Tables 1 and 2 SYMBOL DESCRIPTION A acknowledge MA1 and MA0 programmable address bits (see Table 4) N14 to N0 programmable divider bits; N = N14 × 214 + N13 × 213 + ... + N1 × 21 + N0 CHP charge pump current bit: CHP = 0; ICP = 60 µA CHP = 1; ICP = 280 µA (default) T2, T1 and T0 test bits (see Table 5) RSA and RSB reference divider ratio select bits (see Table 6) OS tuning amplifier control bit: OS = 0; normal operation; tuning voltage is ‘ON’ OS = 1; tuning voltage is ‘OFF’ (high-impedance) UHF, VHFH and VHFL PNP ports control bits: bit = 0; buffer n is ‘OFF’ (default) bit = 1; buffer n is ‘ON’ X 1999 Jan 13 don’t care bit: may be a logic 0 or a logic 1 7 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners Table 4 TDA6404; TDA6405; TDA6405A Address selection I2C-bus MA1 MA0 VOLTAGE APPLIED ON AS INPUT 0 0 0 to 0.1VCC 0 1 open or 0.2VCC to 0.3VCC 1 0 0.4VCC to 0.6VCC 1 1 0.9VCC to 1.0VCC Table 5 Test mode T2 T1 T0 0 0 0 automatic charge pump off 0 0 1 automatic charge pump on; note 1 0 1 X charge pump is ‘OFF’ 1 1 0 charge pump is sinking current 1 1 1 charge pump is sourcing current 1 0 0 fREF is available on pin ADC; note 2 1 0 1 1⁄ TEST MODES 2fDIV is available on pin ADC; note 2 Notes 1. This is the default mode at Power-on reset. 2. The ADC input cannot be used when these test modes are active. Table 6 Reference divider ratio select bits RSA RSB REFERENCE DIVIDER RATIO FREQUENCY STEP (kHz) X 0 640 6.25 0 1 1024 3.90625 1 1 512 7.8125 The ACPS flag is LOW when the automatic charge pump switch mode is ‘ON’ and the loop is locked. In other conditions, ACPS = 1. When ACPS = 0, the charge pump current is forced to the LOW value. Read mode Data can be read from the devices by setting the R/W bit to logic 1 (see Tables 7 and 8). After the slave address has been recognized, the devices generate an acknowledge pulse and the first data byte (status byte) is transferred on the SDA line (MSB first). Data is valid on the SDA line during a HIGH-level of the SCL clock signal. A second data byte can be read from the devices if the processor generates an acknowledge on the SDA line (master acknowledge). End of transmission will occur if no master acknowledge occurs. The devices will then release the data line to allow the processor to generate a STOP condition. The POR flag is set to logic 1 at power-on. The flag is reset when an end-of-data is detected by the devices (end of a read sequence). Control of the loop is made possible with the in-lock flag FL which indicates when the loop is locked (FL = 1). 1999 Jan 13 A built-in ADC is available on ADC pin. This converter can be used to apply AFC information to the controller from the IF section of the television. The relationship between the bits A2, A1 and A0 is given in Table 9. 8 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners Table 7 TDA6404; TDA6405; TDA6405A Read data format BITS NAME Address byte Status byte BYTE ACK MSB(1) LSB ADB 1 1 0 0 0 MA1 MA0 R/W = 1 A SB POR FL ACPS 1 1 A2 A1 A0 − Note 1. MSB is transmitted first. Table 8 Description of symbols used in Table 7 SYMBOL DESCRIPTION A acknowledge POR Power-on reset flag (POR = 1 at power-on) FL in-lock flag (FL = 1 when the loop is locked) ACPS automatic charge pump switch flag: ACPS = 0; active ACPS = 1; not active A2, A1 and A0 Table 9 digital outputs of the 5-level ADC (see Table 9) Analog-to-digital converter levels; note 1 A2 A1 A0 VOLTAGE APPLIED ON ADC INPUT 1 0 0 0.60VCC to 1.00VCC 0 1 1 0.45VCC to 0.60VCC 0 1 0 0.30VCC to 0.45VCC 0 0 1 0.15VCC to 0.30VCC 0 0 0 0 to 0.15VCC Note 1. Accuracy is ±0.03VCC. PUHF is ‘OFF’, which means that the UHF oscillator and the UHF mixer are switched off. Consequently, the VHF oscillator and the VHF mixer are switched on. PVHFL and PVHFH are ‘OFF’, which means that the VHF tank circuit is working in the VHF I sub-band. The tuning amplifier is switched off until the first transmission. In that case, the tank circuit in VHF I is supplied with the maximum tuning voltage. The oscillator is therefore working at the end of the VHF I sub-band. Power-on reset The power-on detection threshold voltage VPOR is set to VCC = 2 V at room temperature. Below this threshold, the device is reset to the power-on state. At power-on state, the charge pump current is set to 280 µA, the tuning voltage output is disabled, the test bits T2, T1 and T0 are set to logic 001 (automatic charge pump switch ‘ON’) and RSB is set to logic 1. 1999 Jan 13 9 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A Table 10 Default bits at Power-on reset BITS NAME BYTE MSB Address byte ADB Divider byte 1 DB1 Divider byte 2 DB2 Control byte CB Band-switch byte BB 1 LSB 1 0 0 0 MA1 MA0 X 0 X X X X X X X X X X X X X X X 1 1 0 0 1 X 1 0 X X X X 0 0 0 0 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134) (note 1). SYMBOL PARAMETER MIN. MAX. UNIT VCC supply voltage −0.3 +6 V VO(n) output voltage on pins PVHFL, PVHFH and PUHF −0.3 +6 V IO(n) output current on pins PVHFL, PVHFH and PUHF −1 +30 mA VO(CP) charge pump output voltage −0.3 +6 V VO(VT) tuning output voltage −0.3 +35 V VI/O(ADC) ADC input/output voltage −0.3 +6 V VI(SCL) serial clock input voltage −0.3 +6 V VI/O(SDA) serial data input/output voltage −0.3 +6 V IO(SDA) data output current −1 +10 mA VI(AS) address selection input voltage −0.3 +6 V VI(XTAL) crystal oscillator input voltage −0.3 +6 V IO(n) output current of each pin to ground: for TDA6404, pins 1 to 6 and 17 to 28 − −10 mA for TDA6405 and TDA6405A, pins 1 to 12 and 23 to 28 − −10 mA tsc(max) maximum short-circuit time (all pins to VCC and all pins to GND, RFGND) − 10 s Tstg IC storage temperature −40 +150 °C Tamb operating ambient temperature −20 +85 °C Tj junction temperature − 150 °C Note 1. Maximum ratings can not be exceeded, not even momentarily without causing irreversible IC damage. Maximum ratings can not be accumulated. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 1999 Jan 13 PARAMETER CONDITIONS thermal resistance from junction to ambient in free air 10 TYPICAL UNIT 85 K/W Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply (Tamb = 25 °C) VCC supply voltage 4.5 5 5.5 V ICC supply current at VCC = 5 V all PNP ports are ‘OFF’ − 78 86 mA − 110 121 mA V one PNP port is ‘ON’, sourcing 25 mA PLL Synthesizer part (VCC = 4.5 to 5.5 V; Tamb = −20 to +85 °C; unless otherwise specified) FUNCTIONAL RANGE 1.5 2.0 − 256 − 32767 3.2 4 4.48 MHz 600 1200 − Ω VCC = 5.5 V; VPNPn = 0 −10 − − µA output saturation voltage one PNP port is ‘ON’, sourcing 25 mA; VPNPn(sat) = VCC − VPNPn − 0.25 0.4 V VI ADC input voltage see Table 9 0 − VCC V IIH HIGH-level input current VADC = VCC − − 10 µA IIL LOW-level input current VADC = 0 −10 − − µA VPOR Power-on reset voltage below this supply voltage Power-on reset becomes active; see Table 10 D/D divider ratio 15-bit frequency word fXTAL crystal oscillator frequency RXTAL = 25 to 150 Ω ZXTAL input impedance fXTAL = 4 MHz IL(off) leakage current VO(sat) PNP PORTS ADC INPUT ADDRESS SELECTION INPUT (AS) VIL LOW-level input voltage 0 − 1.5 V VIH HIGH-level input voltage 3 − 5.5 V IIH HIGH-level input current VAS = 5.5 V − − 10 µA IIL LOW-level input current VAS = 0 −10 − − µA SCL AND SDA INPUTS VIL LOW-level input voltage 0 − 1.5 V VIH HIGH-level input voltage 3.0 − 5.5 V IIH HIGH-level input current Vbus = 5.5 V; VCC = 0 − − 10 µA Vbus = 5.5 V; VCC = 5.5 V − − 10 µA IIL fSCL LOW-level input current Vbus = 1.5 V; VCC = 0 − − 10 µA Vbus = 0; VCC = 5.5 V −10 − − µA − 100 150 kHz serial clock frequency SDA OUTPUT IL leakage current VSDA = 5.5 V − − 10 µA VO output voltage ISDA = 3 mA (sink current) − − 0.4 V 1999 Jan 13 11 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners SYMBOL PARAMETER TDA6404; TDA6405; TDA6405A CONDITIONS MIN. TYP. MAX. UNIT CHARGE PUMP OUTPUT (CP) IIH HIGH-level input current CHP = 1 − 280 − µA IIL LOW-level input current CHP = 0 − 60 − µA VO output voltage PLL is locked; Tamb = 25 °C − 1.95 − V IL(off) off-state leakage current T2 = 0; T1 = 1 −15 −0.5 +15 nA TUNING VOLTAGE OUTPUT (VT) IL(off) off-state leakage current OS = 1; tuning supply = 33 V − − 10 µA VO output voltage when the loop is closed OS = 0; T2 = 0; T1 = 0; T0 = 1; RL = 27 kΩ; tuning supply = 33 V 0.2 − 32.7 V Mixer/oscillator part (VCC = 5 V; Tamb = 25 °C; unless otherwise specified); measured in Fig.11 IF AMPLIFIER S22 output reflection coefficient magnitude at 36.15 MHz; Zo = 50 Ω − −12.5 − dB phase at 36.15 MHz; Zo = 50 Ω − 1.41 − deg Rs real part of Zo = Rs + jωLs Rs at 36.15 MHz − 81 − Ω Ls imaginary part of Zo = Rs + jωLs Ls at 36.15 MHz − 9.5 − nH VHF MIXER (INCLUDING IF AMPLIFIER) fi(RF) RF input frequency picture carrier frequency 45.25 − 399.25 MHz F noise figure fRF = 50 MHz; see Figs 8 and 9 − 7 9 dB fRF = 150 MHz; see Figs 8 and 9 − 8 10 dB fRF = 300 MHz; gos gi − 9 11 dB optimum source conductance for noise figure fRF = 50 MHz − 0.7 − mS fRF = 150 MHz − 0.9 − mS fRF = 300 MHz − 1.5 − mS input conductance fRF = 45.25 MHz − 0.25 − mS fRF = 399.25 MHz − 0.5 − mS Ci input capacitance fRF = 45.25 to 399.25 MHz − 2 − pF Vo output voltage causing 1% cross modulation in channel fRF = 45.25 MHz; see Fig.6 116 119 − dBµV fRF = 399.25 MHz; see Fig.6 116 119 − dBµV − 88 − dBµV Vi input voltage causing fRF = 399.25 MHz; note 1 pulling in channel (750 Hz) GV voltage gain fRF = 45.25 MHz; see Fig.4 24.5 27 29.5 dB fRF = 399.25 MHz; see Fig.4 24.5 27 29.5 dB 84.15 VHF OSCILLATOR fosc oscillator frequency ∆fosc(V) oscillator frequency shift with supply voltage 1999 Jan 13 − 438.15 MHz ∆VCC = 5%; worst case in the frequency − range; note 2 100 200 kHz ∆VCC = 10%; worst case in the frequency range; note 2 200 − kHz 12 − Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners SYMBOL PARAMETER TDA6404; TDA6405; TDA6405A CONDITIONS MIN. TYP. MAX. UNIT ∆fosc(T) oscillator frequency drift with temperature ∆T = 25 °C with compensation; worst case in the frequency range; note 3 − 1300 2000 kHz ∆fosc(t) oscillator frequency drift with time with compensation; worst case in the frequency range; note 4 − 600 900 kHz Φosc phase noise, carrier to noise sideband ±100 kHz frequency offset; worst case in the frequency range − 106 − dBc/Hz RSC(p-p) ripple susceptibility of VCC (peak-to-peak value) VCC = 5 V; worst case in the frequency 15 range; ripple frequency 500 kHz; note 5 40 − mV UHF MIXER (INCLUDING IF AMPLIFIER) fi(RF) RF input frequency picture carrier frequency 407.25 − 855.25 MHz F noise figure fRF = 407.25 MHz; not corrected for image; see Fig.10 − 8 10 dB fRF = 855.25 MHz; not corrected for image; see Fig.10 − 9 11 dB fRF = 407.25 MHz − 30 − Ω fRF = 855.25 MHz − 38 − Ω fRF = 407.25 MHz − 9 − nH fRF = 855.25 MHz − 6 − nH fRF = 407.25 MHz; see Fig.7 116 119 − dBµV fRF = 855.25 MHz; see Fig.7 114 117 − dBµV Rs real part of Zi = Rs + jωLs Ls imaginary part of Zi = Rs + jωLs Vo output voltage causing 1% cross modulation in channel Vi input voltage causing fRF = 855.25 MHz; note 1 pulling in channel (750 Hz) − 78 − dBµV GV voltage gain fRF = 407.25 MHz; see Fig.5 35 38 41 dB fRF = 855.25 MHz; see Fig.5 35 38 41 dB UHF OSCILLATOR fosc oscillator frequency ∆fosc(V) oscillator frequency shift with supply voltage 446.15 − 894.15 MHz ∆VCC = 5%; worst case in the frequency − range; note 2 30 80 kHz ∆VCC = 10%; worst case in the frequency range; note 2 − 80 − kHz ∆fosc(T) oscillator frequency drift with temperature ∆T = 25 °C; with compensation; worst case in the frequency range; note 3 − 600 1000 kHz ∆fosc(t) oscillator frequency drift with time with compensation; worst case in the frequency range; note 4 − 200 400 kHz Φosc phase noise, carrier to noise sideband ±100 kHz frequency offset; worst case in the frequency range − 106 − dBc/Hz RSC(p-p) ripple susceptibility of VCC (peak-to-peak value) VCC = 5 V; worst case in the frequency 15 range; ripple frequency 500 kHz; note 5 20 − mV 1999 Jan 13 13 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners SYMBOL PARAMETER TDA6404; TDA6405; TDA6405A CONDITIONS MIN. TYP. MAX. UNIT REJECTION AT THE IF AMPLIFIER OUTPUT INTDIF level of divider interferences in the IF signal note 6 − 20 − dBµV INTRXTAL crystal oscillator interferences rejection note 7 60 − − dBc INTRFREF reference frequency rejection note 8 50 − − dBc INTCHX channel x beat note 9 60 − − dBc INTS02 S02 beat note 10 66 − − dBc Notes 1. This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency deviation on the oscillator signal; it produces sidebands 30 dB below the level of the oscillator signal. 2. The frequency shift is defined as the change of the oscillator frequency when the supply voltage varies from VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free-running during this measurement. 3. The frequency drift is defined as the change of the oscillator frequency when the ambient temperature varies from Tamb = 25 to 0 °C or from Tamb = 25 to 50 °C. The oscillator is free-running during this measurement. 4. The switching on drift is defined as the change of the oscillator frequency between 5 seconds and 15 minutes after switching on. The oscillator is free-running during this measurement. 5. The ripple susceptibility is measured for a 500 kHz ripple at the IF amplifier output using the measurement circuit; the level of the ripple signal is increased until a difference of 53.5 dB between the IF carrier set at 100 dBµV and the sideband components is reached. 6. This is the level of divider interferences close to the IF frequency. For example: Ch S1: fosc = 144.15 MHz and 1⁄4fosc = 36.0375 MHz. Ch S2: fosc = 151.15 MHz and 1⁄4fosc = 37.7875 MHz. Ch S14: fosc = 291.15 MHz and 1⁄8fosc = 36.39375 MHz. The VHF RF input must be left open (i.e. not connected to any load or cable). The UHF RF inputs are connected to a hybrid. 7. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection should be >60 dB for an IF output signal of 100 dBµV. 8. The reference frequency rejection is the level of reference frequency sidebands related to the sound subcarrier. The rejection should be >50 dB for an IF output signal of 100 dBµV, fREF = 7.8125 kHz. 9. Channel x beat: picture carrier frequency (69.25 MHz) and sound carrier frequency (74.75 MHz) both at 80 dBµV, fosc at 108.15 MHz. The rejection of the interfering product RF picture carrier frequency + RF sound carrier frequency − fosc at 35.85 MHz should be >60 dB. 10. Channel S02: picture carrier frequency is 76.25 MHz at 80 dBµV, fosc = 115.15 MHz. The rejection of fosc − 2 × fIF = 37.35 MHz should be >66 dB. 1999 Jan 13 14 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A TEST AND APPLICATION INFORMATION handbook, full pagewidth 50 Ω signal source VHFIN e Vmeas V 50 Ω Vo D.U.T. Vi T IFOUT1 spectrum analyzer (1) (2) N1 N2 C V'meas 50 Ω IFOUT2 RMS voltmeter MGK828 (1) N1 is 2 × 5 turns (2) N2 is 2 turns Zi >> 50 Ω ⇒ Vi = 2 × Vmeas; Vi = 80 dBµV N1 Vo = V’meas + 16 dB (transformer ratio -------- = 5 and transformer loss) N2 Vo Gv = 20 log -----Vi Fig.4 Voltage gain (Gv) measurement in the VHF band. signal source handbook, full pagewidth 50 Ω e A Vmeas V 50 Ω Vi C UHFIN1 HYBRID B D D.U.T. UHFIN2 T IFOUT1 Vo (1) (2) N1 N2 C V'meas 50 Ω IFOUT2 RMS 50 Ω voltmeter MGK829 (1) N1 is 2 × 5 turns (2) N2 is 2 turns Vi = Vmeas; Vi = 70 dBµV N1 Vo = V’meas + 16 dB (transformer ratio -------- = 5 and transformer loss) N2 Vo Gv = 20 log ------ + 1 dB (1 dB = correction for hybrid loss) Vi Fig.5 Voltage gain (Gv) measurement in the UHF band. 1999 Jan 13 spectrum analyzer 15 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A handbook, full pagewidth Vmeas 50 Ω V RMS voltmeter unwanted signal 50 Ω source A C Vo B D.U.T. Vi (2) N1 N2 C modulation analyzer 50 Ω V V'meas MGL275 IFOUT2 D wanted signal source ew 38.9 MHz (1) HYBRID 50 Ω T VHFIN IFOUT1 AM = 30% eu FILTER 18 dB attenuator RMS voltmeter 50 Ω (1) N1 is 2 × 5 turns (2) N2 is 2 turns N1 Zi >> 50 Ω ⇒ Vi = 2 × Vmeas; V’meas = Vo − 16 dB (transformer ratio -------- = 5 and transformer loss) N2 Wanted input signal Vi = 80 dBµV at wanted fRF = 45.25 MHz (399.25 MHz). Measured level of the unwanted output signal Vou causing 0,3% AM modulation in the wanted output signal; unwanted fRF = 50.75 MHz (404.75 MHz); Vou = V’meas + 16 dB. Fig.6 Cross modulation measurement in the VHF band. handbook, full pagewidth Vmeas 50 Ω V RMS voltmeter unwanted signal 50 Ω source A C A C FILTER T UHFIN1 IFOUT1 AM = 30% eu HYBRID 50 Ω ew B wanted signal source HYBRID Vi D B 50 Ω D D.U.T. 18 dB attenuator Vo (1) (2) N1 N2 C 38.9 MHz V RMS voltmeter (1) N1 is 2 × 5 turns (2) N2 is 2 turns N1 Vi = Vmeas; V’meas = Vo − 16 dB (transformer ratio -------- = 5 and transformer loss) N2 Wanted input signal Vi = 70 dBµV at fRF = 407.25 MHz (855.25 MHz). Measured level of the unwanted output signal Vou causing 0,3% AM modulation in the wanted output signal; unwanted fRF = 412.75 MHz (860.75 MHz); Vou = V’meas + 16 dB. Fig.7 Cross modulation measurement in the UHF band. 1999 Jan 13 16 50 Ω MGL276 UHFIN2 IFOUT2 50 Ω modulation analyzer Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners I1 handbook, full pagewidth I3 PCB C1 BNC L1 TDA6404; TDA6405; TDA6405A BNC plug C2 PCB C3 plug I2 RIM-RIM RIM-RIM C4 (a) (b) (a) For fRF = 50 MHz: VHF mixer frequency response measured = 57 MHz; loss = 0 dB. Image suppression = 16 dB. C1 = 9 pF; C2 = 15 pF. L1 = 7 turns (Ø 5.5 mm; wire Ø = 0.5 mm). I1 = semi rigid cable (RIM): 5 cm long. (semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m). MBE286 - 1 (b) For fRF = 150 MHz: VHF mixer frequency response measured = 150.3 MHz; loss = 1.3 dB. Image suppression = 13 dB. C3 = 5 pF; C4 = 25 pF. I2 = semi rigid cable (RIM): 30 cm long. I3 = semi rigid cable (RIM): 5 cm long (semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m). Fig.8 Input circuit for optimum noise figure in the VHF band. handbook, full pagewidth NOISE SOURCE BNC RIM INPUT CIRCUIT T VHFIN IFOUT1 D.U.T. NOISE FIGURE METER C IFOUT2 MGL277 F = Fmeas − loss (of input circuit) (dB). Fig.9 Noise figure (F) measurement in the VHF band. 1999 Jan 13 17 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A handbook, full pagewidth NOISE SOURCE A C HYBRID B D T UHFIN1 IFOUT1 D.U.T. C UHFIN2 IFOUT2 MGL278 50 Ω Loss (in hybrid) = 1 dB. F = Fmeas − loss (in hybrid). Fig.10 Noise figure (F) measurement in the UHF band. 1999 Jan 13 NOISE FIGURE METER 18 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A handbook, full pagewidth P1 C1 UHFIN1 UHF1 1 (28) (1) 28 C2 VHFOSCIB2 L1 BB149 1 µH 150 pF 1 nF D1 P2 C3 UHFIN2 UHF2 2 (27) (2) 27 C6 VHFIN VHF 3 (26) (3) 26 RFGND 1 15 pF VHFL LED-3R D6 VHFH LED-3Y D7 UHF LED-3G IFFIL1 C11 C13 IFFIL2 3 R8 (4) 25 5 (24) (5) 24 (6) 23 6 (23) UHFOSCIB2 22 kΩ C9 100 pF R10 C5 R1 1.5 kΩ 4.7 nF R3 22 kΩ L4 80 nH D3 BA792 R4 1.5 kΩ C10 R5 2.7 kΩ C12 R7 1 pF 22 kΩ R6 22 kΩ D4 BB149 C15 C16 47 pF L6 30 nH C18 10 pF R9 4.7 kΩ C17 1 pF R11 PUHF J1 J2 J3 9 (20) (9) 20 10 (19) (10) 19 GND for test purpose only J4 J7 PLL VHFL UHF VHFH AS R12 SDA 330 Ω VCC R13 SCL 330 Ω VCC (11) 18 11 (18) (12) 17 12 (17) C19 L9 1 nF 80 nH IFOUT2 L8 80 nH 3 IF OUT 4 8 L7 C22 VCC C24 13 (16) (13) 16 C23 XTAL 10 nF VCC 4 MHz 18 pF TR1 BC847B P4 2 C21 18 pF C20 6 10 nF ADC P5 +VCC 7 1 1 nF IFOUT1 X1 J5 CP (14) 15 14 (15) P6 R14 22 kΩ VT R15 33 kΩ R17 1.2 kΩ C27 10 µF C28 (16 V) R22 C25 C26 100 nF 2.2 nF 10 µF (16 V) R19 330 Ω 50 Ω P9 Vripple P7 1 2 SCL 3 4 5 6 J6 +5 V P10 C29 10 nF fREF TR2 BC847B for test purpose only The pin numbers in parenthesis represent the TDA6405 and TDA6405A. Fig.11 Measurement circuit. 19 R16 22 kΩ R18 1 kΩ R20 68 kΩ SDA GND 1999 Jan 13 4.7 nF L5 16 nH 1 pF 1 pF C30 VHFH VHFL 4.7 nF C14 UHFOSCOC2 7 (22) TDA6404 (7) 22 (TDA6405) (TDA6405A) PVHFH UHFOSCIB1 (8) 21 8 (21) 330 Ω for test purpose only 22 kΩ C8 VHFOSCIB1 UHFOSCOC1 PVHFL 330 Ω 330 Ω 4 (25) 15 pF 8 D5 R2 2.2 pF 2 4 R21 2.2 pF L3 TOKO 7 km L value/C value 7 C7 VHFOSCOC1 1 nF 6 L2 30 nH D2 BB152 2.2 pF 1 nF P3 C4 VHFOSCOC2 +VCC 1 AGND 2 3 4 P8 +VCC +33 V +5 V MGK812 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A Component values for measurement circuit Table 11 Capacitors (all SMD and NP0 unless otherwise specified) COMPONENT Table 12 Resistors (all SMD) COMPONENT VALUE VALUE 1 nF R1 1.5 kΩ C2 150 pF R2 22 kΩ C3 1 nF R3 22 kΩ C4 2.2 pF (N750) R4 1.5 kΩ C5 4.7 nF R5 2.7 kΩ C6 1 nF R6 22 kΩ C7 2.2 pF (N750) R7 22 kΩ C8 2.2 pF (N750) R8 330 Ω C9 100 pF (N750) R9 4.7 kΩ C10 4.7 nF R10 330 Ω C11 15 pF R11 330 Ω C12 1 pF (N750) R12 330 Ω C13 15 pF R13 330 Ω C14 1 pF (N750) R14 22 kΩ C15 47 pF R15 33 kΩ C16 1 pF (N750) R16 22 kΩ C17 1 pF (N750) R17 1.2 kΩ C18 10 pF (N750) R18 1 kΩ C19 1 nF R19 330 Ω C20 1 nF R20 68 kΩ C21 18 pF R21 22 kΩ C22 10 nF R22 50 Ω C23 18 pF C24 10 nF C25 100 nF C26 2.2 nF C27 10 µF (16 V; electrolytic) C1 C28 10 µF (16 V; electrolytic) C29 10 nF C30 4.7 nF 1999 Jan 13 20 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners Table 13 Diodes and ICs TDA6404; TDA6405; TDA6405A Table 15 Transformer COMPONENT COMPONENT VALUE D1 BB149 D2 BB152 D3 BA792 D4 BB149 D5 LED-3R D6 LED-3Y D7 LED-3G IC TDA6404; TDA6405; TDA6405A VALUE L3 23 turns (TOKO, wire 0.07 mm) L7 N1 = 2 × 5 turns N2 = 2 turns (TOKO, wire 0.09 mm) Table 16 Crystal COMPONENT X1 VALUE 4 MHz Table 17 Transistors Table 14 Coils COMPONENT COMPONENT VALUE VALUE L1 1 µH (inductor) TR1 BC847B L2 30 nH TR2 BC847B L4 80 nH L5 16 nH L6 30 nH L8 80 nH L9 80 nH 1999 Jan 13 21 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A INTERNAL PIN CONFIGURATION AVERAGE DC VOLTAGE (V) PIN CONFIGURATION(1) SYMBOL TDA6404 TDA6405: TDA6405A UHFIN1 1 28 note 2 1.0 UHFIN2 2 27 note 2 1.0 1.9 note 2 0.0 0.0 3.4 3.4 3.4 3.4 0.0 or (VCC − VCE) 0.0 (VCC − VCE) or 0.0 0.0 0.0 (VCC − VCE) VHF 1 2 (28) (27) UHF MGE704 VHFIN 3 26 3 (26) MGE705 RFGND 4 25 4 (25) MGE706 IFFIL1 5 24 IFFIL2 6 23 (24) 5 6 (23) MGD617 PVHFL 7 22 PVHFH 8 21 PUHF 9 20 7 8 (22) (21) 9 (20) 1999 Jan 13 22 MGK814 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A PIN CONFIGURATION(1) SYMBOL AS TDA6404 TDA6405: TDA6405A 10 19 AVERAGE DC VOLTAGE (V) VHF UHF VAS VAS note 2 note 2 note 2 note 2 1.9 1.9 1.9 1.9 10 (19) MGK815 SDA 11 18 11 (18) MGK816 SCL 12 17 12 (17) ADC 13 MGK817 16 13 (16) MGK818 CP 14 15 14 (15) MGK819 1999 Jan 13 23 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A PIN CONFIGURATION(1) SYMBOL VT TDA6404 TDA6405: TDA6405A 15 14 AVERAGE DC VOLTAGE (V) VHF 15 UHF VVT VVT 3.0 3.0 5.0 5.0 (14) MGK820 XTAL 16 13 16 (13) MGK821 VCC 17 IFOUT1 18 11 2.2 2.2 IFOUT2 19 10 2.2 2.2 0.0 0.0 note 2 1.9 note 2 2.5 note 2 2.5 note 2 1.9 GND 20 12 supply voltage 18 19 (11) (10) MGK822 9 20 (9) MGK823 UHFOSCIB1 21 8 UHFOSCOC1 22 7 UHFOSCOC2 23 6 UHFOSCIB2 24 5 (6) (7) 23 22 21 24 (8) (5) MGK824 1999 Jan 13 24 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A PIN CONFIGURATION(1) SYMBOL TDA6404 TDA6405: TDA6405A VHFOSCIB1 25 4 VHFOSCOC1 26 3 VHFOSCOC2 27 2 VHFOSCIB2 28 1 VHF (2) (3) 27 26 25 28 (4) (1) MGK825 Notes 1. The pin numbers in parenthesis represent the TDA6405 and TDA6405A. 2. Not applicable. 1999 Jan 13 AVERAGE DC VOLTAGE (V) 25 UHF 2.0 note 2 2.7 note 2 2.7 note 2 2.0 note 2 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A PACKAGE OUTLINE SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm D SOT341-1 E A X c HE y v M A Z 28 15 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 14 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 10.4 10.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.1 0.7 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 1999 Jan 13 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 93-09-08 95-02-04 MO-150AH 26 o Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages • For packages with leads on two sides and a pitch (e): This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 1999 Jan 13 TDA6404; TDA6405; TDA6405A 27 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable suitable LQFP, QFP, TQFP not recommended(3)(4) suitable SSOP, TSSOP, VSO not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 1999 Jan 13 28 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners TDA6404; TDA6405; TDA6405A DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1999 Jan 13 29 Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners NOTES 1999 Jan 13 30 TDA6404; TDA6405; TDA6405A Philips Semiconductors Product specification 5 V mixer/oscillator-PLL synthesizers for hyperband tuners NOTES 1999 Jan 13 31 TDA6404; TDA6405; TDA6405A Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545004/750/02/pp32 Date of release: 1999 Jan 13 Document order number: 9397 750 04901