DISCRETE SEMICONDUCTORS DATA SHEET BSP121 N-channel enhancement mode vertical D-MOS transistor Product specification Supersedes data of April 1995 File under Discrete Semiconductors, SC13b 1998 Apr 01 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor DESCRIPTION BSP121 QUICK REFERENCE DATA N-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and designed for use as a line current interrupter in telephone sets and for application in relay, high-speed and line-transformer drivers. Drain source voltage VDS max. 200 V Gate-source voltage (open drain) ±VGSO max. 20 V Drain current (DC) ID max. 350 mA Ptot max. 1.5 W RDS(on) typ. max. 4.5 Ω 6.0 Ω Yfs min. typ. 200 mS 350 mS Total power dissipation up to Tamb = 25 °C Drain-source on-resistance ID = 400 mA; VGS = 10 V FEATURES • Direct interface to C-MOS, TTL, etc. Transfer admittance ID = 400 mA; VDS = 25 V • High-speed switching • No secondary breakdown PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = drain Marking code BSP121 PIN CONFIGURATION d 4 handbook, halfpage g 1 Top view 2 s 3 MAM054 Fig.1 Simplified outline and symbol. 1998 Apr 01 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP121 RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage VDS max. 200 V Gate-source voltage (open drain) ±VGSO max. 20 V Drain current (DC) ID max. 350 mA Drain current (peak) IDM max. 1.2 A max. 1.5 W Total power dissipation up to Tamb = 25 °C (note 1) Ptot Storage temperature range Tstg Junction temperature Tj max. 150 °C Rthj-a = 83.3 K/W −65 to + 150 °C THERMAL RESISTANCE From junction to ambient (note 1) Note 1. Device mounted on an epoxy printed-circuit board 40 mm × 40 mm × 1.5 mm; mounting pad for the drain lead min. 6 cm2. 1998 Apr 01 3 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP121 CHARACTERISTICS Tj = 25 °C unless otherwise specified Drain-source breakdown voltage ID = 10 µA; VGS = 0 V(BR)DSS min. 200 V VDS = 160 V; VGS = 0 IDSS max. 1.0 µA VDS = 60 V; VGS = 0 IDSS max. 200 nA ±IGSS max. 100 nA VGS(th) min. max. 0.8 V 2.8 V RDS(on) typ. max. 4.5 Ω 6.0 Ω Yfs min. typ. 200 mS 350 mS Ciss typ. max. 45 pF 60 pF Coss typ. max. 15 pF 25 pF Crss typ. max. 3.5 pF 10 pF ton typ. max. 5 pF 10 pF toff typ. max. 15 ns 20 ns Drain-source leakage current Gate-source leakage current ± VGS = 20 V; VDS = 0 Gate threshold voltage ID = 1 mA; VDS = VGS Drain-source on-resistance ID = 400 mA; VGS = 10 V Transfer admittance ID = 400 mA; VDS = 25 V Input capacitance at f = 1 MHz VDS = 25 V; VGS = 0 Output capacitance at f = 1 MHz VDS = 25 V; VGS = 0 Feedback capacitance at f = 1 MHz VDS = 25 V; VGS = 0 Switching times (see Figs 2 and 3) ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V 1998 Apr 01 4 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP121 handbook, halfpage VDD = 50 V handbook, halfpage 90 % INPUT 10 % 90 % OUTPUT 10 V ID 0V 10 % 50 Ω ton MBB691 MBB692 Fig.2 Switching time test circuit handbook, Fig.3 Input and output waveforms. MBB693 2 toff MDA745 2 handbook, halfpage ID (A) 1.6 Ptot (W) 1.6 VGS = 10 V 6V 1.2 1.2 5V 0.8 0.8 4V 0.4 0.4 3V 0 0 0 50 100 150 200 Tamb (°C) 0 Fig.4 Power derating curve. 1998 Apr 01 Fig.5 5 5 10 15 20 25 VDS (V) Output characteristic; Tj = 25 °C; typical value. Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP121 MDA746 1.6 MDA747 160 handbook, halfpage handbook, halfpage ID (A) C (pF) 1.2 120 0.8 80 0.4 40 Ciss Coss Crss 0 0 0 Fig.6 2 4 6 8 10 VGS (V) 0 Fig.7 Transfer characteristic; VDS = 10 V; Tj = 25 °C; typical values. MDA748 104 handbook, halfpage 5 10 15 20 25 VDS (V) Capacitance as a function of drain-source voltage; VGS = 0; f = 1 MHz; Tj = 25 °C; typical values. MDA749 1.4 handbook, halfpage k ID (mA) VGS = 10 V 103 1.2 5V 4V 1 102 0.8 10 4 6 8 10 0.6 −50 12 14 RDSon (Ω) 0 50 100 Tj (°C) Fig.9 V GS ( th ) at T j k = --------------------------------------------- ; V GS ( th ) at 25 °C Fig.8 1998 Apr 01 Tj = 25 °C; typical values. VGS(th) at 1 mA; typical values. 6 150 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor MDA750 2.8 handbook, halfpage k 2.4 2 1.6 1.2 0.8 0.4 −50 0 50 100 Tj (°C) 150 Fig.10 R DS ( on ) at T j k = ---------------------------------------------- ; R DS ( on ) at 25 °C at 400 mA/10 V; typical values. 1998 Apr 01 7 BSP121 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP121 PACKAGE OUTLINE Plastic surface mounted package; collector pad for good heat transfer; 4 leads D SOT223 E B A X c y HE v M A b1 4 Q A A1 1 2 3 Lp bp e1 w M B detail X e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y mm 1.8 1.5 0.10 0.01 0.80 0.60 3.1 2.9 0.32 0.22 6.7 6.3 3.7 3.3 4.6 2.3 7.3 6.7 1.1 0.7 0.95 0.85 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 96-11-11 97-02-28 SOT223 1998 Apr 01 EUROPEAN PROJECTION 8 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP121 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Apr 01 9 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES 1998 Apr 01 10 BSP121 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES 1998 Apr 01 11 BSP121 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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