Product specification Philips Semiconductors Thyristors logic level BT150S series BT150M series GENERAL DESCRIPTION Glass passivated, sensitive gate thyristors in a plastic envelope, suitable for surface mounting, intended for use in general purpose switching and phase control applications. These devices are intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits. PINNING - SOT428 QUICK REFERENCE DATA SYMBOL VDRM, VRRM IT(AV) IT(RMS) ITSM PARAMETER MAX. MAX. MAX. UNIT BT150S (or BT150M)Repetitive peak off-state voltages Average on-state current RMS on-state current Non-repetitive peak on-state current 500R 500 600R 600 800R 800 V 2.5 4 35 2.5 4 35 2.5 4 35 A A A PIN CONFIGURATION PIN Standard Alternative NUMBER S M 1 cathode gate 2 anode anode 3 gate cathode tab anode anode SYMBOL tab a k 2 1 g 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER CONDITIONS VDRM, VRRM Repetitive peak off-state voltages IT(AV) IT(RMS) ITSM I2t dIT/dt IGM VGM VRGM PGM PG(AV) Tstg Tj Average on-state current RMS on-state current Non-repetitive peak on-state current half sine wave; Tmb ≤ 111 ˚C all conduction angles half sine wave; Tj = 25 ˚C prior to surge t = 10 ms t = 8.3 ms t = 10 ms ITM = 10 A; IG = 50 mA; dIG/dt = 50 mA/µs I2t for fusing Repetitive rate of rise of on-state current after triggering Peak gate current Peak gate voltage Peak reverse gate voltage Peak gate power Average gate power over any 20 ms period Storage temperature Operating junction temperature MIN. MAX. UNIT - -500R -600R -800R 5001 6001 800 V - 2.5 4 A A - 35 38 6.1 50 A A A2s A/µs -40 - 2 5 5 5 0.5 150 1252 A V V W W ˚C ˚C 1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may switch to the on-state. The rate of rise of current should not exceed 15 A/µs. 2 Note: Operation above 110˚C may require the use of a gate to cathode resistor of 1kΩ or less. October 1997 1 Rev 1.100 Philips Semiconductors Product specification Thyristors logic level BT150S series BT150M series THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Rth j-mb Thermal resistance junction to mounting base Thermal resistance pcb (FR4) mounted; footprint as in Fig.14 junction to ambient - - 3.0 K/W - 75 - K/W MIN. TYP. MAX. UNIT 0.1 - 15 0.17 0.10 1.23 0.4 0.2 0.1 200 10 6 1.8 1.5 0.5 µA mA mA V V V mA MIN. TYP. MAX. UNIT - 50 - V/µs - 2 - µs - 100 - µs Rth j-a STATIC CHARACTERISTICS Tj = 25 ˚C unless otherwise stated SYMBOL PARAMETER CONDITIONS IGT IL IH VT VGT Gate trigger current Latching current Holding current On-state voltage Gate trigger voltage ID, IR Off-state leakage current VD = 12 V; IT = 0.1 A VD = 12 V; IGT = 0.1 A VD = 12 V; IGT = 0.1 A IT = 5 A VD = 12 V; IT = 0.1 A VD = VDRM(max); IT = 0.1 A; Tj = 110 ˚C VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C DYNAMIC CHARACTERISTICS Tj = 25 ˚C unless otherwise stated SYMBOL PARAMETER CONDITIONS dVD/dt Critical rate of rise of off-state voltage Gate controlled turn-on time Circuit commutated turn-off time VDM = 67% VDRM(max); Tj = 125 ˚C; exponential waveform; RGK = 100 Ω ITM = 10 A; VD = VDRM(max); IG = 5 mA; dIG/dt = 0.2 A/µs VD = 67% VDRM(max); Tj = 125 ˚C; ITM = 8 A; VR = 10 V; dITM/dt = 10 A/µs; dVD/dt = 2 V/µs; RGK = 1 kΩ tgt tq October 1997 2 Rev 1.100 Philips Semiconductors Product specification Thyristors logic level 6 BT150S series BT150M series conduction form angle factor degrees a 30 4 60 2.8 90 2.2 120 1.9 180 1.57 5 4 Tmb(max) / C BT148 Ptot / W 3 ITSM / A 107 40 110 1.9 2.2 30 T 113 2.8 2 119 1 122 time Tj initial = 25 C max 116 4 I TSM IT a = 1.57 20 10 0 0 0.5 1 1.5 IF(AV) / A 2 2.5 125 3 0 1 Fig.1. Maximum on-state dissipation, Ptot, versus average on-state current, IT(AV), where a = form factor = IT(RMS)/ IT(AV). Fig.4. Maximum permissible non-repetitive peak on-state current ITSM, versus number of cycles, for sinusoidal currents, f = 50 Hz. BT148 1000 ITSM / A 1000 10 100 Number of half cycles at 50Hz 12 BT150 IT(RMS) / A 10 8 dIT /dt limit 100 6 IT ITSM 4 time T Tj initial = 25 C max 10 10us 2 100us 0 0.01 10ms 1ms T/s 0.1 1 surge duration / s Fig.2. Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width tp, for sinusoidal currents, tp ≤ 10ms. Fig.5. Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f = 50 Hz; Tmb ≤ 111˚C. 5 BT148Z IT(RMS) / A 1.6 111 C 4 VGT(Tj) VGT(25 C) 10 BT151 1.4 1.2 3 1 2 0.8 1 0.6 0 -50 0 50 Tmb / C 0.4 -50 100 Fig.3. Maximum permissible rms current IT(RMS) , versus mounting base temperature Tmb. October 1997 0 50 Tj / C 100 150 Fig.6. Normalised gate trigger voltage VGT(Tj)/ VGT(25˚C), versus junction temperature Tj. 3 Rev 1.100 Philips Semiconductors Product specification Thyristors logic level 3 BT150S series BT150M series IGT(Tj) IGT(25 C) BT148 IT / A 12 BT148 Tj = 125 C Tj = 25 C 10 2.5 2 max 6 1.5 1 4 0.5 2 0 -50 0 0 50 Tj / C 100 150 Fig.7. Normalised gate trigger current IGT(Tj)/ IGT(25˚C), versus junction temperature Tj. 3 typ Vo = 1.26 V Rs = 0.099 ohms 8 IL(Tj) IL(25 C) 0 0.5 1 1.5 VT / V 2 2.5 3 Fig.10. Typical and maximum on-state characteristic. 10 BT145 BT148 Zth j-mb (K/W) 2.5 1 2 1.5 0.1 1 P D tp 0.5 t 0 -50 0 50 Tj / C 100 0.01 10us 150 IH(Tj) IH(25 C) 1ms 10ms 0.1s 1s 10s tp / s Fig.11. Transient thermal impedance Zth j-mb, versus pulse width tp. Fig.8. Normalised latching current IL(Tj)/ IL(25˚C), versus junction temperature Tj. 3 0.1ms 1000 BT145 dVD/dt (V/us) 2.5 RGK = 100 ohms 100 2 1.5 10 1 0.5 0 -50 0 50 Tj / C 100 1 150 50 100 150 Tj / C Fig.12. Typical, critical rate of rise of off-state voltage, dVD/dt versus junction temperature Tj. Fig.9. Normalised holding current IH(Tj)/ IH(25˚C), versus junction temperature Tj. October 1997 0 4 Rev 1.100 Philips Semiconductors Product specification Thyristors logic level BT150S series BT150M series MECHANICAL DATA Dimensions in mm seating plane Net Mass: 1.1 g 6.73 max 1.1 tab 2.38 max 0.93 max 5.4 4 min 6.22 max 10.4 max 4.6 2 1 0.5 0.5 min 3 0.3 0.5 0.8 max (x2) 2.285 (x2) Fig.13. SOT428 : centre pin connected to tab. MOUNTING INSTRUCTIONS Dimensions in mm 7.0 7.0 2.15 1.5 2.5 4.57 Fig.14. SOT428 : minimum pad sizes for surface mounting. Notes 1. Plastic meets UL94 V0 at 1/8". October 1997 5 Rev 1.100 Philips Semiconductors Product specification Thyristors logic level BT150S series BT150M series DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. October 1997 6 Rev 1.100