BLF574 HF / VHF power LDMOS transistor Rev. 01 — 8 December 2008 Preliminary data sheet 1. Product profile 1.1 General description A 500 W to 600 W LDMOS power transistor for broadcast applications and industrial applications in the HF to 500 MHz band. Table 1. Application information Mode of operation CW f VDS PL Gp ηD (MHz) (V) (W) (dB) (%) 225 50 500 26.5 70 108 50 600 27.5 73 CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features n Typical CW performance at frequency of 225 MHz, a supply voltage of 50 V and an IDq of 1000 mA: u Average output power = 500 W u Power gain = 26.5 dB u Efficiency = 70 % n Easy power control n Integrated ESD protection n Excellent ruggedness n High efficiency n Excellent thermal stability n Designed for broadband operation (10 MHz to 500 MHz) n Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) 1.3 Applications n Industrial, scientific and medical applications n Broadcast transmitter applications BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 2. Pinning information Table 2. Pinning Pin Description 1 drain1 2 drain2 3 gate1 4 gate2 5 Simplified outline 1 Graphic symbol 1 2 5 3 3 4 5 4 [1] source 2 sym117 [1] Connected to flange. 3. Ordering information Table 3. Ordering information Type number BLF574 Package Name Description Version - flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT539A 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS Conditions Min Max Unit drain-source voltage - 110 V VGS gate-source voltage −0.5 +11 V ID drain current - 56 A Tstg storage temperature −65 +150 °C Tj junction temperature - 225 °C 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-c) thermal resistance from junction to case Tcase = 80 °C; PL = 400 W 0.23 K/W [1] Rth(j-c) is measured under RF conditions. BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 2 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 6. Characteristics Table 6. DC characteristics Tj = 25 °C; per section unless otherwise specified. Symbol Parameter Conditions V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 2.5 mA Min Typ Max Unit 110 - - V 2.25 V VGS(th) gate-source threshold voltage VDS = 10 V; ID = 250 mA 1.25 1.7 VGSq gate-source quiescent voltage VDS = 50 V; ID = 500 mA 1.35 1.85 2.35 V IDSS drain leakage current VGS = 0 V; VDS = 50 V - - IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V 29 37.5 - IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 280 nA gfs forward transconductance VDS = 10 V; ID = 12.5 A - 17 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 8.33 A - 0.14 - Ω Crs feedback capacitance VGS = 0 V; VDS = 50 V; f = 1 MHz - 1.5 - pF Ciss input capacitance VGS = 0 V; VDS = 50 V; f = 1 MHz - 204 - pF Coss output capacitance VGS = 0 V; VDS = 50 V; f = 1 MHz - 72 - pF 2.8 µA A Table 7. RF characteristics Mode of operation: CW; f = 225 MHz; RF performance at VDS = 50 V; IDq = 1000 mA for total device; Tcase = 25 °C; unless otherwise specified; in a class-AB production test circuit. Symbol Parameter Conditions Min Typ Max Unit Gp power gain PL = 400 W 25 26.5 28 dB RLin input return loss PL = 400 W 13 20 - dB ηD drain efficiency PL = 400 W 66 70 - % BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 3 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 001aaj126 500 Coss (pF) 400 300 200 100 0 0 10 20 30 40 50 VDS (V) VGS = 0 V; f = 1 MHz. Fig 1. Output capacitance as a function of drain-source voltage; typical values per section 6.1 Ruggedness in class-AB operation The BLF574 is capable of withstanding a load mismatch corresponding to VSWR = 13 : 1 through all phases under the following conditions: VDS = 50 V; IDq = 1000 mA; PL = 400 W; f = 225 MHz. BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 4 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 7. Application information 7.1 RF performance RF performance in a 500 W application circuit at 225 MHz. 7.1.1 1-Tone CW 001aaj127 30 Gp (dB) ηD (%) ηD Gp (dB) 60 28 26 40 26 24 20 24 28 001aaj128 30 80 (7) (6) (5) Gp 22 0 200 22 0 600 400 (4) (3) (2) (1) 0 100 200 PL(PEP) (W) VDS = 50 V; IDq = 1000 mA; f = 225 MHz. 300 400 500 PL (W) VDS = 50 V; f = 225 MHz. (1) IDq = 400 mA (2) IDq = 600 mA (3) IDq = 800 mA (4) IDq = 1000 mA (5) IDq = 1200 mA (6) IDq = 1400 mA (7) IDq = 1800 mA Fig 2. Power gain and drain efficiency as functions of load power; typical values Fig 3. Power gain as function of load power; typical values BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 5 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 001aaj129 60 PL (dBm) 58 Ideal PL (1) PL 56 54 52 50 24 26 28 30 32 34 Ps (dBm) VDS = 50 V; IDq = 1000 mA; f = 225 MHz. (1) PL(1dB) = 57.32 dBm (540 W) Fig 4. Load power as function of source power; typical values 7.1.2 2-Tone CW 001aaj130 30 Gp (dB) ηD (%) ηD 28 001aaj131 0 80 IMD3 (dBc) 60 −20 40 −40 (1) (2) (3) Gp 26 (4) (5) 24 20 22 0 200 400 0 600 800 PL(PEP) (W) VDS = 50 V; IDq = 1000 mA; f1 = 224.95 MHz; f2 = 225.05 MHz. −60 −80 0 200 400 600 800 PL(PEP) (W) VDS = 50 V; f1 = 224.95 MHz; f2 = 225.05 MHz. (1) IDq = 600 mA (2) IDq = 800 mA (3) IDq = 1000 mA (4) IDq = 1200 mA (5) IDq = 1400 mA Fig 5. Power gain and drain efficiency as functions of peak envelope load power; typical values Fig 6. Third order intermodulation distortion as a function of peak envelope load power; typical values BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 6 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 7.1.3 Application circuit Table 8. List of components For application circuit, see Figure 7. Printed-Circuit Board (PCB): Rogers 5880; εr = 2.2 F/m; height = 0.79 mm; Cu (top/bottom metallization); thickness copper plating = 35 µm. Component Description Value C1, C2, C23, C24 multilayer ceramic chip capacitor 100 pF C3 multilayer ceramic chip capacitor 24 pF [1] C4,C5 multilayer ceramic chip capacitor 39 pF [1] C6, C9 multilayer ceramic chip capacitor 4.7 µF TDK4532X7R1E475Mt020U [1] C7, C8, C10, C11 multilayer ceramic chip capacitor 1 nF C12, C16 electrolytic capacitor C13, C15 multilayer ceramic chip capacitor 62 pF [1] C14 multilayer ceramic chip capacitor 15 pF [1] C17, C19 multilayer ceramic chip capacitor 47 pF [1] C18 multilayer ceramic chip capacitor 33 pF [1] C20, C22 multilayer ceramic chip capacitor 10 pF [1] C21 multilayer ceramic chip capacitor 18 pF [1] L1, L2, L3, L4 3 turns 1 mm copper wire D = 3 mm; length = 3 mm L5, L6 stripline - (L × W) 125 mm × 7 mm L7, L8, L9, L10 stripline - (L × W) 8 mm × 15 mm L11, L12 stripline - (L × W) 132 mm × 7 mm R1, R2 metal film resistor 10 Ω; 0.6 W R3, R4 metal film resistor 3 Ω; 0.6 W T1, T2, T3, T4 semi rigid coax 50 Ω; 120 mm [1] 220 µF; 63 V EZ-141-AL-TP-M17 American Technical Ceramics type 100B or capacitor of same quality. BLF574_1 Preliminary data sheet Remarks [1] © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 7 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor L1 R3 T1 + C10 C6 C7 T3 C12 R1 C17 L2 C13 C1 C3 C4 C5 C20 L6 L8 L9 L5 L7 L10 L11 C14 C18 C23 C21 C24 C2 L12 C15 C19 C22 L3 R2 C16 C8 T2 C9 + C11 T4 R4 L4 001aaj132 Fig 7. Component layout for class-AB application circuit BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 8 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 7.2 Reliability 001aaj133 105 Years (1) (2) (3) (4) (5) (6) 104 103 102 (7) (8) (9) (10) (11) 10 1 0 4 8 12 16 20 Idc (A) TTF (0.1 % failure fraction). (1) Tj = 100 °C (2) Tj = 110 °C (3) Tj = 120 °C (4) Tj = 130 °C (5) Tj = 140 °C (6) Tj = 150 °C (7) Tj = 160 °C (8) Tj = 170 °C (9) Tj = 180 °C (10) Tj = 190 °C (11) Tj = 200 °C Fig 8. BLF574 electromigration (ID, total device) BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 9 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 8. Test information 8.1 Impedance information Table 9. Typical impedance Simulated ZS and ZL test circuit impedances. f ZS ZL MHz Ω Ω 225 3.2 + j2.5 7.5 + j4.0 drain ZL gate ZS 001aaf059 Fig 9. Definition of transistor impedance BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 10 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 8.2 RF performance The following figures are measured in a class-AB production test circuit. 8.2.1 1-Tone CW 001aaj134 30 Gp (dB) 80 ηD (%) ηD 28 001aaj135 30 Gp (dB) 60 28 40 26 (7) (6) (5) Gp 26 24 20 22 0 100 200 300 0 400 500 PL (W) VDS = 50 V; IDq = 1000 mA; f = 225 MHz. (4) (3) (2) (1) 24 22 0 100 200 300 400 500 PL (W) VDS = 50 V; f = 225 MHz. (1) IDq = 400 mA (2) IDq = 600 mA (3) IDq = 800 mA (4) IDq = 1000 mA (5) IDq = 1200 mA (6) IDq = 1400 mA (7) IDq = 1800 mA Fig 10. Power gain and drain efficiency as functions of load power; typical values Fig 11. Power gain as function of load power; typical values BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 11 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 001aaj136 60 PL (dBm) 58 ideal PL (1) 56 PL 54 52 50 24 26 28 30 32 34 Ps (dBm) VDS = 50 V; IDq = 1000 mA; f = 225 MHz. (1) PL(1dB) = 56.43 dBm (440 W) Fig 12. Load power as function of source power; typical values 8.2.2 2-Tone CW 001aaj137 30 80 ηD (%) Gp (dB) ηD 28 001aaj138 0 IMD3 (dBc) 60 −20 40 −40 (1) (2) (3) Gp 26 (4) (5) 24 20 0 600 22 0 100 200 300 400 500 −60 −80 0 100 200 PL(PEP) (W) VDS = 50 V; IDq = 1000 mA; f1 = 224.95 MHz; f2 = 225.05 MHz. 300 400 500 600 PL(PEP) (W) VDS = 50 V; f1 = 224.95 MHz; f2 = 225.05 MHz. (1) IDq = 600 mA (2) IDq = 800 mA (3) IDq = 1000 mA (4) IDq = 1200 mA (5) IDq = 1400 mA Fig 13. Power gain and drain efficiency as functions of peak envelope load power; typical values Fig 14. Third order intermodulation distortion as a function of peak envelope load power; typical values BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 12 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 8.2.3 Test circuit Table 10. List of components For production test circuit, see Figure 15 and Figure 16. Printed-Circuit Board (PCB): Rogers 5880; εr = 2.2 F/m; height = 0.79 mm; Cu (top/bottom metallization); thickness copper plating = 35 µm. Component Description Value C1, C2, C20, C21 multilayer ceramic chip capacitor 100 pF C3 multilayer ceramic chip capacitor 24 pF [1] C4,C5 multilayer ceramic chip capacitor 39 pF [1] C6, C7, C10, C11 multilayer ceramic chip capacitor 1 nf [1] C8, C9 multilayer ceramic chip capacitor 4.7 µF [1] C12, C13 electrolytic capacitor 220 µF; 63 V C14, C15 multilayer ceramic chip capacitor 47 pf [1] C16 multilayer ceramic chip capacitor 33 pF [1] C17 multilayer ceramic chip capacitor 18 pF [1] C18, C19 multilayer ceramic chip capacitor 10 pF [1] C22 multilayer ceramic chip capacitor 15 pF [1] C23, C24 multilayer ceramic chip capacitor 62 pF [1] L1, L2, L3, L4 3 turns 1 mm copper wire D = 3 mm; length = 2 mm L5, L6 stripline - (L × W) 125 mm × 7 mm L7, L8, L9, L10 stripline - (L × W) 8 mm × 15 mm L11, L12 stripline - (L × W) 132 mm × 7 mm R1, R2 metal film resistor 10 Ω; 0.6 W R3, R4 metal film resistor 3 Ω; 0.6 W T1, T2, T3, T4 semi rigid coax 50 Ω; 120 mm [1] TDK4532X7R1E475Mt020U EZ-141-AL-TP-M17 American Technical Ceramics type 100B or capacitor of same quality. BLF574_1 Preliminary data sheet Remarks [1] © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 13 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor VDD C12 VGG R3 L3 C8 C11 C7 R2 L1 C14 C18 C20 C23 T1 C1 C3 input 50 Ω T2 C4 C5 C16 C22 L6 L8 L9 L11 L5 L7 L10 L12 C17 C2 C21 output 50 Ω T3 T4 C19 C24 C15 R1 L2 C10 C6 C9 VGG L4 L4 C13 001aaj139 VDD Fig 15. Class-AB common-source production test circuit L3 R3 T1 C8 C7 T3 C11 C12 R2 L1 C1 11 mm C3 C14 C23 C4 C5 C16 C22 37 mm 11 mm C18 C17 C20 5 mm 3 mm C24 C2 C19 C21 C15 L2 R1 C6 T2 C10 T4 C9 R4 C13 L4 001aaj140 Fig 16. Component layout for class-AB production test circuit BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 14 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 9. Package outline Flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads SOT539A D A F D1 U1 B q C w2 M C M H1 1 c 2 E1 p H U2 5 L 3 A E w1 M A M B M 4 w3 M b Q e 0 5 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c D D1 e E E1 9.50 5.33 11.81 0.15 31.55 31.52 13.72 9.30 3.96 11.56 0.08 30.94 30.96 mm inches 9.53 9.27 F H H1 L 1.75 17.12 25.53 3.73 1.50 16.10 25.27 2.72 p Q q 3.30 3.05 2.31 2.01 35.56 U1 U2 w1 41.28 10.29 0.25 41.02 10.03 w2 w3 0.51 0.25 0.210 0.465 0.006 1.242 1.241 0.374 0.375 0.069 0.674 1.005 0.147 0.130 0.091 1.625 0.405 1.400 0.010 0.020 0.010 0.540 0.156 0.455 0.003 1.218 1.219 0.366 0.365 0.059 0.634 0.995 0.107 0.120 0.079 1.615 0.395 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 99-12-28 00-03-03 SOT539A Fig 17. Package outline SOT539A BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 15 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 10. Abbreviations Table 11. Abbreviations Acronym Description CW Continuous Wave EDGE Enhanced Data rates for GSM Evolution GSM Global System for Mobile communications HF High Frequency LDMOS Laterally Diffused Metal-Oxide Semiconductor LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor RF Radio Frequency TTF Time To Failure VHF Very High Frequency VSWR Voltage Standing-Wave Ratio 11. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes BLF574_1 20081208 Preliminary data sheet - - BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 16 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 12.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BLF574_1 Preliminary data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 8 December 2008 17 of 18 BLF574 NXP Semiconductors HF / VHF power LDMOS transistor 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 6.1 7 7.1 7.1.1 7.1.2 7.1.3 7.2 8 8.1 8.2 8.2.1 8.2.2 8.2.3 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ruggedness in class-AB operation. . . . . . . . . . 4 Application information. . . . . . . . . . . . . . . . . . . 5 RF performance . . . . . . . . . . . . . . . . . . . . . . . . 5 1-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Application circuit . . . . . . . . . . . . . . . . . . . . . . . 7 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Test information . . . . . . . . . . . . . . . . . . . . . . . . 10 Impedance information . . . . . . . . . . . . . . . . . . 10 RF performance . . . . . . . . . . . . . . . . . . . . . . . 11 1-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 8 December 2008 Document identifier: BLF574_1