PCA9546A 4-channel I2C switch with reset Rev. 03 — 6 April 2005 Product data sheet 1. General description The PCA9546A is a quad bi-directional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register. An active LOW reset input allows the PCA9546A to recover from a situation where one of the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machine and causes all the channels to be deselected as does the internal Power-On Reset (POR) function. The pass gates of the switches are constructed such that the VDD pin can be used to limit the maximum high voltage which will be passed by the PCA9546A. This allows the use of different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant. 2. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 1-of-4 bi-directional translating switches I2C-bus interface logic; compatible with SMBus standards Active LOW reset input 3 address pins allowing up to 8 devices on the I2C-bus Channel selection via I2C-bus, in any combination Power-up with all switch channels deselected Low Ron switches Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses No glitch on power-up Supports hot insertion Low stand-by current Operating power supply voltage range of 2.3 V to 5.5 V 5 V tolerant Inputs 0 kHz to 400 kHz clock frequency ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 ■ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA ■ Three packages offered: SO16, TSSOP16, and HVQFN16 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 3. Ordering information Table 1: Ordering information Tamb = −40 °C to +85 °C Type number Package Name Description Version PCA9546ABS HVQFN16 plastic thermal enhanced very thin quad flat package; SOT629-1 no leads; 16 terminals; body 4 × 4 × 0.85 mm PCA9546AD SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 PCA9546APW TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 Standard packing quantities and other packaging data are available at www.standardics.philips.com/packaging. 4. Marking Table 2: Marking codes Type number Topside mark PCA9546ABS 546A PCA9546AD PCA9546AD PCA9546APW PA9546A 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 2 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 5. Block diagram PCA9546A SC0 SC1 SC2 SC3 SD0 SD1 SD2 SD3 VSS VDD RESET SCL SDA SWITCH CONTROL LOGIC POWER-ON RESET INPUT FILTER A0 I2C-BUS CONTROL A1 A2 002aab188 Fig 1. Block diagram of PCA9546A 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 3 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 6. Pinning information 6.1 Pinning A0 1 16 VDD A1 2 15 SDA RESET 3 14 SCL SD0 PCA9546AD SC0 5 12 SC3 SD1 6 11 SD3 7 VSS 8 1 A1 2 16 VDD 15 SDA RESET 3 14 SCL SD0 4 SC0 5 SD1 6 11 SD3 SC1 7 10 SC2 VSS 8 13 A2 4 SC1 A0 10 SC2 9 SD2 PCA9546APW 13 A2 12 SC3 9 002aab185 SD2 002aab186 RESET 13 SDA 16 A1 terminal 1 index area 14 VDD Fig 3. Pin configuration for TSSOP16 15 A0 Fig 2. Pin configuration for SO16 1 12 SCL SD0 2 SC0 3 10 SC3 11 A2 SD1 4 9 5 6 7 8 SC1 VSS SD2 SC2 PCA9546ABS SD3 002aab187 Transparent top view Fig 4. Pin configuration for HVQFN16 (transparent top view) 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 4 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 6.2 Pin description Table 3: Pin description Symbol A0 Pin Description SO, TSSOP HVQFN 1 15 address input 0 A1 2 16 address input 1 RESET 3 1 active LOW reset input SD0 4 2 serial data 0 SC0 5 3 serial clock 0 SD1 6 4 serial data 1 SC1 7 5 serial clock 1 VSS 8 6 [1] supply ground SD2 9 7 serial data 2 SC2 10 8 serial clock 2 SD3 11 9 serial data 3 SC3 12 10 serial clock 3 A2 13 11 address input 2 SCL 14 12 serial clock line SDA 15 13 serial data line VDD 16 14 supply voltage [1] HVQFN package die supply ground is connected to both the VSS pin and the exposed center pad. The VSS pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region. 7. Functional description Refer to Figure 1 “Block diagram of PCA9546A” on page 3. 7.1 Device address Following a START condition, the bus master must output the address of the slave it is accessing. The address of the PCA9546A is shown in Figure 5. To conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. 1 1 1 0 fixed A2 A1 A0 R/W hardware selectable 002aab189 Fig 5. Slave address The last bit of the slave address defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation. 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 5 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 7.2 Control register Following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9546A, which will be stored in the control register. If multiple bytes are received by the PCA9546A, it will save the last byte received. This register can be written and read via the I2C-bus. channel selection bits (read/write) 7 6 5 4 3 2 1 0 X X X X B3 B2 B1 B0 channel 0 channel 1 channel 2 channel 3 002aab190 Fig 6. Control register 7.2.1 Control register definition One or several SCx/SDx downstream pair, or channel, is selected by the contents of the control register. This register is written after the PCA9546A has been addressed. The 4 LSBs of the control byte are used to determine which channel is to be selected. When a channel is selected, the channel will become active after a STOP condition has been placed on the I2C-bus. This ensures that all SCx/SDx lines will be in a HIGH state when the channel is made active, so that no false conditions are generated at the time of connection. Table 4: Control register: Write—channel selection; Read—channel status D7 D6 D5 D4 B3 B2 B1 X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 0 1 0 X 0 1 0 1 X B0 Command 0 channel 0 disabled 1 channel 0 enabled X X X X X 0 0 0 channel 1 disabled channel 1 enabled channel 2 disabled channel 2 enabled channel 3 disabled channel 3 enabled no channel selected; power-up/reset default state Remark: Several channels can be enabled at the same time. Example: B3 = 0, B2 = 1, B1 = 1, B0 = 0, means that channel 0 and channel 3 are disabled and channel 1 and channel 2 are enabled. Care should be taken not to exceed the maximum bus capacitance. 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 6 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 7.3 RESET input The RESET input is an active LOW signal which may be used to recover from a bus fault condition. By asserting this signal LOW for a minimum of tWL, the PCA9546A will reset its registers and I2C-bus state machine and will deselect all channels. The RESET input must be connected to VDD through a pull-up resistor. 7.4 Power-on reset When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9546A in a reset condition until VDD has reached VPOR. At this point, the reset condition is released and the PCA9546A registers and I2C-bus state machine are initialized to their default states—all zeroes—causing all the channels to be deselected. Thereafter, VDD must be lowered below 0.2 V to reset the device. 7.5 Voltage translation The pass gate transistors of the PCA9546A are constructed such that the VDD voltage can be used to limit the maximum voltage that will be passed from one I2C-bus to another. 002aaa964 5.0 Vo(sw) (V) 4.0 (1) (2) 3.0 (3) 2.0 1.0 2.0 2.5 3.0 3.5 4.0 4.5 5.5 5.0 VDD (V) (1) maximum (2) typical (3) minimum Fig 7. Pass gate voltage versus supply voltage Figure 7 shows the voltage characteristics of the pass gate transistors (note that the graph was generated using the data specified in Section 11 “Static characteristics” of this data sheet). In order for the PCA9546A to act as a voltage translator, the Vo(sw) voltage should be equal to, or lower than the lowest bus voltage. For example, if the main bus was running at 5 V, and the downstream buses were 3.3 V and 2.7 V, then Vo(sw) should be equal to or below 2.7 V to effectively clamp the downstream bus voltages. Looking at Figure 7, we see that Vo(sw)(max) will be at 2.7 V when the PCA9546A supply voltage is 3.5 V or lower, so the PCA9546A supply voltage could be set to 3.3 V. Pull-up resistors can then be used to bring the bus voltages to their appropriate levels (see Figure 14). 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 7 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset More Information can be found in Application Note AN262: PCA954X family of I2C/SMBus multiplexers and switches. 8. Characteristics of the I2C-bus The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.1 Bit transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see Figure 8). SDA SCL data line stable; data valid change of data allowed mba607 Fig 8. Bit transfer 8.2 START and STOP conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line while the clock is HIGH is defined as the START condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP condition (P) (see Figure 9). SDA SDA SCL SCL S P START condition STOP condition mba608 Fig 9. Definition of START and STOP conditions 8.3 System configuration A device generating a message is a ‘transmitter’, a device receiving is the ‘receiver’. The device that controls the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’ (see Figure 10). 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 8 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset SDA SCL MASTER TRANSMITTER/ RECEIVER SLAVE RECEIVER SLAVE TRANSMITTER/ RECEIVER MASTER TRANSMITTER MASTER TRANSMITTER/ RECEIVER I2C MULTIPLEXER SLAVE 002aaa966 Fig 10. System configuration 8.4 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also, a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse; setup and hold times must be taken into account. A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a STOP condition. data output by transmitter not acknowledge data output by receiver acknowledge SCL from master 1 S START condition 2 8 9 clock pulse for acknowledgement 002aaa987 Fig 11. Acknowledgement on the I2C-bus 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 9 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 8.5 Bus transactions Data is transmitted to the PCA9546A control register using the Write mode as shown in Figure 12. slave address SDA S 1 1 1 0 A2 control register A1 A0 START condition 0 R/W A X X X X B3 B2 acknowledge from slave B1 B0 A P acknowledge from slave STOP condition 002aab196 Fig 12. Write control register Data is read from PCA9546A using the Read mode as shown in Figure 13. slave address SDA S 1 1 1 0 A2 START condition last byte control register A1 A0 1 R/W A X X acknowledge from slave X X B3 B2 B1 B0 NA P no acknowledge from master STOP condition 002aab197 Fig 13. Read control register 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 10 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 9. Application design-in information VDD = 2.7 V to 5.5 V VDD = 3.3 V SDA SDA SD0 SCL SCL SC0 V = 2.7 V to 5.5 V channel 0 V = 2.7 V to 5.5 V RESET I2C/SMBus master SD1 channel 1 SC1 V = 2.7 V to 5.5 V PCA9546A SD2 channel 2 SC2 V = 2.7 V to 5.5 V A2 A1 SD3 A0 SC3 channel 3 VSS 002aab198 Fig 14. Typical application 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 11 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 10. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS (ground = 0 V). [1] Symbol Parameter VDD VI Min Max Unit supply voltage −0.5 +7.0 V input voltage −0.5 +7.0 V II input current - ±20 mA IO output current - ±25 mA IDD supply current - ±100 mA ISS ground supply current - ±100 mA Ptot total power dissipation - 400 mW Tstg storage temperature −60 +150 °C Tamb operating ambient temperature −40 +85 °C [1] Conditions The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C. 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 12 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 11. Static characteristics Table 6: DC characteristics VDD = 2.3 V to 3.6 V; VSS = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified. See Table 7 on page 14 for VDD = 4.5 V to 5.5 V. [1] Symbol Parameter Conditions Min Typ Max Unit 2.3 - 3.6 V Supply VDD supply voltage IDD supply current Operating mode; VDD = 3.6 V; no load; VI = VDD or VSS; fSCL = 100 kHz - 16 50 µA Istb standby current Standby mode; VDD = 3.6 V; no load; VI = VDD or VSS - 0.1 1 µA VPOR power-on reset voltage no load; VI = VDD or VSS - 1.6 2.1 V [2] Input SCL; input/output SDA VIL LOW-level input voltage −0.5 - 0.3VDD V VIH HIGH-level input voltage 0.7VDD - 6 V IOL LOW-level output current VOL = 0.4 V 3 - - mA VOL = 0.6 V 6 - - mA IL leakage current VI = VDD or VSS −1 - +1 µA Ci input capacitance VI = VSS - 12 13 pF −0.5 - 0.3VDD V Select inputs A0 to A2, RESET VIL LOW-level input voltage VIH HIGH-level input voltage 0.7VDD - VDD + 0.5 V ILI input leakage current pin at VDD or VSS −1 - +1 µA Ci input capacitance VI = VSS - 1.6 3 pF Pass gate on-state resistance Ron Vo(sw) switch output voltage VDD = 3.67 V; VO = 0.4 V; IO = 15 mA 5 11 30 Ω VDD = 2.3 V to 2.7 V; VO = 0.4 V; IO = 10 mA 7 16 55 Ω Vi(sw) = VDD = 3.3 V; Io(sw) = −100 µA - 1.9 - V Vi(sw) = VDD = 3.0 V to 3.6 V; Io(sw) = −100 µA 1.6 - 2.8 V Vi(sw) = VDD = 2.5 V; Io(sw) = −100 µA - 1.5 - V Vi(sw) = VDD = 2.3 V to 2.7 V; Io(sw) = −100 µA 1.1 - 2.0 V IL leakage current VI = VDD or VSS −1 - +1 µA Cio input/output capacitance VI = VSS - 3 5 pF [1] For operation between published voltage ranges, refer to the worst-case parameter in both ranges. [2] VDD must be lowered to 0.2 V in order to reset part. 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 13 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset Table 7: DC characteristics VDD = 4.5 V to 5.5 V; VSS = 0 V; Tamb = −40 °C to +85 °C; unless otherwise specified. See Table 6 on page 13 for VDD = 2.3 V to 3.6 V. [1] Symbol Parameter Conditions Min Typ Max Unit 4.5 - 5.5 V Supply VDD supply voltage IDD supply current Operating mode; VDD = 5.5 V; no load; VI = VDD or VSS; fSCL = 100 kHz - 65 100 µA Istb standby current Standby mode; VDD = 5.5 V; no load; VI = VDD or VSS - 0.3 1 µA VPOR power-on reset voltage no load; VI = VDD or VSS - 1.7 2.1 V [2] Input SCL; input/output SDA VIL LOW-level input voltage −0.5 - 0.3VDD V VIH HIGH-level input voltage 0.7VDD - 6 V IOL LOW-level output current VOL = 0.4 V 3 - - mA VOL = 0.6 V 6 - - mA IIL LOW-level input current VI = VSS 1 - 1 µA IIH HIGH-level input current VI = VDD 1 - 1 µA Ci input capacitance VI = VSS - 12 13 pF Select inputs A0 to A2, RESET VIL LOW-level input voltage −0.5 - 0.3VDD V VIH HIGH-level input voltage 0.7VDD - VDD + 0.5 V ILI input leakage current pin at VDD or VSS −1 - +1 µA Ci input capacitance VI = VSS - 2 3 pF Ron on-state resistance VDD = 4.5 V to 5.5 V; VO = 0.4 V; IO = 15 mA 4 9 24 Ω Vo(sw) switch output voltage Vi(sw) = VDD = 5.0 V; Io(sw) = −100 µA - 3.6 - V Vi(sw) = VDD = 4.5 V to 5.5 V; Io(sw) = −100 µA 2.6 - 4.5 V Pass gate IL leakage current VI = VDD or VSS −1 - +1 µA Cio input/output capacitance VI = VSS - 3 5 pF [1] For operation between published voltage ranges, refer to the worst-case parameter in both ranges. [2] VDD must be lowered to 0.2 V in order to reset part. 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 14 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 12. Dynamic characteristics Table 8: Dynamic characteristics Symbol Parameter Conditions Fast-mode I2C-bus Standard-mode I2C-bus Min Max Min Unit Max tPD propagation delay from SDA to SDn, or SCL to SCn - 0.3 [1] fSCL SCL clock frequency 0 100 0 400 kHz tBUF bus free time between a STOP and START condition 4.7 - 1.3 - µs tHD;STA hold time (repeated) START condition. After this period, the first clock pulse is generated. 4.0 - 0.6 - µs tLOW LOW period of the SCL clock 4.7 - 1.3 - µs tHIGH HIGH period of the SCL clock 4.0 - 0.6 - µs tSU;STA setup time for a repeated START condition 4.7 - 0.6 - µs tSU;STO setup time for STOP condition 4.0 - 0.6 - µs tHD;DAT data hold time 0 [2] 3.45 0 [2] 0.9 µs tSU;DAT data setup time 250 - 100 rise time of both SDA and SCL signals tr - 1000 - 0.3 [1] ns - ns 20 + 0.1Cb [3] 300 ns [3] tf fall time of both SDA and SCL signals - 300 20 + 0.1Cb 300 µs Cb capacitive load for each bus line - 400 - 400 µs tSP pulse width of spikes which must be suppressed by the input filter - 50 - 50 ns tVD;DAT data valid time HIGH-to-LOW [4] - 1 - 1 µs LOW-to-HIGH [4] - 0.6 - 0.6 µs data valid Acknowledge - 1 - 1 µs tw(rst)L LOW-level reset time 4 - 4 - ns trst reset time (SDA clear) 500 - 500 - ns tREC;STA recovery time to START condition 0 - 0 - ns tVD;ACK RESET [1] Pass gate propagation delay is calculated from the 20 Ω typical Ron and the 15 pF load capacitance. [2] A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH(min) of the SCL signal) in order to bridge the undefined region of the falling edge of SCL. [3] Cb = total capacitance of one bus line in pF. [4] Measurements taken with 1 kΩ pull-up resistor and 50 pF load. 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 15 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset SDA tr tBUF tf tHD;STA tSP tLOW SCL tHD;STA P tSU;STA tHD;DAT S tHIGH tSU;DAT tSU;STO Sr P 002aaa986 Fig 15. Definition of timing on the I2C-bus ACK or read cycle START SCL SDA 30 % trst RESET 50 % 50 % tREC;STA 50 % tw(rst)L trst 50 % LEDx LED off 002aab174 Fig 16. Definition of RESET timing protocol START condition (S) tSU;STA bit 7 MSB (A7) tLOW bit 6 (A6) tHIGH bit 0 (R/W) acknowledge (A) STOP condition (P) 1/f SCL SCL tBUF tr tf SDA tHD;STA tSU;DAT tHD;DAT tVD;DAT tVD;ACK tSU;STO 002aab175 Rise and fall times refer to VIL and VIH. Fig 17. I2C-bus timing diagram 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 16 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 18. Package outline SOT109-1 (SO16) 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 17 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 19. Package outline SOT403-1 (TSSOP16) 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 18 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 x 4 x 0.85 mm A B D SOT629-1 terminal 1 index area A A 1 E c detail X e1 C 1/2 e e 8 y y1 C v M C A B w M C b 5 L 9 4 e e2 Eh 1/2 e 1 12 terminal 1 index area 16 13 X Dh 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.38 0.23 c D (1) Dh E (1) Eh 0.2 4.1 3.9 2.25 1.95 4.1 3.9 2.25 1.95 e e1 0.65 1.95 e2 L v w y y1 1.95 0.75 0.50 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT629-1 --- MO-220 --- EUROPEAN PROJECTION ISSUE DATE 01-08-08 02-10-22 Fig 20. Package outline SOT629-1 (HVQFN16) 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 19 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 14. Soldering 14.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 14.2 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 °C to 270 °C depending on solder paste material. The top-surface temperature of the packages should preferably be kept: • below 225 °C (SnPb process) or below 245 °C (Pb-free process) – for all BGA, HTSSON..T and SSOP..T packages – for packages with a thickness ≥ 2.5 mm – for packages with a thickness < 2.5 mm and a volume ≥ 350 mm3 so called thick/large packages. • below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times. 14.3 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 20 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C or 265 °C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 °C and 320 °C. 14.5 Package related soldering information Table 9: Suitability of surface mount IC packages for wave and reflow soldering methods Package [1] Soldering method Wave Reflow [2] BGA, HTSSON..T [3], LBGA, LFBGA, SQFP, SSOP..T [3], TFBGA, VFBGA, XSON not suitable suitable DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS not suitable [4] suitable PLCC [5], SO, SOJ suitable suitable not recommended [5] [6] suitable SSOP, TSSOP, VSO, VSSOP not recommended [7] suitable CWQCCN..L [8], PMFP [9], WQCCN..L [8] not suitable LQFP, QFP, TQFP [1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. [2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible. 9397 750 14318 Product data sheet not suitable © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 21 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. [5] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. [6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. [7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. [8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. [9] Hot bar soldering or manual soldering is suitable for PMFP packages. 15. Abbreviations Table 10: Abbreviations Acronym Description CDM Charged Device Model ESD Electro Static Discharge HBM Human Body Model IC Integrated Circuit LSB Least Significant Bit MM Machine Model MSB Most Significant Bit PCB Printed-Circuit Board 16. Revision history Table 11: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes PCA9546A_3 20050406 Product data sheet - 9397 750 14318 PCA9546A_2 Modifications: • The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • Section 2 “Features” on page 1: – 7th bullet: changed ‘RDSON’ to ‘Ron’ – 16th bullet: changed ‘JESDEC’ to ‘JEDEC’ • Figure 4 “Pin configuration for HVQFN16 (transparent top view)” on page 4: – added pin 1 indicator notch and center pad – changed pin 1 from ‘A2’ to ‘RESET’ • • Section 6.2 “Pin description” on page 5: added Table note 1 and its reference at HVQFN pin 6. • Section 7.5 “Voltage translation” on page 7: Section 7.2.1 “Control register definition” on page 6, third sentence: changed ‘The 2 LSBs of the control byte ...’ to ‘The 4 LSBs of the control byte ...’ – Figure 7 modified and title changed from ‘Vpass voltage versus VDD’ to ‘Pass gate voltage versus supply voltage’ – 2nd paragraph: changed symbol ‘Vpass’ and ‘Vpass(max)’ to ‘Vo(sw)’ and ‘Vo(sw)(max)’, respectively. 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 22 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset Table 11: Revision history …continued Document ID Modifications (continued): Release date Data sheet status Change notice Doc. number Supersedes • Added Section 8.5 “Bus transactions” on page 10; moved Figure 12 “Write control register” and Figure 13 “Read control register” to this section. • Table 5 “Limiting values” on page 12: – In the description line below table title, changed ‘referenced to GND’ to ‘referenced to VSS’ – Removed (old) table note [1], as this statement is now covered in Section 19 “Disclaimers” • Table 6 “DC characteristics” on page 13: – added (new) Table note 1 – changed symbol ‘RON’ to ‘Ron’ and its parameter from ‘switch resistance’ to ‘on-state resistance’ – changed symbol ‘Vpass’ to ‘Vo(sw)’ – under Conditions column: changed ‘Vswin’ to ‘Vi(sw)’; changed ‘Iswout’ to Io(sw)’ • Table 7 “DC characteristics” on page 14: – added (new) Table note 1 – sub-section ‘Select inputs A0 to A2, RESET’: changed ILI(max) from ‘+50 µA’ to ‘+1 µA’. – sub-section ‘Pass gate’: changed IL(min) from ‘−10 µA’ to ‘−1 µA’; changed IL(max) from ‘+100 µA’ to ‘+1 µA’ – changed symbol ‘RON’ to ‘Ron’ and its parameter from ‘switch resistance’ to ‘on-state resistance’ – changed symbol ‘Vpass’ to ‘Vo(sw)’ – under Conditions column: changed ‘Vswin’ to ‘Vi(sw)’; changed ‘Iswout’ to Io(sw)’ • Table 8 “Dynamic characteristics” on page 15: – symbol ‘tR’ changed to ‘tr’; symbol ‘tF’ changed to ‘tf’ – changed symbols ‘tVD;DATL’ and ‘tVD;DATH’ to ‘tVD;DAT’ and added Conditions indicating HIGH-to-LOW and LOW-to-HIGH transitions – changed symbol ‘tWL(rst)’ to ‘tw(rst)L’ – changed parameter for symbol tREC;STA from ‘recovery to START’ to ‘recovery time to START condition’ – in Table note 1: changed ‘RON’ to ‘Ron’ • • Added Figure 16 and Figure 17 Added Section 15 “Abbreviations” PCA9546A_2 20040929 Objective data sheet - 9397 750 13991 PCA9546A_1 PCA9546A_1 20040728 Objective data sheet - 9397 750 13308 - 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 23 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 17. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 18. Definitions 19. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 20. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 14318 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 6 April 2005 24 of 25 PCA9546A Philips Semiconductors 4-channel I2C switch with reset 21. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.2.1 7.3 7.4 7.5 8 8.1 8.2 8.3 8.4 8.5 9 10 11 12 13 14 14.1 14.2 14.3 14.4 14.5 15 16 17 18 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 5 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 6 Control register definition . . . . . . . . . . . . . . . . . 6 RESET input . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . 7 Voltage translation . . . . . . . . . . . . . . . . . . . . . . 7 Characteristics of the I2C-bus. . . . . . . . . . . . . . 8 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 START and STOP conditions . . . . . . . . . . . . . . 8 System configuration . . . . . . . . . . . . . . . . . . . . 8 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 10 Application design-in information . . . . . . . . . 11 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 12 Static characteristics. . . . . . . . . . . . . . . . . . . . 13 Dynamic characteristics . . . . . . . . . . . . . . . . . 15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 20 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 20 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 21 Package related soldering information . . . . . . 21 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 24 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Contact information . . . . . . . . . . . . . . . . . . . . 24 © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 6 April 2005 Document number: 9397 750 14318 Published in The Netherlands