INTEGRATED CIRCUITS 74F579 8-bit bidirectional binary counter (3-State) Product specification IC15 Data Handbook 1992 May 04 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) FEATURES 74F579 PIN CONFIGURATION • Fully synchronous operation • Multiplexed 3-State I/O ports for bus oriented applications • Built in cascading carry capability • U/D pin to control direction of counting • Separate pins for Master reset and Synchronous operation • Center power pins to reduce effects of package inductance • Count frequency 115MHz Typ • Supply current 100mA Typ • See 74F269 for 24-pin separate I/O port version • See 74F779 for 16-pin version CP MR I/O0 1 20 SR I/O1 2 19 CEP I/O2 3 18 CET I/O3 4 17 VCC GND 5 16 TC I/O4 6 15 U/D I/O5 7 14 PE I/O6 8 13 CS I/O7 9 12 OE 10 11 SF01085 DESCRIPTION The 74F579 is a fully synchronous 8-stage Up/Down Counter with multiplexed 3-State I/O ports for bus-oriented applications. It features a preset capability for programmable operation, carry look-ahead for easy cascading and a U/D input to control the direction of counting. All state changes, except for the case of asynchronous reset, are initiated by the rising edge of the clock. TC output is not recommended for use as a clock or asynchronous reset due to the possibility of decoding spikes. ORDERING INFORMATION TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 74F579 115MHz 100mA ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 20-Pin Plastic DIP N74F579N SOT146-1 20-Pin Plastic SOL N74F579D SOT163-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS 74F(U.L.) HIGH/LOW DESCRIPTION LOAD VALUE HIGH/LOW Data Inputs 3.5/1.0 70µA/0.6mA Data Outputs 150/40 3.0mA/24mA PE Parallel Enable input (active Low) 1.0/1.0 20µA/0.6mA U/D Up/Down count control input 1.0/1.0 20µA/0.6mA MR Master Reset input (active Low) 1.0/1.0 20µA/0.6mA SR Synchronous Reset input (active Low) 1.0/1.0 20µA/0.6mA CEP Count Enable Parallel input (active Low) 1.0/1.0 20µA/0.6mA CET Count Enable Trickle input (active Low) 1.0/1.0 20µA/0.6mA CS Chip Select input (active Low) 1.0/1.0 20µA/0.6mA OE Output Enable input (active Low) 1.0/1.0 20µA/0.6mA CP Clock input (active Rising Edge) 1.0/1.0 20µA/0.6mA TC Terminal Count Output (active Low) 50/33 1.0mA/20mA I/On NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state. 1992 May 04 2 853-0377 06639 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) LOGIC SYMBOL 74F579 LOGIC SYMBOL (IEEE/IEC) 13 12 20 19 CTR DIV 256 14 19 R1 1 1 12 1 PE CP 18 CEP 17 CET 11 OE CS MR SR 1 U/D 13 M2[LOAD] & I/O2 I/O1 I/O3 I/O4 I/O5 I/O6 4 5 7 8 9 1 M4[DOWN] 1 I/O7 17 3 EN3 1 15 14 2 1 11 TC I/O0 & 10 18 VCC = Pin 16 GND = Pin 6 1 SF01086 1 M5[UP] EN6 & G7 1 2,5,7, +/C8 2,4,7– 20 R9 [1] 1,2,3,4, 5,6,7,8 2 [2] 3 [4] 4 [8] 5 [16] 6 [32] 8 [64] 9 [128] 10 15 3,5,6,8 CT=256 3,4,6,8 CT=0 SF01087 FUNCTION TABLE INPUTS MR SR CS X X X X X OPERATING MODE PE CEP CET U/D H X X X L H X X X L H X L X X X H L X H H L H H (not LL) H H (not LL) H H H H H L X ↑ (not LL) = = = = = 1992 May 04 OE CP X X X I/O0 to I/O7 in high impedance (PE disabled) X H X I/O0 to I/O7 in high impedance X X L X Flip-flop output appears on I/On lines X X X X X Asynchronous reset for all flip-flops X X X X X ↑ Synchronous reset for all flip-flops L X X X X ↑ Parallel load all flip-flops H X X X ↑ Hold X H X X ↑ Hold (TC held High) (not LL) L L H X ↑ Count up (not LL) L L L X ↑ Count down High voltage level Low voltage level Don’t care Low-to-High clock transition CS and PE should never be Low voltage level at the same time. 3 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 LOGIC DIAGRAM SR PE 19 13 CP 1 CS 12 OE MR 20 11 I/O0 2 DETAIL A 3 DETAIL A I/O2 4 DETAIL A I/O3 5 DETAIL A 7 DETAIL A I/O5 8 DETAIL A I/O6 9 DETAIL A I/O7 10 DETAIL A I/O1 I/O4 U/D CEP CET 14 TOGGLE 18 MR CP 17 DATA LOAD TC D Q 15 CP Q Q Q DETAIL A VCC=pin 16 GND=pin 6 For pinouts refer to Package Pin Configurations 1992 May 04 4 SF01088 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT V VCC Supply voltage –0.5 to +7.0 VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VO Voltage applied to output in High output state IO Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature –0.5 to +VCC V TC 40 mA I/O0 48 mA 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH O High level output current High-level IOL O Low level output current Low-level Tamb Operating free-air temperature range 1992 May 04 V TC –1 mA I/On –3 mA TC 20 mA 24 mA 70 °C I/On 0 5 V Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL TC VOH O High level output voltage High-level I/On VOL O Low level output voltage Low-level VIK Input clamp voltage II Input current at maximum input voltage IIH High-level input current IIL Low-level input current IOZH+ IIH Off-state output current High-level voltage applied IOZL+ IIL Off-state output current Low-level voltage applied IOS Short-circuit output current3 ICC Supply current (total) LIMITS TEST CONDITIONS1 PARAMETER VCC = MIN, VIL = MAX, MAX VIH = MIN (VIL = 0.0V, VIH = 4 4.5V 5V for MR, CP inputs) VCC = MIN, VIL = MAX, MAX VIH = MIN IOH 1mA O = –1mA IOH 3mA O = –3mA IOL MAX, O = MAX MIN ±10%VCC 2.5 TYP2 MAX UNIT V ±5%VCC 2.7 3.4 V ±10%VCC 2.4 3.3 V ±5%VCC 2.7 3.3 V ±10%VCC ±5%VCC VCC = MIN, II = IIK 0.35 0.50 V 0.35 0.50 V –0.73 –1.2 V I/On VCC = MAX, VI = 5.5V 1 mA others VCC = MAX, VI = 7.0V 100 µA except I/On VCC = MAX, VI = 2.7V 20 µA VCC = MAX, VI = 0.5V –0.6 mA VCC = MAX, VO = 2.7V 70 µA VCC = MAX, VO = 0.5V –600 µA –150 mA 95 135 mA 105 145 mA I/On VCC = MAX ICCH ICCL VCC = MAX –60 ICCZ 105 150 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operating Conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter test, IOS tests should be performed last. 1992 May 04 6 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V CL = 50pF, RL = 500Ω TEST CONDITIONS MIN TYP Maximum clock frequency Waveform 1 100 115 tPLH tPHL Propagation delay CP to I/On Waveform 1 5.0 5.0 7.5 7.5 10.5 10.5 4.5 5.0 11.5 11.5 ns ns tPLH tPHL Propagation delay CP to TC Waveform 1 5.5 5.5 7.5 7.5 10.0 10.0 5.0 5.0 11.0 11.0 ns ns tPLH tPHL Propagation delay U/D to TC Waveform 4 3.5 4.5 5.5 6.5 8.0 8.0 3.5 4.5 9.0 9.0 ns ns tPLH tPHL Propagation delay CET to TC Waveform 3 3.5 3.5 5.5 6.0 7.0 8.0 3.5 3.5 8.5 8.5 ns ns tPHL Propagation delay MR to I/On Waveform 2 5.0 7.0 9.0 5.0 10.0 ns tPLH tPHL Propagation delay MR to TC Waveform 4 4.0 6.0 6.5 8.0 9.0 10.5 4.0 6.0 10.5 12.5 ns ns tPZH tPZL Output Enable time CS to I/On Waveform 6 Waveform 7 4.0 5.5 5.0 7.0 8.5 10.5 3.5 5.0 10.0 11.5 ns ns tPHZ tPLZ Output Disable time CS to I/On Waveform 6 Waveform 7 3.0 5.0 5.0 7.5 7.5 9.5 3.0 4.5 9.0 11.0 ns ns tPZH tPZL Output Enable time PE to I/On Waveform 6 Waveform 7 3.0 5.0 4.5 6.5 8.0 10.0 3.0 4.5 9.0 11.0 ns ns tPHZ tPLZ Output Disable time PE to I/On Waveform 6 Waveform 7 3.0 2.5 4.0 4.0 7.5 7.5 3.0 2.0 9.0 8.5 ns ns tPZH tPZL Output Disable time OE to I/On Waveform 6 Waveform 7 2.5 4.5 4.0 5.5 7.0 9.0 2.5 4.0 8.5 10.5 ns ns tPHZ tPLZ Output Enable time OE to I/On Waveform 6 Waveform 7 1.0 2.0 2.5 4.0 4.0 7.0 1.0 2.0 5.5 8.0 ns ns 7 MIN UNIT fMAX 1992 May 04 MAX Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MAX 80 MHz Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V CL = 50pF, RL = 500Ω TEST CONDITIONS MIN ts(H) ts(L) Setup time, High or Low I/On to CP th(H) th(L) TYP MAX Tamb = 0°C to +70°C VCC = +5.0V ± 10% CL = 50pF, RL = 500Ω MIN UNIT MAX Waveform 5 3.0 3.0 4.0 4.0 ns ns Hold time, High or Low I/On to CP Waveform 5 0 0 0 0 ns ns ts(H) ts(L) Setup time, High or Low U/D to CP Waveform 5 8.0 8.0 9.0 9.0 ns ns th(H) th(L) Hold time, High or Low U/D to CP Waveform 5 0 0 0 0 ns ns ts(H) ts(L) Setup time, High or Low PE, SR or CS to CP Waveform 5 9.5 9.5 10.0 10.0 ns ns th(H) th(L) Hold time, High or Low PE, SR or CS to CP Waveform 5 0 0 0 0 ns ns ts(H) ts(L) Setup time, High or Low CEP or CET to CP Waveform 5 5.0 9.0 5.5 10.5 ns ns th(H) th(L) Hold time, High or Low CEP or CET to CP Waveform 5 0 0 0 0 ns ns tw(H) tw(L) CP Pulse width, High or Low Waveform 1 4.5 4.5 4.5 4.5 ns ns tw(L) MR Pulse width, Low Waveform 2 3.0 3.0 ns trec Recovery time, MR to CP Waveform 2 4.0 4.5 ns 1992 May 04 8 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 AC WAVEFORMS NOTE: For all waveforms VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. 1/fMAX VM MR CP VM VM VM tW(L) tW(H) tPLH tPHL VM I/On trec tW(L) CP VM VM tPHL tPHL tPLH I/On VM TC VM VM SF01090 SF01089 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width and Maximum Clock Frequency CET VM Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time VM tPHL MR, U/D tPLH TC VM VM VM tPHL VM tPLH VM TC SF01092 SF01091 Waveform 3. Propagation Delay, CET Input to Terminal Count Output PE, CS, U/D, SR, I/On, CEP, CET VM VM VM ts(H) Waveform 4. Propagation Delay, U/D and MR Inputs to Terminal Count Output PE, OE, CS VM ts(L) th(L) SF01093 VM VM SF01094 tPLZ VM VOL +0.3V SF01095 Waveform 7. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 1992 May 04 VOH -0.3V Waveform 6. 3-State Output Enable Time to High Level and Output Disable Time from High Level VM tPZL I/On tPHZ VM Waveform 5. Setup and Hold Times PE, OE, CS VM tPZH th(L) I/On VM CP VM 9 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for 3-State Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00777 1992 May 04 10 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) DIP20: plastic dual in-line package; 20 leads (300 mil) 1992 May 04 11 74F579 SOT146-1 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) SO20: plastic small outline package; 20 leads; body width 7.5 mm 1992 May 04 12 74F579 SOT163-1 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) NOTES 1992 May 04 13 74F579 Philips Semiconductors Product specification 8-bit bidirectional binary counter (3-State) 74F579 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 14 Date of release: 10-98 9397-750-05142