PHILIPS BSN304A

DISCRETE SEMICONDUCTORS
DATA SHEET
BSN304; BSN304A
N-channel enhancement mode
vertical D-MOS transistors
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
FEATURES
QUICK REFERENCE DATA
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a TO-92
variant envelope, intended for use as
a line current interruptor in telephone
sets and for applications in relay,
high-speed and line transformer
drivers.
PINNING - TO-92 variant
PIN
BSN304; BSN304A
SYMBOL
PARAMETER
CONDITIONS
VDS
drain-source voltage
−
300
V
DC drain current
−
250
mA
Ptot
total power dissipation up to Tamb = 25 °C −
1
W
±VGSO
gate-source voltage
open drain
−
20
V
RDS(on)
drain-source
on-resistance
ID = 250 mA;
VGS = 10 V
−
8
Ω
VGS(off)
gate-source cut-off
voltage
ID = 1 mA;
VGS = VDS
0.8
2
V
d
handbook, halfpage
1
2
3
BSN304
gate
2
drain
3
source
g
MAM146
s
BSN304A
1
source
2
gate
3
drain
April 1995
MAX.
ID
DESCRIPTION
1
MIN.
Fig.1 Simplified outline and symbol.
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
BSN304; BSN304A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VDS
drain-source voltage
±VGSO
gate-source voltage
ID
DC drain current
IDM
peak drain current
Ptot
total power dissipation
Tstg
Tj
CONDITIONS
MIN.
open drain
MAX.
UNIT
−
300
V
−
20
V
−
250
mA
−
1
A
−
1
W
storage temperature
−65
+150
°C
operating junction temperature
−
150
°C
up to Tamb = 25 °C; note 1
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
THERMAL RESISTANCE
from junction to ambient; note 1
125 K/W
Note
1. Device mounted on an epoxy printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead
minimum 10 mm x 10 mm.
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V(BR)DSS
drain-source breakdown voltage
ID = 10 µA; VGS = 0
300
−
−
V
±IGSS
gate-source leakage current
±VGS = 20 V; VDS = 0
−
−
100
nA
VGS(th)
gate-source threshold voltage
ID = 1 mA; VDS = VGS
0.8
−
2
V
RDS(on)
drain-source on-resistance
ID = 250 mA; VGS = 10 V
−
6.7
8
Ω
ID = 20 mA; VGS = 2.4 V
−
7.9
14
Ω
IDSS
drain-source leakage current
VDS = 240 V; VGS = 0
−
−
100
nA
 Yfs
transfer admittance
ID = 250 mA; VDS = 25 V
200
380
−
mS
Ciss
input capacitance
VDS = 25 V; VGS = 0;
f = 1 MHz
−
57
90
pF
Coss
output capacitance
VDS = 25 V; VGS = 0;
f = 1 MHz
−
15
30
pF
Crss
feedback capacitance
VDS = 25 V; VGS = 0;
f = 1 MHz
−
2.6
15
pF
Switching times (see Figs 2 and 3)
ton
turn-on time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
−
2.5
10
ns
toff
turn-off time
ID = 250 mA; VDD = 50 V;
VGS = 10 to 0 V
−
17
30
ns
April 1995
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
BSN304; BSN304A
handbook, halfpage
VDD = 50 V
handbook, halfpage
90 %
INPUT
10 %
90 %
10 V
OUTPUT
ID
0V
50 Ω
10 %
MSA631
ton
toff
MBB692
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
MRC238
1.2
MRC234
150
handbook, halfpage
handbook, halfpage
Ptot
C
(pF)
(W)
0.8
100
Ciss
0.4
50
Coss
Crss
0
0
0
50
100
150
200
Tamb (°C)
0
5
10
15
25
20
VDS (V)
VGS = 0; f = 1 MHz; Tj = 25 °C.
Fig.4 Power derating curve.
April 1995
Fig.5
4
Capacitance as a function of drain-source
voltage, typical values.
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
MRC237
1.2
MRC243
1
handbook, halfpage
handbook, halfpage
P=1W
ID
BSN304; BSN304A
VGS = 10 V
ID
(A)
0.8
5V
4V
(A)
3.5 V
0.8
0.6
3V
0.4
0.4
2.5 V
0.2
2V
0
0
0
4
8
VDS (V)
12
Tj = 25 °C.
4
6
8
10
VGS (V)
VDS = 10 V; Tj = 25 °C.
Fig.6 Typical output characteristics.
Fig.7 Typical transfer characteristics.
MRC239
30
MRC240
25
handbook, halfpage
handbook, halfpage
RDSon
VGS = 2 V
RDSon
2
0
(Ω)
20
2.5 V 3 V 3.5 V
(Ω)
20
15
10
10
5
10 V 4 V 5 V
0
10−2
10−1
ID (A)
0
1
0
Tj = 25 °C.
Fig.8
April 1995
2
4
6
8
10
VGS (V)
VDS = 100 mV; Tj = 25 °C.
Drain-source on-resistance as a function of
drain current, typical values.
Fig.9
5
Drain-source on-resistance as a function of
gate-source voltage, typical values.
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
BSN304; BSN304A
MRC241
103
handbook, full pagewidth
Zth j-a
(K/W)
102
δ=
0.5
0.2
0.1
10
0.05
0.02
δ=
P
0.01
tp
T
1
0
t
tp
T
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
Fig.10 Transient thermal resistance from junction to ambient as a function of pulse time.
MRC242
10
handbook, halfpage
ID
(A)
1
(1)
tp =
10 µs
100 µs
1 ms
10 ms
10−1
tp
100 ms
δ= T
P
10−2
1s
DC
t
tp
T
10−3
10
1
102
VDS (V)
103
δ = 0.01; Tamb = 25 °C.
(1) RDS(on) limitation.
Fig.11 SOAR curve.
April 1995
6
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
BSN304; BSN304A
MRC235
2.5
MRC236
1.25
handbook, halfpage
handbook, halfpage
k
k
(1)
2
1
(2)
1.5
0.75
1
0.5
0.5
0.25
0
−50
0
50
100
Tj (°C)
0
−50
150
0
50
100
Tj (°C)
150
R DS ( on ) at T j
k = ----------------------------------------------.
R DS ( on ) at 25 °C
Typical RDS(on);
V GS ( th ) at T j
k = --------------------------------------------- .
V GS ( th ) at 25 °C
(1) ID = 250 mA; VGS = 10 V.
(2) ID = 20 mA; VGS = 2.4 V.
Fig.12 Temperature coefficient of
drain-source on-resistance.
April 1995
Fig.13 Temperature coefficient of gate-source
threshold voltage.
7
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
BSN304; BSN304A
PACKAGE OUTLINES
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L2
E
d
A
L
b
1
e1
2
e
D
3
b1
L1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
b
b1
c
D
d
E
e
e1
L
L1(1)
max
L2
max
mm
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
2.54
1.27
14.5
12.7
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
OUTLINE
VERSION
SOT54 variant
April 1995
REFERENCES
IEC
JEDEC
EIAJ
TO-92
SC-43
8
EUROPEAN
PROJECTION
ISSUE DATE
97-04-14
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
BSN304; BSN304A
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
NOTES
April 1995
10
BSN304; BSN304A
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistors
NOTES
April 1995
11
BSN304; BSN304A
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© Philips Electronics N.V. 1997
SCA54
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137107/00/01/pp12
Date of release: April 1995
Document order number:
9397 750 02464